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The emergence of applications which require high-voltage switches has created a tendency to use semiconductor device series stacks. These series stacks permit operation at blocking voltages above semiconductor elements’ nominal voltage. Insulated-gate bipolar transistors (IGBT) are currently utilized for controllability and switching speed, when these topologies are employed. The main challenge therewith is guaranteeing voltage balance between IGBTs, both when blocked and when switching transistors. Most of the methods which have been proposed to mitigate static and dynamic voltage unbalances increase transistor losses. The series stack loss-less high voltage switch (LHVS) which mitigates voltage unbalances, thus reducing switching losses, is presented in this paper. LHVS consists of a circuit, which ensures soft IGBT switching, an energy recovery circuit, and a gate delay compensation circuit. Additionally, the insulation voltage level is guaranteed to be equal between control circuit and high-voltage side of each IGBT. The operating principle of the LHVS is detailed in this paper, as is experimental validation which has been performed for three series stack modules. Static unbalances are reduced to 1%, while the differences between collector–emitter voltage curves in switching “on” do not surpass 8 ns, and switching losses are reduced by 41%, as compared to the hard-switching topology. [ABSTRACT FROM AUTHOR]

This paper presents a novel seven-level inverter topology for medium-voltage high-power applications. It consists of eight active switches and two inner flying capacitor (FC) units forming a similar structure as in a conventional active neutral-point-clamped (ANPC) inverter. This unique arrangement reduces the number of active and passive components. A simple modulation technique reduces cost and complexity in the control system design without compromising reactive power capability. In addition, compared to major conventional seven-level inverter topologies, such as the neutral point clamped, FC, cascaded H-bridge, and ANPC topologies, the new topology reduces the dc-link voltage requirement by 50%. This recued dc-link voltage makes the new topology appealing for various industrial applications. Experimental results from a 2.2-kVA prototype are presented to support the theoretical analysis presented in this paper. The prototype demonstrates a conversion efficiency of around 97.2% ± 1% for a wide load range. [ABSTRACT FROM AUTHOR]

This paper presents bidirectional grid-connected modular multilevel converters (MMC) with direct digital control and division-summation processes to achieve power-injection and rectification functions. A direct digital control is developed to track current references, regulate dc-bus voltage and cell voltage, and balance the upper and lower dc-bus voltages. It can accommodate wide filter-inductance variation and take care of source voltage harmonics to achieve tight current tracking and low distortion output current. Based on the power-balance principle, the commands of arm currents can be determined directly. In this paper, the MMC configuration is introduced first, and then the control laws for current tracking and voltage regulation are derived in detail. Experimental and simulated results obtained from two 50 kW MMCs operated in power-injection and rectification modes have verified the analysis and discussion. [ABSTRACT FROM AUTHOR]

This paper describes a dc-link voltage control method of a single-phase back-to-back cascaded H-bridge inverter (SBCI) for a medium-voltage motor drive system. The main advantage of the SBCI topology over the conventional regenerative cascaded H-bridge topology with a three-phase active front-end (AFE) is a simple system structure, which is composed of an input transformer, a power cell, a current sensor, etc. However, the challenging points of the SBCI are larger voltage ripple in the dc-link capacitor and imbalance of dc-link voltages of each phase. The asymmetric dc-link voltage of each power cells could cause unstable operation such as over-modulation due to the lack of the dc-link voltage of a particular phase and result in over-voltage or under-voltage faults. In this paper, the control strategy of the dc-link voltage for the SBCI that uses the negative-sequence voltage of the converter is described. The proposed control method is verified with a computer simulation whose target is a 6.6-kV–1.25-MW medium-voltage drive system. Also, through the experimental setup with the prototype SBCI whose power rating is 16.2 kVA, the dc-link voltage of each AFE has been controlled within a 0.5% error of its reference value at the full load. [ABSTRACT FROM AUTHOR]

A modular multilevel converter (MMC) is regarded as a promising topology in high-voltage direct current systems. However, the MMC consists of numerous submodules (SMs) and switching devices, which lead to a considerable switching loss, and increased cost and size of the heat sink. To mitigate these issues, this paper presents a novel modulation method composed of fundamental frequency modulation (FFM) and multicarrier-based sinusoidal pulsewidth modulation schemes. The main purpose of this modulation method is the reduction of switching loss while maintaining good harmonic performance. However, the FFM scheme leads to the unbalanced capacitor voltage of each SM in the MMC. Accordingly, this paper additionally proposes the rotation method and selective voltage balancing control for SMs to ensure effective performance of the method. Simulation and experimental results verify the effectiveness and performance of the proposed modulation scheme through switching loss and spectral analyses. [ABSTRACT FROM AUTHOR]

Nonregenerative pulsewidth-modulated (PWM) rectifiers are increasingly being considered for applications, where the power flow is unidirectional, such as power supplies for telecommunications, X-ray, the machine-side converter for wind energy conversion systems, etc. They use fewer active switches, which increase their power density and reduce cost. This paper proposes a novel reduced switch topology for a multilevel (five-level or higher) nonregenerative PWM rectifier. It uses only four controlled switches and eight diodes per phase for a five-level rectifier. Half of the diodes are naturally commutated (zero current switching) at the line frequency, which reduces switching losses. This topology has several other advantages compared to similar topologies reported in the literature, such as minimum voltage stress across the devices, elimination of transient voltage-balancing snubbers, no extra hardware for balancing the flying capacitors, the dc-link mid-point voltage, etc. In this paper, switching cycle average modeling and the carrier-based modulation strategy for this rectifier are also presented to maintain a balanced dc link and to regulate flying capacitor voltages, while achieving unity displacement factor at the rectifier input terminals. The overall performance of the rectifier is verified by experimental results. [ABSTRACT FROM AUTHOR]

This paper presents the digital implementation of a boundary controller with unipolar switching characteristic for single-phase voltage source full-bridge inverters. This paper expands the application of a second-order switching surface-based control method to unipolar switching of single-phase voltage source inverters (VSIs) using a finite-state machine. The finite-state machine has been formulated considering four different states of the inverter; positive,zero1, negative, andzero2. The second-order boundary control governs the current state of the system and provides proper switching action to keep the system within the desired reference. The control law is implemented digitally in F28m35x digital control card. A full-bridge inverter topology is used to achieve the three-level voltage switching. Various simulations and experiments were performed in a 550 VA, 120 V, 60 Hz VSI with a digitally implemented controller to verify the theoretical predictions. A high-quality voltage output was obtained for various loading conditions. The transient performance of the controller was investigated using a reference and load changes. A comparison of the implementation was made with the existing classical controllers to verify the fast-dynamic response of the system. [ABSTRACT FROM AUTHOR]

This paper presents a unified framework for the modeling, analysis, and design of load-independent Class E and Class EF inverters and rectifiers. These circuits are able to maintain zero-voltage switching and, hence, high efficiency for a wide load range without requiring tuning or use of a feedback loop, and to simultaneously achieve a constant amplitude ac voltage or current in inversion and a constant dc output voltage or current in rectification. As switching frequencies are gradually stepping into the megahertz (MHz) region with the use of wide-bandgap (WBG) devices such as GaN and SiC, switching loss, implementing fast control loops, and current sensing become a challenge, which load-independent operation is able to address, thus allowing exploitation of the high-frequency capability of WBG devices. The traditional Class E and EF topologies are first presented, and the conditions for load-independent operation are derived mathematically; then, a thorough analytical characterization of the circuit performance is carried out in terms of voltage and current stresses and the power-output capability. From this, design contours and tables are presented to enable the rapid implementation of these converters given particular power and load requirements. Three different design examples are used to showcase the capability of these converters in typical MHz power conversion applications using the design equations and methods presented in this paper. The design examples are chosen toward enabling efficient and high-power-density MHz converters for wireless power transfer (WPT) applications and dc/dc conversion. Specifically, a 150-W 13.56-MHz Class EF inverter for WPT, a 150-W 10-MHz miniature Class E boost converter, and a lightweight wirelessly powered drone using a 20-W 13.56-MHz Class E synchronous rectifier have been designed and are presented here. [ABSTRACT FROM AUTHOR]

This paper proposes generation of a 15-level (14 concentric) dodecagonal voltage space vector structure (DVSVS) for a star connected induction motor drive. The proposed multilevel DVSVS is obtained by cascading two inverters, namely a primary and secondary inverter. The primary inverter is a five-level (5L) structure formed by stacking two three-level flying capacitors with individual reduced dc sources and the secondary inverter is also a 5L structure formed by cascading two capacitor-fed cascaded H-bridges (CHB). The active power is supplied by the primary inverter, while the secondary inverter acts as switched capacitor harmonics filter, and capacitors in the secondary inverter are balanced naturally irrespective of load power factor for entire modulation index. The high-voltage dc supply fed primary inverter is operated in quasi-square wave mode, while the high frequency switching is applied to low voltage CHBs, thus, reducing the overall switching loss. The proposed scheme gives the advantages of both DVSVS and multilevel structure, thus, making it one of the solutions for battery or stacked dc-fed applications. The paper also presents the experimental results as well as comparison study with the existing topologies to support the advantages of proposed scheme. [ABSTRACT FROM AUTHOR]

High-performance cloud computing enables many key future technologies such as artificial intelligence (AI), self-driving vehicle, big data analysis, and the Internet of things (IoT), using clustered CPU and GPU servers in the datacenter. To improve the power efficiency and the infrastructure flexibility, the computing industry is adopting 54 VDC to power the servers in the open compute racks. In this paper, a new modeling technique for a soft-switched dc–dc converter is presented and suitable to guide optimal design in different applications, for example, 54 V to point of load (PoL) for the new open compute rack. To improve the model accuracy and reduce the complexity, this paper proposes a reduced-order linear differential equation (LDE) based modeling technique to discover the following: 1) the tank resonance involving the output inductor; 2) the output current ripple and its impact on power efficiency; 3) the proper on-time control for soft switching; 4) the unique bleeding mode under the heavy load; 5) the output power capability of the converter; and 6) component tolerance analysis and impact on the performance of the converter. With the power loss estimation, design guidelines are provided for a reference design and design improvement based on this new modeling technique. Using the proposed method, great accuracy can be expected in the efficiency estimation. Simulation and experimental results are provided to verify the modeling technique in a 54–1.2 V 25 A dc–dc converter prototype. [ABSTRACT FROM PUBLISHER]

To support the development of high-frequency ac microgrids in terms of compact design, high-voltage gain and low total harmonic distortion (THD), a buck–boost dual-leg-integrated step-up inverter is proposed in this paper. The inverter is formed by integrating a buck–boost converter into a conventional single-phase full-bridge inverter by sharing the upper switch and the body diode of the lower switch in both bridge-legs. Consequently, the component count is significantly reduced over the step-up inverter counterparts. In addition, to address the drawbacks of hybrid modulation methods adopted by existing dual-leg-integrated inverters, such as double-variable control, and high THD of output voltage/current at high input voltage and heavy load conditions, unipolar frequency doubling sinusoidal pulse width modulation scheme is adopted in this inverter. As a result, the modulation ratio M becomes the only control variable to regulate the output voltage/current and the control is simplified. The THD of the proposed inverter output can remain low throughout the entire input voltage range and load power range. This paper presents the topology derivation procedure, operation principle, and steady-state characteristics of the proposed inverter. To validate the effectiveness of theory, experimental results of a 400 W hardware prototype, where the output voltage frequency is at 500 Hz, are reported. [ABSTRACT FROM PUBLISHER]

In order to increase the efficiency of modern microprocessors power supplies used in data centers, the 48-V dc distribution bus is gaining growing attention. For such applications, voltage regulation modules (VRMs) are currently obtained using two-stage conversion systems with an intermediate 12-V dc bus. This paper presents an innovative single-stage approach for the 48-V VRM based on a quasi-resonant constant on-time (COT) operation. The proposed topology inherently integrates the multiphase approach, providing fast phase shedding and flat high-efficiency curves even at light load conditions. This is a unique advantage, usually not available in the two-stage approach, that is very important in server architectures, where high efficiency is required even at light load conditions. The paper analyses the circuit topology, and proposes a control architecture for fast transient response, including the current sharing capabilities, and a solution for implementing the integrated magnetics. The digital controller has been implemented in 0.16-$\mu$ m lithography together with a digital pulse-width-modulation with a 195 ps resolution, and a 40 MS/s, 7-bit ADC. Experimental results show an efficiency of 93.1% for a 250 A, 1.8 V VRM, and of 93.2% for a 102 A, 1.2-V double data rate (DDR) power supply. [ABSTRACT FROM PUBLISHER]

A switched-capacitor-based dual-switch dc–dc converter with a high-boost voltage gain is proposed in this paper. The proposed converter can obtain a high-voltage gain with a small duty cycle, which decreases the voltage stress and the conduction loss on the power switches. This paper presents the key waveforms, the operating principles at the continuous conduction mode and the discontinuous conduction mode, and the parameter design. Moreover, a comparison between the proposed converter and other nonisolated converters has been completed. To verify the operating principle, a 200 W prototype is constructed with an input voltage of 25–50 V and an output voltage of 200 V. The simulation and experimental results are shown. [ABSTRACT FROM PUBLISHER]

In this paper, direct torque control (DTC) of five-phase induction motor (FPIM) is implemented using three-level neutral point clamped (TL-NPC) inverter. One of the advantages of three-level inverter over two-level one for DTC operation is the low torque ripple. Also TL-NPC inverter through space vector modulation technique gives low $ dv/dt$ transition with better voltage waveform. By applying conventional lookup table for DTC, the TL-NPC inverter does not ensures lower $dv/dt$ transition. In this paper, a novel switching scheme for DTC of FPIM using TL-NPC inverter is proposed that ensures the low $ dv/dt$ transition and balancing of dc-link capacitor voltages of TL-NPC inverter. To form the lookup table for DTC operation, instead of using voltage vectors directly, virtual vectors (VVs) are utilized. Two switching states are used in one sample time to generate a VV in $\alpha \beta$ plane, which gives zero resultant voltage in $ xy$ plane. The switching strategy ensures low number of transitions to reduce the switching losses. The switching state redundancies are used in a novel way to balance the dc-link capacitor voltages without using any additional hardware. The proposed technique to balance the dc-link capacitor voltage gives lower switching frequency. The MATLAB/Simulink environment is used for the simulation and the results are validated through experiments. [ABSTRACT FROM AUTHOR]

This paper presents a hybrid seven-level converter based on T-type converter and H-bridge cascaded suitable for low-voltage and high-power-density applications. The operation principles and conduction paths are analyzed comprehensively. Voltage balance control of the floating capacitors is the key point of this paper. Mathematical expressions of capacitor voltage balance conditions are deduced based on sinusoidal pulse width modulation (SPWM). The results show that floating capacitor voltages are only balanced when the modulation index is below 0.82 under SPWM. In order to enlarge the modulation index ensuring the capacitor voltage balance, space vector modulation (SVM) is also applied to regulate floating capacitor voltages taking advantage of redundant switching vectors. Meanwhile, in SVM, there are no additional control requirements for the capacitor voltage. Taken both SPWM and SVM into consideration, the limit to the range of operation for this seven-level converter is presented, which is a function of the modulation index and the power factor. The merit of dc voltage utilization improvement in this topology is also analyzed based on simulation results. Simulations and experimental results under different modulation index and RL load are presented to verify the modulation strategies illustrated in this paper. [ABSTRACT FROM PUBLISHER]

An extended-duty-ratio (EDR) boost converter is studied extensively in this paper for high voltage gain applications with a wide input (and/or output) voltage range. The EDR is a unique combination of an interleaved, multiphase boost converter and switched capacitor configuration that achieves high voltage gain with significantly lower switch voltage stress and switching losses compared to conventional high-gain solutions. Most of the switches in the multiphase EDR experience only a fixed fraction of the output voltage ($1/M, 2/M$ , etc., where $M$ is the number of phases). Through extensive analysis over a wide operating range, it is shown here that the EDR boost converter has inherent current sharing among the phases only in a limited range of duty ratio— $(M-1)/M \leq D \leq 1$. As the duty ratio reduces beyond this range as required in wide input voltage applications, inherent current sharing property is lost. In this paper, techniques to ensure current sharing under all operating zones without requiring current sensors are presented. Instead of having equal duty ratio for each phase, it is adjusted for each phase according to the operating region of the converter. Extensive analysis is presented to derive the required duty ratio changes for the different phases. The proposed concept is validated with experimental results from a 250 W, 3-phase EDR boost, and GaN-based hardware prototype. [ABSTRACT FROM AUTHOR]

This paper introduces a novel five-level nested neutral point piloted (NNPP) converter and analyzes the operating principle of five-level NNPP converter. This paper presents a novel space vector pulse width modulation (SVPWM) algorithm based on gh coordinate for five-level NNPP converter. First, the common-mode voltage is reduced by choosing the appropriate redundant switching states. After that, the floating-capacitor voltage balance control strategy is presented. The appropriate switch combinations of each phase are determined by the control requirements of floating-capacitor voltages respectively and the hardware mapping method of the switching states is presented. Furthermore, the neutral-point voltage balance control strategy is presented. In order to balance the dc-link capacitor voltages, the seven-segment switching sequence is selected according to the control requirements of dc-link capacitor voltages and the neutral-point voltage regulatory factor is introduced to regulate the durations of the redundant switching states in a switching cycle. Finally, the validity of the novel SVPWM algorithm with decoupling control strategies of floating-capacitor voltages and dc-link capacitor voltages is verified by the experimental results of five-level NNPP converter under steady-state and dynamic conditions. [ABSTRACT FROM AUTHOR]

This paper analyzes three different carrier-based modulation patterns applied to a three-phase high-power-factor-corrected (PFC) five-level buck+boost-type converter acting as an interface between dc distribution systems and an ac grid. The modulation is analyzed employing the space vectors theory so that the achievable performance is demonstrated. The main advantage of the analyzed modulation strategy is its simplicity, which makes it suitable for digital signal controller (DSC) implementations. This seems straightforward for voltage source converters, but is a challenge for current-multilevel converters that typically employ field-programmable gate array devices to achieve better harmonic distortion performance. This is due to modern power electronics DSCs being typically designed for other converter topologies. The power converter is constructed with two phase-shift-modulated six-switch buck-type PFC converters, paralleled by interphase transformers, and an inverting circuit. The system features: bidirectional current carrying capability; relatively low parts count; high utilization of the semiconductors; and low current and voltage ripple at its terminals. The principle of operation, detailed description, analysis of the modulation strategy, and dimensioning equations for three different power circuit realizations are described in this paper assuming the analyzed modulation patterns. The feasibility of the presented converter is demonstrated by means of a constructed hardware prototype. [ABSTRACT FROM AUTHOR]

An efficient power converter system plays a significant role in the design of battery charging systems for electric vehicles (EVs). In this paper, a new zero-voltage and zero-current switching (ZVZCS) full-bridge dc–dc converter is proposed to reduce the power conversion losses. The proposed converter incorporates a new asymmetrical pulse width modulation (APWM) gating technique for the dc–dc conversion stage in the battery charging system. The proposed dc–dc converter topology achieves zero-voltage switching (ZVS) for all the active switches and near zero-current switching (ZCS) for low-side active switches throughout the charging range of the battery. The proposed APWM technique can reduce the switching and conduction losses compared to the conventional phase-shift modulation (PSM) gating technique. The auxiliary inductance required to ensure ZVS with APWM can also be reduced compared to PSM. Analysis, design, and implementation of the proposed APWM ZVZCS full-bridge dc-dc converter are discussed in this paper. A 100-kHz 1.2-kW laboratory prototype is developed and the experimental results are presented. The results validate the analysis and performance of the proposed converter. [ABSTRACT FROM AUTHOR]

A novel nine-level inverter topology for low-voltage applications is proposed in this paper. Each phase of the inverter is composed of a T-type three‐level cell and an active neutral point clamp three‐level cell. The operation principles and current conduction paths are analyzed in detail and phase-disposition sinusoidal pulsewidth modulation is used to balance voltages of flying capacitors and neutral point. The mathematical relationship between the capacitance and the desired ripple in the inverter output is established to select the intermediate capacitance value. Compared with other nine-level inverters suitable for low-voltage applications, the proposed inverter has advantages in a number of gate drivers, a number of dc sources, and efficiency. Simulation and experimental results under different settings of modulation index, power factor, output frequency, and load are presented to verify the effectiveness and performances of the proposed inverter. [ABSTRACT FROM AUTHOR]

A systematic method for developing ultra-wide output voltage range power supply based on modular switched-converter principle is proposed in this paper. The basic symmetric switched-converter (SSC) module is composed of two dc–dc modules, two diodes, and one active switch. Multi-stage SSC modules are generated by symmetric cascaded connection method. By controlling the active switches in multi-stage SSC modules, the connections of all the dc–dc modules’ output ports can be changed flexibly among series, parallel, and partial–parallel–partial-series connections. Then segmented regulation can be realized and system output voltage range can be widely extended. Meanwhile, the voltage range of each dc–dc module can be narrowed and the voltage/current stress can be reduced to simplify the design, increase device utilization ratio, and improve overall efficiency. A full-bridge isolated buck–boost converter with a semiactive rectifier, which features soft-switching and wide voltage adjustment range, is adopted as the dc–dc module to realize the proposed system. Input current sharing control strategy is adopted to ensure proper power balancing in all possible operating modes. The stability of the proposed system is also explored. Simulation and experimental results are provided to verify the effectiveness and advantages of the proposed system configuration, the switched-converter principle, and the control strategies. [ABSTRACT FROM AUTHOR]

The low-frequency fluctuation over the capacitor voltages seriously limits the development of medium-voltage variable-speed drives with a modular multilevel converter (MMC). Therefore, this paper presents an effective strategy of the low-speed and start-up operation for an MMC-based motor drive. The proposed strategy properly coordinates the improved injection and the reduced average capacitor voltage with high applicability. The specific interactions between the control parameters and the system metrics are analyzed to give the detailed steps of the parameters designing. Hence, based on the derivations, the proposed method enables the low-frequency operation under the nominal load torque with decreased injected components and reduced peak capacitor voltages. What is more, two start-up strategies that, respectively, aim at different objectives for the coordinated strategy are proposed, indicating satisfying control performances for the practical applications. The injected common-mode voltage and circulating current in the proposed method are designed to have a great reduction. Thus, the unfavorable risks for the motor are evidently decreased for better stability. The reduced peak current also lessens the high stress on switching devices with desirable reliability. The simulation and experiment results of an MMC-based motor drive prototype prove the effectiveness and superiority of the proposed method. [ABSTRACT FROM AUTHOR]

The three-level full-bridge (TLFB) dc−dc converter has been widely used in high-voltage, high-power applications. In the experimental test, the neutral-point voltage deviation appears; moreover, it has also been found out that if the flying capacitors are introduced, the input capacitor voltages could realize self-balance even if no active balancing solutions are adopted. In the previous publications, the role of flying capacitors is generally considered to extend the range of soft switching; however, the self-balance ability has not been mentioned or investigated in any publications thus far. In order to fill this gap, this paper provides the detailed mode operation analysis of the TLFB converter and reveals the cause of the imbalance. In addition, the mechanism of the self-balance ability provided by the flying capacitors is explained in detail, which gives a deep insight into the converter. At last, the influence factor of the voltage error in steady state has been analyzed, and the specific expression of the voltage error is also derived. The feasibility of the theoretical analysis is verified by the simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes the predictive control with the discrete space-vector modulation (DSVM) for Vienna rectifier connecting to the permanent magnet synchronous generator (PMSG) of the wind turbine system (WTS). Since Vienna rectifier has the special operation principle, Vienna rectifier generates only the feasible eight voltage vectors, which can be a candidate vector for the predictive control, depending on the sign of the input currents. In the proposed predictive control, the feasible voltage vectors are extended from 8 to 19 consisting the 8 original voltage vectors and 11 virtual voltage vectors by using the DSVM for improving the current quality related to the torque ripple, vibration, and noise, and the neutral-point voltage balance with low voltage ripple is guaranteed by using the offset value calculated based on the model of two dc-link capacitors in Vienna rectifier. The scheme for reducing calculation burden is applied in selecting the candidate vector. In addition, the limited operation range for the maximum torque per ampere control of PMSG connected to Vienna rectifier is analyzed. The performance of the proposed predictive control with DSVM for Vienna rectifier with PMSGs is verified in simulation and experiment. [ABSTRACT FROM AUTHOR]

This paper proposes a three-phase, five-level, non-regenerative pulsewidth modulated rectifier using only two active switches (minimum required) per phase, which drastically reduces gate driver requirement and hardware complexity. It draws sinusoidal input current at close to unity power factor. All the semiconductor devices are rated at only one fourth of the dc-link voltage, and none of them requires any transient voltage balancing snubber. A total of 8 out of the 14 diodes per phase undergo soft switching transition under all operating conditions, which increases its efficiency. No extra hardware circuitry for balancing the flying capacitors (FCs) or the dc-link mid-point voltage are required, which further reduces hardware complexity and increases the conversion efficiency. The proposed topology does not need any sophisticated startup procedure for charging the FCs either, which solves the problem of semiconductor overvoltage during starting. A 3-kW laboratory prototype is built to experimentally verify the proposed topology. The maximum efficiency obtained from the prototype is 98.7%, and it is always more than 96% for the load range from 15% to its rated. [ABSTRACT FROM AUTHOR]

This paper presents the topology and modulation technique of a three-phase three-level modified Z-source neutral-point-clamped (MZS-NPC) inverter, which combines a modified Z-source impedance network and a three-phase three-level NPC inverter. The boost factor of the proposed MZS-NPC inverter is twice as high as the three existing representative topologies combing an impedance network with a three-level NPC inverter. A modulation scheme for the proposed topology, based on a maximum boost control method, is designed to achieve the maximum voltage gain with simple implementation and to balance the dc-link neutral-point voltage. A closed-loop control of the ac load voltage in the fuel-cell or photovoltaic applications based on the proposed inverter is realized, in order to supply a desired voltage to the critical load in islanding mode of a microgrid. The boosting ability and operation validity of the proposed topology and modulation technique are demonstrated with simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper presents a new five-level T-type nested neutral point clamped (T-NNPC) converter. The proposed five-level T-NNPC topology is very attractive for medium-voltage applications as it can work in a wide range of voltages without the need of devices in series, and fewer components compared to the other five-level topologies. A model predictive control (MPC) strategy is also developed for the proposed converter to control the output currents at different output frequencies, and control flying capacitor voltages. A discrete-time model of the converter is developed and the control objectives that are the output currents and flying capacitor voltages are defined regarding switching states. A cost function is defined to minimize the deviation of the predicted values of the control objectives from their desired values. During each sampling time, the best switching state is selected and applied to the converter. The performance of the proposed five-level T-NNPC and the developed MPC strategy is studied in the MATLAB/Simulink environment, and the feasibility of the converter is evaluated experimentally. [ABSTRACT FROM AUTHOR]

This paper proposes a new 7-level inverter topology for induction motor drives. It is a hybrid topology formed by cascading a 5-level active neutral-point-clamped inverter with a 3-level T-type converter. It is obtained using low-voltage semiconductor devices with voltage blocking capability of Vdc/3 and Vdc/6. The topology uses three floating capacitors per phase, which are balanced within a pulsewidth modulation (PWM) switching duration using switching-state redundancies for each pole-voltage level. Topology forms two stacks at the front-end, which requires individual symmetrical dc source. The analysis of switching loss and conduction loss is performed and compared with some of the existing 7-level multi-level inverters reported in various literatures to show the advantages of the proposed topology. Furthermore, the single dc source operation with two stacked capacitors and closed-loop control of neutral-point voltage using symmetrical six-phase induction motor is proposed. The voltage-control algorithms for floating capacitors and dc-link stacked capacitors are proposed, which are independent of load power factor and modulation index. Open-loop V/f and closed-loop rotor field oriented control are performed, and various results at steady and transient states are presented to validate the aforementioned claims. [ABSTRACT FROM AUTHOR]

A multiphase-interleaved non-isolated high step-up dc/dc resonant converter for high-current applications with wide load range is proposed in this paper. The converter consists of an inverter stage with multiple resonant inverters in parallel interleaving operation that is cascaded to a common diode–capacitor rectifier stage. The topology of the inverter stage is a variation of class E inverter, which is designed for voltage boosting and of which the voltage gain is insensitive to load change. The rectifier stage comprises multiple pairs (correlated to the number of inverters in parallel) of diodes in parallel and a small output capacitor, which makes it simple to implement and of low cost. Together, the voltage gain variance of the converter can be confined within a small value and zero voltage switching operation can be maintained over a wide load range. A detailed mathematical analysis of the proposed converter is conducted for systematizing its design. A prototype of the proposed converter with an input voltage of 23.6 V, a rated output voltage of 190 V, and a rated output power of 80 W at 486 kHz is constructed for verification. A frequency controller is implemented to achieve fine regulation of the output voltage. [ABSTRACT FROM AUTHOR]

In this paper, a highly efficient isolated resonant converter with a novel modulation method is proposed for delivering power from photovoltaic (PV) modules to the dc microgrid. The proposed modulation method allows the converter to boost low input voltages and regulate a wide input voltage range. The converter design is based on a series resonant converter (SRC) that operates at the resonant frequency to achieve highest efficiency under nominal input voltage condition. Under shadowed or low irradiance conditions of PV panels, the converter will operate with the proposed “double-pulse duty cycle” modulation method to step up the voltage for the dc microgrid connection. With the proposed modulation method, the output switches serve for both synchronous rectification and voltage boost function. This method enables a higher voltage boost ratio than the SRC without adding additional switches while operating at the resonant frequency. A 300-W hardware prototype with gallium-nitride devices is built to verify the performance of the proposed converter and modulation method. The converter achieved a peak efficiency of 98.9% and a California Energy Commission weighted efficiency of 98.7% under nominal input voltage condition. [ABSTRACT FROM AUTHOR]

A three-phase three-level (TPTL) converter is an optimal alternative for high-input and high-power dc/dc conversion system. The voltage stress on the primary switch is only half of the input voltage due to its three-level (TL) structure, and the current rating of power devices can be reduced by the three-phase configuration. To achieve soft switching and improve efficiency, the resonant tank can be introduced to optimize the performance of the converter. In this paper, a novel TPTL LC-type series resonant converter with few switches and simple configuration is proposed. The voltage stress on all switches can be reduced to the half of the input voltage, and the voltage across output rectifiers is clamped to the output voltage; as a result, the proposed converter is suitable for high-input/output applications. Meanwhile, the ripple frequency of the output current can be increased significantly, resulting in a reduced filter requirement. Variable frequency control strategy is adopted in order to obtain zero-voltage switching for all switches and zero-current switching for all rectifier diodes in wide input voltage and load range. In this paper, the comprehensive analysis on the proposed converter is carried out, including the operation mode classification, the operating mechanism under different operation mode, along with the circuit model, and gain characteristics of the converter by the fundamental harmonic analysis. Experimental results from a 440–590 V input and 400 V/5 A output are presented to verify the theoretical analysis and the performance of the converter. [ABSTRACT FROM AUTHOR]

In this paper, a new space vector pulse width modulation method to extend the linear modulation range of a cascaded five level inverter topology with a single dc supply is presented. Using this method, the inverter can be controlled linearly and the peak phase fundamental output voltage of the inverter can be increased from 0.577 to 0.637 V\text{dc} without increasing the dc bus voltage and without exceeding the induction motor voltage rating. This new technique makes use of cascaded inverter pole voltage redundancy and property of the space vector structure for its operation. Using this, the induction motor drive can be operated till the full speed range (0–50 Hz) with the elimination of lower order harmonics in the phase voltage and phase current. The five-level topology presented in this paper is realized by cascading a two-level inverter and two full bridge modules with floating capacitors. The inverter topology and its operation for extending the modulation range is analyzed extensively. Simulation and experimental results for both steady-state and dynamic operating conditions are presented in this paper. [ABSTRACT FROM AUTHOR]

This paper extends the voltage-doubler concept to the single-phase SEPIC rectifier in discontinuous conduction mode and, as a consequence, novel rectifiers are proposed. A comparison with the classic SEPIC rectifier shows that the proposed converters can either provide reduced voltage stress on the semiconductors for the same output voltage level or supply double the gain of the output voltage with the same voltage stress. The proposed voltage-doubler SEPIC rectifiers provide a high power factor with no current control and they can be applied in order to improve the static gain of the structure, which can make the SEPIC rectifier suitable for applications that require a high voltage level. In this paper, the generic structure based on a three-state switch, four different implementations of the proposed concept (including bridgeless structures), steady-state analysis, a dynamic model, system control, and experimental results are presented. The proposed rectifiers were verified by experimental results obtained with a prototype built with the following specifications: 1000 W output power, 220 V input voltage, 400 V output voltage, and 50 kHz switching frequency. Peak efficiency of 95.84%, THD of 2%, and power factor of 0.9997 were obtained and, most importantly, double the gain of the output voltage was verified. [ABSTRACT FROM AUTHOR]

The matrix converter (MC) is a direct ac–ac power converter without an intermediate dc link. It has several attractive features, such as high power density, four-quadrant operation, and bidirectional power flow. However, the application of MCs in high-voltage and high-power systems is still limited by the device voltage levels. It is well known that the multilevel power converter technology can be a solution to enhance the voltage rating and improve harmonic performance in many applications. Therefore, an application of a multilevel topology based on a direct ac–ac power converter is proposed in this paper. This paper first introduce the topology structure, the switching pattern grouping method, and the proposed output voltage modulation method for a five-level capacitor clamped multilevel matrix converter (5LMC). Amplitude coefficient adjustment is also introduced as a part of modulation procedure to simplify the duty cycles calculation. Simulation from MATLAB/Simulink is given to demonstrate the theoretical work. Experimental results from a five-level matrix converter prototype are presented to validate the theoretical findings. [ABSTRACT FROM AUTHOR]

This paper presents a novel family of single-switch resonant dc–dc converters with low switch voltage stress. The single-switch resonant converter which has a ground-referenced switch is advantageous for implementing the gate drive circuit and operating at several-MHz switching frequency. However, the conventional ones mostly have high voltage stress on the switch, roughly 4–5 times the input voltage. In this paper, we propose the single-switch converter topologies derived from the drain-source impedance networks consisting of two inductors and two capacitors. The switch voltage of the proposed converters is shaped into a near trapezoid by designing the resonant networks to have the desired drain-source impedance. Furthermore, a simple and specific design scheme is presented here so that the peak switch voltage is lowered to 2.2–2.5 times the input voltage while zero voltage switching is achieved. Experimental results from a 20-W GaN-based prototype operating at 10 MHz demonstrate the feasibility of the proposed converter topologies and the design method. [ABSTRACT FROM AUTHOR]

In this paper, the Z-source converter is introduced to power factor correction (PFC) applications. The concept is demonstrated through a wireless power transfer (WPT) system for electric vehicle battery charging, namely Z-source resonant converter (ZSRC). Due to the Z-source network (ZSN), the ZSRC inherently performs PFC and regulate the system output voltage simultaneously, without adding extra semiconductor devices and control circuitry to the conventional WPT system such as conventional PFC converters do. In other words, the ZSN can be categorized as a family of the single-stage PFC converters. In addition, the ZSN is suitable for high-power applications since it is immune to shoot-through states, which increases reliability and adds a boost feature to the system. The ZSRC-based WPT system operating principle is described and analyzed in this paper. Simulations and experimental results based on a 1-kW prototype with 20-cm air gap between the system primary and secondary sides are presented to validate the analysis and demonstrate the effectiveness of the ZSN in the PFC of the WPT system. [ABSTRACT FROM PUBLISHER]

This paper proposes a new topological configuration for a unified power quality conditioner (UPQC). Generally, the power structure of the three-phase three-wire UPQC consists of two back-to-back connected six-switch inverters. For this configuration, out of 12 switches, six of the series inverter switches will be underutilized most of the time. To improve the semiconductor utilization and consequently to reduce the total switch count, this paper proposes a new reduced switch topology for the UPQC. The proposed topology is realized using only ten switches and retains all the performance merits of the 12-switch UPQC while minimizing its underutilization without increasing the switch VA rating. The paper provides a detailed analytical study and evaluation by comparing the proposed topology with the twelve- and nine-switch-based UPQC system configurations. The feasibility of the proposed topology is validated through experimental investigation. [ABSTRACT FROM AUTHOR]

This paper proposes a topology combination scheme to achieve wide-range operation for LLC resonant converters. Instead of directly adding an auxiliary current injection circuit for each individual LLC converter, the proposed scheme combines two LLC converters through coupled resonance. Then, one LLC circuit can be utilized to adjust the equivalent resonant parameters of the other LLC circuit. By only controlling the phase delay between the mosfet bridges, output voltage regulation is properly maintained without changing the switching frequency. Since the total power rating does not change and each converter can share the load, it does not have any extra cost of power components. The advantages of this design include higher power efficiency, smaller size, and optimized utilization of each converter at different load, since both converters can fulfill isolated power conversion with independent control. Also, by taking the benefit of suppressed frequency variation, a smaller leakage inductance and a lower ratio between the leakage inductance and the magnetizing inductance are allowed, so that the coupling of transformer windings and transformer efficiency just improve. In addition to detailed theoretical analysis, experimental results verify the feasibility and effectiveness of the proposed concept. [ABSTRACT FROM AUTHOR]

This paper presents a modular multilevel series/parallel converter (MMSPC) with intermodule switched-inductor power transfer. The switched-inductor voltage conversion feature allows controllable and efficient transfer of energy between modules with nonnegligible voltage difference, providing both step-down and step-up functionalities. Thus, this converter can accurately control and rapidly adjust the voltage of each module to generate an ac output voltage waveform with a controllable number of levels, increasing the quality of the output. Moreover, the intrinsic dc–dc conversion feature can generate a dc controllable output voltage and enable new applications. In this text, we specifically demonstrate how the flexibility of obtaining both ac and dc output with the same setup renders the topology promising for battery energy storage systems and dc microgrid applications. Experimental results validate the topology and concept of an MMSPC with intrinsic switched-inductor conversion. [ABSTRACT FROM AUTHOR]

This paper presents new space vector pulsewidth modulation (PWM) strategies for a single-phase three-level buck-boost neutral point clamped inverter coupled with impedance-source (IS) network. These strategies can be implemented for systems with any IS network with neutral point. The case study system is based on the quasi-Z-source inverter with continuous input current. To demonstrate an improved performance, the strategies are compared with a traditional PWM strategy. The advantages lie in reduced switching number, without output voltage quality distortion. The simulation and experimental results confirm the theoretical predictions. [ABSTRACT FROM AUTHOR]

Cascaded H-bridge (CHB) inverter is the most widely used topology for a medium-voltage drive system due to the high degree of modularity, easier implementation of medium output voltage, and the ability to continuous operation under the cell fault condition. Because each power cell of CHB should have isolated dc source, multiwinding input transformer and three-phase active front end (AFE) are generally used for regenerative applications. The whole system can be simplified by replacing the three-phase AFE with single-phase AFE. However, if the control strategy of normal operation is adopted under the cell fault condition, input power imbalance among three phases inevitably occurs. In that situation, not only faulty cells, but also some unscathed cells should be excluded with giving up the maximum capability of the system, not to deteriorate grid current. This paper proposes a control scheme against the cell fault condition of the single-phase AFE CHB. By applying the proposed control scheme to the system, dc-link voltage of each cell and grid current are well regulated without imbalance even under the cell fault conditions. Finally, it can minimize the number of undamaged cells which should be turned off and maximize the capability of the system under the cell fault condition. Simulation and experimental results are provided to verify the effectiveness of the proposed scheme. [ABSTRACT FROM AUTHOR]

This paper proposes an enhanced hybrid modular multilevel converter (MMC), which utilizes a combination of half-bridge submodules (HBSM) and at least one full-bridge submodule (FBSM). In the proposed structure, FBSMs work with half of the HBSMs nominal voltage in each arm. Due to the presence of FBSMs, HBSMs switching frequency drops significantly, which reduces the converter power loss compared to half-bridge based MMCs. Furthermore, because of redundant FBSMs, (2N + 1)-modulation can be employed to generate the output voltage without increasing the circulating current, thus, the converter performance is improved notably. Besides, with the redundant FBSMs, the converter can continue its operation even if a fault occurs in one of HBSM switches. All the control procedure is accomplished using model predictive control strategy and performance of the proposed converter is verified by several simulation and experimental studies. The obtained results confirm the feasibility of the proposed scheme in reducing the converter loss, improving its performance and fault-tolerant operation. [ABSTRACT FROM AUTHOR]

A 1-φ hybrid nine-level inverter (H9LI) topology has been proposed in this paper. The proposed H9LI topology uses a simple phase disposition pulsewidth modulation strategy to generate nine-voltage levels in the output. The main advantage of this topology is that it has a low switch count (ten switches) compared to the existing nine-level inverter topologies. To regulate the voltage across auxiliary capacitor, two innovative control techniques are proposed, which are integrated with the inverter modulation technique itself. Hence, it does not require any extra voltage balancing circuits to maintain the voltage across the auxiliary capacitor and input dc capacitors. A major advantage of these control techniques is that they eliminate the sensing of the coupled inductor current. Another significant advantage of H9LI is that loss distribution among all the power switches is more uniform compared to existing nine-level inverters. Due to low part count and absence of extra voltage balancing circuits, the H9LI achieves higher efficiency (η ≍ 94.5%) and lower cost. Furthermore, the requirement of filter size reduces due to the presence of coupled inductor in H9LI. The proposed 1-φ grid connected H9LI is verified through MATLAB/Simulink simulations and validated through experiments on a laboratory prototype of 400-VA rating. [ABSTRACT FROM AUTHOR]

This paper presents a deadbeat-based method for the single-inductor multiple-input multiple-output (SI-MIMO) dc–dc converter. By solving the cross regulation problem of the SI-MIMO dc–dc converter, the proposed method is capable of achieving the input current regulation (ICR) and the output voltage regulation (OVR) simultaneously. Moreover, the output current observers are adopted to replace the output current sensors, which are required by the conventional model based methods for dc–dc converters. The proposed control approaches including ICR and OVR are discussed in detail. To verify the effectiveness of the proposed deadbeat-based method, simulation runs and experiments are conducted on the single-inductor dual-input dual-output buck converter simulation platform and hardware prototype, respectively. The simulation and experimental results are analyzed in detail, and the comparison with the previous works is conducted. [ABSTRACT FROM AUTHOR]

This paper explores the large-signal and small-signal dynamics of a series-capacitor (SC) buck-type converter and introduces an optimal closed-loop control scheme to accommodate both the steady-state and transient modes. As opposed to a conventional buck converter, where time-optimal control is realized by a single on–off cycle, in the SC-buck topology, there is a need to distribute the switching phases to satisfy the charge balance of the SC. The new control method merges a voltage-mode controller for the steady-state operation and a nonlinear, state-plane based transient-mode controller for load transients. A detailed principle of the operation of the SC-buck converter is provided and explained through an average-behavioral model and state-plane analysis. The operation of the controller is experimentally verified on a 20 W 12 V-to-1 V converter, demonstrating voltage-mode control operation as well as minimum-deviation and time-optimal responses for load transients. [ABSTRACT FROM AUTHOR]

Voltages of series-connected batteries gradually become imbalanced due to nonuniformity in terms of not only battery characteristics but also self-discharge rate that is significantly dependent on temperature. In large-scale energy storage systems, a large temperature gradient is very likely because of its huge geometry, and therefore, equalizers capable of relatively large equalization currents would be necessary to eliminate voltage imbalance originating from uneven temperature distribution. A two-switch string-to-battery voltage equalizer using a half-bridge converter with multistacked current doublers (MSCDs) is proposed for series-connected batteries in this paper. The proposed equalizer is capable of providing relatively large equalization currents without increasing ripple currents thanks to the interleaved operation of the MSCDs. Fundamental operational analysis for a discontinuous conduction mode, in which currents in the equalizer can be limited to desired levels without feedback control, is performed. The experimental results of equalization tests performed for four supercapacitor modules and lithium-ion batteries connected in series demonstrated the equalization performance of the proposed equalizer. [ABSTRACT FROM AUTHOR]

This paper presents a comprehensive review of multiport converters for integrating solar energy with energy storage systems. With recent development of a battery as a viable energy storage device, the solar energy is transforming into a more reliable and steady source of power. Research and development of multiport converters is instrumental in enabling this transformation in an efficient manner. The high efficiency of conversion in comparatively smaller footprint makes a multiport converter very attractive in this application. Most of the recently reported multiport converter topologies are discussed here. A breakdown of isolated and nonisolated topologies is presented along with the comparison of converter architectures and features such as operating conditions, device count, efficiency, etc. Each group of multiport converters is subdivided into different smaller groups based on their architecture. Detailed specifications are presented for important topologies. Finally, a performance comparison is carried out featuring the advantages and disadvantages of the various topologies leading to suggestions for the direction of future research. [ABSTRACT FROM AUTHOR]

In this paper, a family of step-up resonant switched-capacitor converters (RSCs) with a continuously adjustable conversion ratio is proposed based on the Cuk dual-resonance core (DRC) featuring two resonant paths. By adopting the on-time fixed frequency modulation, the two resonant paths can conduct simultaneously and satisfy the charge balance of the flying capacitor during the overlapping period. As a result, the conversion ratio—upper bounded by two determined by the circuit configuration—can vary continuously and efficiently even at the light load condition (1/10 of the rated power). A comprehensive analysis—the operation principle, voltage-gain curve, and voltage/current stresses—about the DRC is given. In addition, the Cuk DRC was extended to the series–parallel switched-capacitor converter (SCC), Fibonacci SCC, and voltage doubler to form a family of step-up RSCs, whose voltage-gain curves of different topologies are derived. Moreover, a characteristic comparison between the Cuk DRC and the traditional “direct” and “indirect” resonant core is given. Then, a 48 to 62–94.6 V resonant core with peak efficiency 97.8% and maximum power 120 W under the open loop condition was built. The analyses were verified by both experimental and simulation results. [ABSTRACT FROM AUTHOR]

The five-level nested neutral-point-clamped (5L-NNPC) converter is one of the most promising topologies for medium-voltage (2.3–7.2 kV) high-power applications such as medium-voltage drives, wind energy conversion systems, and grid-connected systems. The 5L-NNPC requires a fewer number of switching devices, freewheeling and clamping diodes, and flying capacitors compared to the existing five-level multilevel converters. In the 5L-NNPC topology, each flying capacitor voltage is regulated at one-fourth of the dc-bus voltage to obtain the five-level operation. Due to the lack of redundant switching states, it is difficult to control the flying capacitor voltages by using the pulse-width-modulation-based classical control methods. This paper proposes a model-predictive current control (MPCC) approach to control the flying capacitor voltages along with the output currents of the 5L-NNPC converter. The discrete-time model of 5L-NNPC is developed to implement the MPCC scheme. The simulation and experimental studies are conducted to verify the dynamic and steady-state performance of 5L-NNPC with the MPCC scheme. The performance of the proposed MPCC approach is compared with the conventional space-vector-modulation-based voltage-balancing approach. Furthermore, the flying capacitor voltage control capability of MPCC is verified at different load power factors. [ABSTRACT FROM AUTHOR]

This paper proposes a control method for a five-level hybrid flying-capacitor (5L-HFC) inverter, of which structure stems from the conventional five-level active neutral-point-clamped (5L-ANPC) topology by dividing the dc-link stage into three series-connected capacitors. In this inverter, the voltage stress on the power switches connected to the dc link is reduced by a half compared with that of the 5L-ANPC topology, thus the lower number of equally voltage-rated power devices can be employed. Also, the power losses in the 5L-HFC inverter are more evenly distributed than in the 5L-ANPC. In order to balance the dc-link capacitor voltages, a third-order harmonic offset injection is applied. When a diode rectifier is used to supply the dc bus voltage, the balancing method is not effective if the modulation index is higher than 0.64. Thus, an auxiliary circuit is needed to support the balancing of the dc-link capacitor voltages. However, the unbalancing problem can be overcome in a full-range operation without the auxiliary circuit if the back-to-back configuration is utilized. Finally, simulation and experiment results have verified the performance of the 5L-HFC inverter with the proposed control method. [ABSTRACT FROM AUTHOR]