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For very high frequency (VHF) class Φ2 inverter, conventional design method requires complex tuning for parameters. Without fully quantitative calculations, the tuning highly depends on experience that cannot achieve optimal design. In this article, a target function design strategy is proposed based on quantitative harmonic weighting, which simplifies the design procedures and minimizes the switch voltage stress. First, the target switch voltage with minimized peak value is derived by optimizing the harmonic weighting. With the result, the power switch is modeled as a voltage source to simplify the calculations, where the branch currents are solved to provided fully quantitative analysis. Based on the analysis, optimal features of switching node impedance are derived to achieve the target switch voltage. In addition, basic constrains of the resonant tank are analyzed to reduce circling currents. Combining the optimal features and basic constrains of the resonant tank, the circuit parameters are calculated directly, which minimizes the switch voltage stress and improves power efficiency. Compared with conventional design, a 27.12 MHz prototype demonstrates 10.2% reduction in average switch voltage stress and 7.2% improvement in average efficiency. [ABSTRACT FROM AUTHOR]

This article proposes a unified pulsewidth-cycle (UPWC) control strategy to achieve mixed-mode operation and consistent valley switching (VS) for boost power factor correction converter. Compared with conventional single-mode controllers, it has a unified scheme to achieve single discontinuous conduction mode (DCM), single critical conduction mode (CRM), or mixed DCM/CRM operations in each half-line cycle. To regulate the input current as a sinusoid, the UPWC controller adopts a variable pulsewidth and a near-constant switching cycle under DCM, while adopts a constant pulsewidth and a variable switching cycle under CRM. To facilitate analysis, normalized mapping of operation modes is provided, along with the final pulsewidth and switching cycle. Furthermore, to ensure consistent VS, a controlled zero current detection method is proposed to fix the turn-on point of the power switch. No matter in DCM or CRM, consistent VS reduces both the switching loss and current distortion caused by parasitic resonance. To further reduce the current distortion caused by fixing the turn-on point, a compensation gain is provided that reshapes the input current as a sinusoid. Finally, through mixed DCM/CRM operation and consistent VS, the proposed UPWC controller achieves preferable performances in the power range, efficiency, power factor, and current distortion. [ABSTRACT FROM AUTHOR]

Exploring high-performance controller for buck converter is challenging since it can be easily affected by converter model accuracy. In this paper, a novel nonaveraged current discrete-time (NCD) model is proposed, in which inductor current is expressed as time-varying equations during switch-on and switch-off states. It achieves higher accuracy than the conventional averaged model at high-frequency range, thus can be used to optimize high-speed controller design. Based on the NCD model, a multiloop minimum switching cycle (MMSC) control strategy, composed of output feedback (OF), line feed forward (LFF), and reference feed forward (RFF) loops, is proposed and tuned for buck converter operating in continuous conduction mode. Mutual influences among three loops are considered and eliminated by specifically designed LFF and RFF compensations, which adapt the OF compensation. With consideration of sampling and calculation delays, relationship between transient switching cycles and geometric center of controller poles is discovered from a calculated output voltage error series. Furthermore, theoretical minimum switching cycles are calculated by moving the center inside the unit cycle of complex plane, which ensures system stability. Moreover, load/line transient response and reference tracking time are simultaneously optimized to the minimum switching cycles. Effectiveness of the controller is proved by converter closed-loop pole/zero plots, transient response simulations, and experiments. [ABSTRACT FROM AUTHOR]