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Nine-Switch inverter (NSI) has been recently introduced for independent control of dual ac motors. Although this topology reduces the number of active switches by 25% compared to conventional inverters, it has a main conceptual shortcoming due to voltage gain limitations. In NSI, the voltage gains of both outputs are relatively low, while their maximum achievable magnitudes depend on the phase angle between the two sets. In order to mitigate this problem, this article introduces a new dual output nine-switch boost inverter (NSBI) topology with a minimum number of passive elements. The detailed analysis of NSBI is presented, while the required modifications to conventional pulsewidth modulation (PWM) strategies of the NSI are explained to ensure an acceptable voltage boosting ratio while a high-quality voltage output is obtained. Among different PWM schemes, a modified discontinuous PWM scheme is found optimum with this proposed topology to minimize the voltage stress across switches and improve the input current and output voltage quality. The proposed topology is also validated under both common-frequency and different-frequency modes of operations. Moreover, a clear picture of the NSBI performance compared with other possible counterparts is introduced. The theoretical findings have been corroborated using simulation and experiments. [ABSTRACT FROM AUTHOR]

In order to overcome the limitations of the existing classical and solid-state Marx pulse generators, this paper proposes a new modular multilevel voltage-boosting Marx pulse generator (BMPG). The proposed BMPG has hardware features that allow modularity, redundancy, and scalability as well as operational features that alleviate the need of series-connected switches and allows generation of a wide range of pulse waveforms. In the BMPG, a controllable, low-voltage input boost converter supplies, via directing/blocking (D/B) diodes, two arms of a series modular multilevel converter half-bridge sub-modules (HB-SMs). At start up, all the arm's SM capacitors are resonantly charged in parallel from 0 V, simultaneously via directing diodes, to a voltage in excess of the source voltage. After the first pulse delivery, the energy of the SM capacitors decreases due to the generated pulse. Then, for continuous operation without fully discharging the SM capacitors or having a large voltage droop as in the available Marx generators, the SM capacitors are continuously recharged in parallel, to the desired boosted voltage level. Because all SMs are parallelly connected, the boost converter duty ratio is controlled by a single voltage measurement at the output terminals of the boost converter. Due to the proposed SMs structure and the utilization of D/B diodes, each SM capacitor is effectively controlled individually without requiring a voltage sensor across each SM capacitor. Generation of the commonly used pulse waveforms in electroporation applications is possible, while assuring balanced capacitors, hence SM voltages. The proposed BMPG has several topological variations such as utilizing a buck–boost converter at the input stage and replacing the HB-SM with full-bridge SMs. The proposed BMPG topology is assessed by simulation and scaled-down proof-of-concept experimentation to explore its viability for electroporation applications. [ABSTRACT FROM AUTHOR]

This paper presents a drive system based on a modular multilevel converter (MMC) with high-frequency magnetic channels between adjacent-arm submodules (SMs), suitable for medium-voltage, high-power three-phase variable-speed machines. The configuration employs chains of dual half-bridge (DHB) modules linking adjacent SMs of three-phase symmetrical arms. The DHB modules are operating as power channels enabling energy exchange to restore the power imbalance among the SM capacitors. This allows arms’ ripple-powers to be entirely decoupled through bidirectional power transfer between adjacent-arm SMs, resulting in a near ripple-free SM capacitor voltage profile. Therefore, the MMC common problem of wide voltage fluctuation across SM capacitors is comprehensively solved, independent of the operating frequency. Additionally, a significant reduction in the sizing requirement of SM capacitance is achieved. The configuration is able to drive multimegawatt machines from standstill to the rated speed at the rated torque operating condition. The operating principle of the proposed MMC configuration is explained and necessary mathematical analysis is derived. Features and viability of the proposed drive system are verified through simulation and experimentation. [ABSTRACT FROM AUTHOR]

This paper presents a dual modular multilevel converter (MMC) topology that utilizes energy exchange between adjacent-arm submodules (SMs), operating with out-of-phase modulation. The proposed configuration is applicable to medium-voltage high-power variable-speed drives incorporating open-end stator winding machines. A novel concept of power decoupling between adjacent-arm SMs in the dual MMC topology is realized through high-frequency transformer-based dc–dc converter modules. This concept offers a significant reduction in the sizing requirement of the SM capacitance and the stored energy in the MMC system, while avoiding the problem of wide voltage fluctuations of SM capacitors, especially at low operating frequencies. The proposed configuration can produce dc voltage; therefore, a machine speed range from zero speed to the rated speed is possible under the rated torque operating condition. The operating principles of the proposed dual MMC configuration are elaborated and necessary mathematical analysis is derived. Simulation and experimental results verify the concept of the proposed drive configuration. [ABSTRACT FROM AUTHOR]

High-voltage (HV) pulses are used in electroporation to subject pulsed electric field (PEF) onto a sample under treatment. Pulse-waveform shape, voltage magnitude, pulse duration, and pulse repetition rate are the basic controllable variables required for particular PEF application. In practice, a custom-made pulse generator is dedicated for each PEF application with limited flexibility in changing these variables. In this paper, a universal pulse-waveform generator (UPG) is proposed, where the controller software algorithm can manipulate a basic generated multilevel pulse waveform to emulate many different PEF pulse waveforms. The commonly used PEF HV pulse waveforms can be generated as bipolar or monopolar with controllable pulse durations, repetition times, and voltage magnitudes. The UPG has the ability to generate multilevel pulses that have controllable $dv/dt$, which allows reduction of the electromagnetic interference generated by the converter. The UPG topology is based on half-bridge modular multilevel converter (HB-MMC) cells forming two transition arms in conjunction with two bistate arms, together creating an H-bridge. The HB-MMC cell capacitors provide a controllable energy source which charge from the dc input supply and discharge across the load, while the two bistate arms allow charging the HB-MMC cell capacitors. Hence, the UPG topology offers modularity, redundancy, and scalability. The HB-MMC individual cell capacitance is low and the cell voltages are balanced by employing the sorting and rotating algorithm used in conventional HB-MMC topologies for HV dc transmission applications. The viability of the proposed UPG converter is validated by MATLAB/Simulink simulation and scaled-down experimentation. [ABSTRACT FROM PUBLISHER]

Bipolar repetitive high-voltage pulse generators are commonly used in modern pulsed power applications. Conventionally, bipolar high-voltage pulses can be generated by adding a high-voltage H-bridge at the output stage of a unipolar high-voltage pulse generator which increases complexity and cost of the bipolar high-voltage pulse generator. In this paper, a boost-inverter-based bipolar high-voltage pulse generator with high-voltage gain is proposed. The proposed generator can provide high-voltage bipolar output pulses with the desired specifications from a low input dc voltage. The proposed generator is based on employing two bidirectional boost dc–dc converters, where the load is connected differentially between the boost converters’ output terminals. In the proposed approach, four controlled switches are required. Only two out of these four switches are rated at the high-voltage output level which affects positively the system cost. A detailed illustration of the proposed approach along with the design of its passive components is presented in this study. Simulation and experimental results are used to validate the proposed approach. [ABSTRACT FROM AUTHOR]

Conventional dual-active bridge topologies provide galvanic isolation and soft-switching over a reasonable operating range without dedicated resonant circuits. However, scaling the two-level dual-active bridge to higher dc voltage levels is impeded by several challenges among which the high dv/dt stress on the coupling transformer insulation. Gating and thermal characteristics of series switch arrays add to the limitations. To avoid the use of standard bulky modular multilevel bridges, this paper analyzes an alternative modulation technique, where staircase approximated trapezoidal voltage waveforms are produced; thus, alleviating developed dv/dt stresses. Modular design is realized by the utilization of half-bridge chopper cells. This way the analyzed dc-dc transformer employs modular multilevel converters operated in a new mode with minimal common-mode arm currents, as well as reduced capacitor size, hence reduced cell footprint. Suitable switching patterns are developed and various design and operation aspects are studied. Soft-switching characteristics will be shown to be comparable to those of the two-level dual-active bridge. Experimental results from a scaled test rig validate the presented concept. [ABSTRACT FROM AUTHOR]

The traditional neutral point clamped (NPC) inverter has short-circuit problem. The risk of short-circuit can be decreased by using dead-time in the switching signals. However, the dead-time decreases the achievable output voltage and causes distortion in the waveforms. To overcome the short-circuit problem, dual-buck NPC (DB-NPC) and split-inductor NPC (SI-NPC) inverters have been researched. However, the voltage stress of the two external diodes in the DB-NPC inverter is higher. On the other hand, the SI-NPC inverter has a problem of generating huge voltage spikes in the dead-time, which can destroy the semiconductor devices. In addition, the SI-NPC inverter cannot provide reactive power. This article presents a family of NPC inverters consisting of single-phase, three-phase, and cascaded inverters. The proposed inverters have no short-circuit and dead-time issues, therefore no high voltage and current spikes are caused. Also, the dead-time in the switching signals can be minimized. As a result, the magnitude of the output waveforms can be increased, and quality can be improved. Unlike the DB-NPC inverter, the voltage stress of all the semiconductor in the proposed inverter is lower, and unlike the SI-NPC inverter the proposed inverter provides reactive power. In this article, the proposed three-level NPC inverter is analyzed, designed, and tested. The voltage stress of the semiconductor devices in the proposed inverter is half of the source voltage, whereas in the conventional DB-NPC inverter the voltage stress of the two external diodes is the source voltage. In addition to the aforementioned benefits, the proposed cascaded inverter reduces the total number of inductors. To verify the analysis, detailed simulation, and experimental results of the proposed three-level inverter with input voltage 640 V, output power 1.2 kW, and output voltage 220 Vrms are provided. [ABSTRACT FROM AUTHOR]

Solar photovoltaic (PV) energy has witnessed double-digit growth in the past decade. The penetration of PV systems as distributed generators in low-voltage grids has also seen significant attention. In addition, the need for higher overall grid efficiency and reliability has boosted the interest in the microgrid concept. High-efficiency PV-based microgrids require maximum power point tracking (MPPT) controllers to maximize the harvested energy due to the nonlinearity in PV module characteristics. Perturb and observe (P&O) techniques, although thoroughly investigated in previous research, still suffer from several disadvantages, such as sustained oscillation around the MPP, fast tracking versus oscillation tradeoffs, and user predefined constants. In this paper, a modified P&O MPPT technique, applicable for PV systems, is presented. The proposed technique achieves: first, adaptive tracking; second, no steady-state oscillations around the MPP; and lastly, no need for predefined system-dependent constants, hence provides a generic design core. A design example is presented by experimental implementation of the proposed technique. Practical results for the implemented setup at different irradiance levels are illustrated to validate the proposed technique. [ABSTRACT FROM AUTHOR]

Differential-mode buck-boost inverters have merits such as reduced switch number, ability to provide voltages higher or lower than the input voltage magnitude, improved efficiency, reduced cost and size, and increased power density, especially in low-power applications. There are five buck-boost inverters that can provide flexible output voltage without the need of a large electrolytic input side capacitor, which degrades the reliability of inverters. The continuous input current of these inverters is appropriate for maximum power point tracking operation in photovoltaic and fuel cells applications. Three of the five inverters can be isolated with high-frequency-link transformers where the common-mode leakage current can be mitigated. However, the performance and control of such converters have not been discussed in detail. In this paper, the five possible single-stage three-phase differential-mode buck-boost inverters with continuous input current are investigated and compared in terms of total losses, maximum ripple current, total harmonic distortion, and device and passive element ratings. In addition, the possible methods are presented for eliminating the input third-order harmonic current, resulting from the stored energy in the passive elements, as well as the output second-order harmonic currents. The ability for isolating the input and output sides of the inverters with a small–high frequency transformers is discussed. A changeable-terminal 2.5-kW bidirectional inverter is used to validate the design flexibility of the inverter topologies, when digital signal processor-controlled. [ABSTRACT FROM AUTHOR]

The four-switch three-phase (FSTP) inverter has been proposed as an innovative inverter design to reduce the cost, complexity, size, and switching losses of the dc–ac conversion system. Traditional FSTP inverter usually operates at half the dc input voltage; hence, the output line voltage cannot exceed this value. This paper proposes a novel design for the FSTP inverter based on the topology of the single-ended primary-inductance converter (SEPIC). The proposed topology provides pure sinusoidal output voltages with no need for output filter. Compared to traditional FSTP inverter, the proposed FSTP SEPIC inverter improves the voltage utilization factor of the input dc supply, where the proposed topology provides higher output line voltage which can be extended up to the full value of the dc input voltage. The integral sliding-mode control is used with the proposed topology to optimize its dynamics and to ensure robustness of the system during different operating conditions. Derivation of the equations describing the parameters design, components ratings, and the operation of the proposed SEPIC inverter is presented in this paper. Simulation model and experimental setup are used to validate the proposed concept. Simulations and experimental results show the effectiveness of the proposed inverter. [ABSTRACT FROM AUTHOR]

A multilevel topology with medium-frequency ac link for medium-voltage grid integration of utility photovoltaic (PV) plants is discussed in this paper. A megawatt-scale PV plant is divided into many zones, each comprising of two series-connected arrays. Each zone employs a medium-frequency transformer with three secondaries, which interface with the three phases of the medium voltage grid. An insulated-gate bipolar transistor full-bridge inverter feeds the MF transformer. The voltages at the transformer secondaries are then converted to three-phase line frequency ac by three full-bridge ac-ac converters. Second line frequency harmonic power does not appear in the dc bus, thereby reducing the dc capacitor size. Cascading several such cells, a high-quality multilevel medium-voltage output is generated. A new control method is proposed for the cascaded multilevel converter during partial shading while minimizing the switch ratings. The proposed topology eliminates the need for line frequency transformer isolation and reduces the dc bus capacitor size, while improving the power factor and energy yield. This paper presents the analysis, design example, and operation of a 10-MW utility PV system with experimental results on a scaled-down laboratory prototype. [ABSTRACT FROM AUTHOR]

DC fault protection is one challenge impeding the development of multiterminal dc grids. The absence of manufacturing and operational standards has led to many point-to-point HVDC links built at different voltage levels, which creates another challenge. Therefore, the issues of voltage matching and dc fault isolation are undergoing extensive research and are addressed in this paper. A quasi two-level operating mode of the modular multilevel converter is proposed, where the converter generates a square wave with controllable dv/dt by employing the cell voltages to create transient intermediate voltage levels. Cell capacitance requirements diminish and the footprint of the converter is reduced. The common-mode dc component in the arm currents is not present in the proposed operating mode. The converter is proposed as the core of a dc to dc transformer, where two converters operating in the proposed mode are coupled by an ac transformer for voltage matching and galvanic isolation. The proposed dc transformer is shown to be suitable for high-voltage high-power applications due to the low-switching frequency, high efficiency, modularity, and reliability. The dc transformer facilitates dc voltage regulation and near instant isolation of dc faults within its protection zone. Analysis and simulations confirm these capabilities in a system-oriented approach. [ABSTRACT FROM AUTHOR]

An interline dynamic voltage restorer (IDVR) is invariably employed in distribution systems to mitigate voltage sag/swell problems. An IDVR merely consists of several dynamic voltage restorers (DVRs) sharing a common dc link connecting independent feeders to secure electric power to critical loads. While one of the DVRs compensates for the local voltage sag in its feeder, the other DVRs replenish the common dc-link voltage. For normal voltage levels, the DVRs should be bypassed. Instead of bypassing the DVRs in normal conditions, this paper proposes operating the DVRs, if needed, to improve the displacement factor (DF) of one of the involved feeders. DF improvement can be achieved via active and reactive power exchange (PQ sharing) between different feeders. To successfully apply this concept, several constraints are addressed throughout the paper. Simulation and experimental results elucidate and substantiate the proposed concept. [ABSTRACT FROM AUTHOR]