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In bridgeless power factor correction converters and inverters, GaN high-electron-mobility transistors (HEMTs) operate in both forward and reverse conduction modes, which may feature different dynamic on-resistance (RON) behaviors. Despite the extensive study of dynamic RON under forward conduction, dynamic RON under reverse conduction still demands comprehensive evaluation. In this letter, the dynamic RON of two commercial p-GaN gate HEMTs with different technologies under forward/reverse conduction and hard/soft switching is characterized using the custom-designed multigroup double pulse test system, which nearly eliminates the accumulated self-heating effect in the device. First, the test was conducted at off-state bias voltage = 400 V, IDS = 70% IDS(max). For the Schottky-type p-GaN gate HEMTs, the dynamic RON in reverse conduction is found to be more than 3%–5% higher compared to the forward conduction. However, for the hybrid-drain-embedded gate injection transistor, operating in reverse conduction mode leads to a slighter dynamic RON degradation effect, with a reduction of approximately 10% compared to the forward conduction. Next, IDS was modulated to evaluate its impact on dynamic RON. For both devices, during reverse conduction it was observed that the dynamic RON initially decreases and subsequently increases with the IDS increase.

The design of gate drivers for silicon carbide (SiC) power mosfets needs to address various adverse effects induced by the parasitic inductance in the gate loop, such as false turn-on, gate overstress, and reduced switching speed. In this work, a single-polarity gate driver design featuring a low-voltage (LV) gallium nitride (GaN) high-electron-mobility transistor (HEMT) for Miller clamping is presented. The lateral LV GaN HEMT can switch at a much higher speed than that of the SiC mosfet, so that the proposed gate driver can well suppress false turn-on with a user-friendly off-state gate voltage of 0 V. Meanwhile, the reverse-conduction characteristics of the LV GaN HEMT allow the clamping of negative voltage spikes to protect the SiC mosfet against gate overstress, which is shown to be detrimental to the gate reliability. In addition, the LV GaN HEMT can accelerate the turn-off process and suppress the gate-loop oscillation, thereby further reducing the switching loss, as verified by experiment results.