Search

Enhancement of dc bus voltage utilization for a five-level inverter with single dc source and capacitor-fed H-bridge (CHB) units is investigated in this paper. A carrier-based modulation technique is used for boosting the dc bus utilization, which is established by providing detailed mathematical analysis. The five-level inverter used here is realized by cascading a CHB unit to each phase of a three-level neutral point clamped inverter. The increase in dc bus voltage utilization owes to the pole voltage redundancies offered by CHB units. The floating capacitors of H-bridge units are balanced within a quarter fundamental cycle using the switching state redundancies of pole voltage levels. The aforementioned modulation technique allows the inverter to enhance the dc bus utilization from 0.577 $\text{V}_{\text{dc}}$ to 0.63 $\text{V}_{\text{dc}}$ under unity power factor. This enhancement is obtained in the linear modulation range without increasing the dc bus voltage, and thus, the inverter can operate without the presence of low-order harmonics in its phase voltages. The strength of this paper lies in its detailed mathematical analysis for finding out the limiting modulation index and power factor condition in the light of floating capacitor voltage balancing issue. Simulation as well as experimental verification of the modulation scheme is carried out on an induction motor drive under various operating conditions. It is shown that this carrier-based modulation technique is suitable for any single source inverter topology with one CHB unit per phase. [ABSTRACT FROM AUTHOR]

To support the development of high-frequency ac microgrids in terms of compact design, high-voltage gain and low total harmonic distortion (THD), a buck–boost dual-leg-integrated step-up inverter is proposed in this paper. The inverter is formed by integrating a buck–boost converter into a conventional single-phase full-bridge inverter by sharing the upper switch and the body diode of the lower switch in both bridge-legs. Consequently, the component count is significantly reduced over the step-up inverter counterparts. In addition, to address the drawbacks of hybrid modulation methods adopted by existing dual-leg-integrated inverters, such as double-variable control, and high THD of output voltage/current at high input voltage and heavy load conditions, unipolar frequency doubling sinusoidal pulse width modulation scheme is adopted in this inverter. As a result, the modulation ratio M becomes the only control variable to regulate the output voltage/current and the control is simplified. The THD of the proposed inverter output can remain low throughout the entire input voltage range and load power range. This paper presents the topology derivation procedure, operation principle, and steady-state characteristics of the proposed inverter. To validate the effectiveness of theory, experimental results of a 400 W hardware prototype, where the output voltage frequency is at 500 Hz, are reported. [ABSTRACT FROM PUBLISHER]

This paper analyzes the benefits of the active damping applied to transformerless three-phase grid-connected photovoltaic (PV) inverters using modified LCL (MLCL) filter for leakage current reduction. In comparison with passive damping techniques, the active damping can reduce the MLCL filter resonance peaks, improving the dynamic performance of the control system without addition of power losses. Besides these classical advantages, this paper demonstrates that the active damping also contributes for PV leakage current reduction, preserving the high-frequency attenuation of the MLCL filter. Additionally, an active damping for the inverter common-mode circuit is also proposed, reducing the low-frequency leakage current caused by the common-mode signal used to extend the inverter modulation index. Experimental results are given to demonstrate the leakage current reduction and the grid current control for a 10 kW PV inverter. [ABSTRACT FROM PUBLISHER]

In this paper, a technique of variable-turns-ratio high-frequency link inverter is proposed to provide a simple method to achieve multi-level outputs for the isolated single-stage high-frequency link inverters. By dynamically adjusting the turns ratio of transformer, five-level (±2, ±1, and 0) outputs can be achieved to improve the current quality. The single transformer, compared with the existing two-level high-frequency link inverter, is employed in the structure and only a few auxiliary devices are added, where the added circuit operates at low frequency and the power density is refined. Based on this technique, the single-stage active clamped forward grid-connected inverter with variable turns ratio is taken as an example to better illustrate the analysis process and a 1000-W prototype is designed and established to evaluate the output performance. The conducted simulation results and prototype tests verify the feasibility of the proposed single-stage variable-turns-ratio high-frequency link grid-connected inverter. [ABSTRACT FROM AUTHOR]

In this paper, a new space vector pulse width modulation method to extend the linear modulation range of a cascaded five level inverter topology with a single dc supply is presented. Using this method, the inverter can be controlled linearly and the peak phase fundamental output voltage of the inverter can be increased from 0.577 to 0.637 V\text{dc} without increasing the dc bus voltage and without exceeding the induction motor voltage rating. This new technique makes use of cascaded inverter pole voltage redundancy and property of the space vector structure for its operation. Using this, the induction motor drive can be operated till the full speed range (0–50 Hz) with the elimination of lower order harmonics in the phase voltage and phase current. The five-level topology presented in this paper is realized by cascading a two-level inverter and two full bridge modules with floating capacitors. The inverter topology and its operation for extending the modulation range is analyzed extensively. Simulation and experimental results for both steady-state and dynamic operating conditions are presented in this paper. [ABSTRACT FROM AUTHOR]

Increasing demands for power supplies have contributed to the population of high-frequency ac (HFAC) power distribution system (PDS), and in order to increase the power capacity, multilevel inverters (MLIs) frequently serving as the high-frequency (HF) source-stage have obtained a prominent development. Existing MLIs commonly use more than one voltage source or a great number of power devices to enlarge the level numbers, and HF modulation (HFM) methods are usually adopted to decrease the total harmonic distortion (THD). All of these have increased the complexity and decreased the efficiency for the conversion from dc to HF ac. In this paper, a nine-level inverter employing only one input source and fewer components is proposed for HFAC PDS. It makes full use of the conversion of series and parallel connections of one voltage source and two capacitors to realize nine output levels, thus lower THD can be obtained without HFM methods. The voltage stress on power devices is relatively relieved, which has broadened its range of applications as well. Moreover, the proposed nine-level inverter is equipped with the inherent self-voltage balancing ability, thus the modulation algorithm gets simplified. The circuit structure, modulation method, capacitor calculation, loss analysis, and performance comparisons are presented in this paper, and all the superior performances of the proposed nine-level inverter are verified by simulation and experimental prototypes with rated output power of 200 W. The accordance of theoretical analysis, simulation, and experimental results confirms the feasibility of proposed nine-level inverter. [ABSTRACT FROM AUTHOR]

Impedance-source networks are an increasingly popular solution in power converter applications, especially in single-stage buck–boost power conversion to avoid additional front-end dc–dc power converters. In the survey papers published, no analytical comparisons of different topologies have been described, which makes it difficult to choose the best option. Thus, the aim of this paper is to present a comprehensive analytical comparison of the impedance-source-based buck–boost inverters in terms of passive component count and semiconductor stress. Based on the waveform of the input current, i.e., with or without a transformer, and with or without inductor coupling, the impedance-source converters are classified. The main criterion in our comprehensive comparison is the energy stored in the passive elements, which is considered both under constant and predefined high frequency current ripple in the inductors and the voltage ripple across the capacitors. Two-level and multilevel solutions are described. The conclusions provide a “one-stop” information source and a selection guide of impedance-source-based buck–boost inverters for different applications. [ABSTRACT FROM PUBLISHER]

In this paper, a new hybrid modulation fault-tolerant control of an open-end winding linear vernier permanent-magnet (OEW-LVPM) motor is proposed. By using a floating capacitor inverter, the proposed OEW-LVPM motor drive can continue operation under open-circuit fault condition. The OEW-LVPM motor fed by dual-inverter system consists of two inverters, which are connected to both ends of the motor windings, including a dc power named as main inverter (MI) and a floating capacitor called as capacitor inverter (CI). When one switch is broken in the CI, the CI topology will be restructured to a three-phase four-switch inverter. Then, an improved six-step modulation is investigated in the MI to reduce the switching frequency, while the conventional modulation is applied in the CI. Thus, the MI can provide all the active power, and the CI is only used to supply the reactive power. The proposed fault-tolerant control method is simulated and the experiments with the OEW-LVPM motor drive are also accomplished to verify the feasibility. [ABSTRACT FROM AUTHOR]

Transformerless photovoltaic (PV) grid-connected inverters have become more and more popular in distributed PV power generation systems due to the advantages on high efficiency, low cost, and small size. However, common-mode (CM) current in the transformerless PV inverters can result in serious electromagnetic interference and insecurity, which will further reduce the reliability of the PV inverter systems. In this paper, an improved H5 topology, namely H5-D topology, is proposed, in which a clamping diode is added on the basis of H5 topology to eliminate the CM voltage fluctuation in H5 topology. Further, the PSIM simulation results of the H5-D topology and H5 topology are given and compared, especially, the performance of H5-D topology for CM current suppression is presented and analyzed concretely. Finally, the experimental prototypes of the H5-D topology and H5 topology are built and tested, and the experimental results validate the advantages of the H5-D topology. The proposed H5-D topology provides a new practical topology for distributed PV grid-connected power generation systems. [ABSTRACT FROM AUTHOR]

This paper proposes a control method for a five-level hybrid flying-capacitor (5L-HFC) inverter, of which structure stems from the conventional five-level active neutral-point-clamped (5L-ANPC) topology by dividing the dc-link stage into three series-connected capacitors. In this inverter, the voltage stress on the power switches connected to the dc link is reduced by a half compared with that of the 5L-ANPC topology, thus the lower number of equally voltage-rated power devices can be employed. Also, the power losses in the 5L-HFC inverter are more evenly distributed than in the 5L-ANPC. In order to balance the dc-link capacitor voltages, a third-order harmonic offset injection is applied. When a diode rectifier is used to supply the dc bus voltage, the balancing method is not effective if the modulation index is higher than 0.64. Thus, an auxiliary circuit is needed to support the balancing of the dc-link capacitor voltages. However, the unbalancing problem can be overcome in a full-range operation without the auxiliary circuit if the back-to-back configuration is utilized. Finally, simulation and experiment results have verified the performance of the 5L-HFC inverter with the proposed control method. [ABSTRACT FROM AUTHOR]

Owing to low cost, small size, and low weight, transformerless inverters became prominent in single-phase grid connected photovoltaic (PV) systems. Key issues pertaining to these inverters include suppression of common mode (CM) leakage current and improvement of conversion efficiency. Achieving higher efficiency in single-phase grid-connected photovoltaic systems depends on the number of stages involved in feeding power to the grid, predominantly, if the PV array voltage is less than the peak value of the grid voltage. In this paper, an integrated dc–dc converter based grid-connected transformerless PV inverter is proposed which is aimed at maintaining high efficiency, even if the PV array voltage falls below the peak value of grid voltage (efficient operation at an extended input voltage range). A modulation strategy is discussed in order to minimize the flow of CM leakage current. Further, the efficiencies of certain transformerless inverter topologies are analyzed and compared with that of the proposed topology. Detailed simulation studies are carried out in MATLAB/Simulink environment to verify the analysis. Experimental results for a scaled down laboratory prototype are included as a proof-of-concept to validate the claims. [ABSTRACT FROM AUTHOR]

This paper presents a new application of power and voltage balance control schemes for the cascaded H-bridge multilevel inverter (CHMI)-based solid-state transformer (SST) topology. To reduce load on the controller and simplify modulation algorithm, a master–slave control (MSC) strategy is designed for the dual active bridge (DAB) stage. The master controller executes all control and modulation calculations, and the slave controllers manage only device switching and protection. Due to the inherent power and dc-link voltage unbalance in cascaded H-bridge-based SST, this paper presents a compensation strategy based on three-phase dq decoupled current controller. An optimum zero-sequence component is injected in the modulation scheme so that the three-phase grid currents are balanced. Furthermore, to tightly regulate the output voltage of all the DAB modules to target value, a dynamic reference voltage method is also implemented. With this proposed control method, the three-phase grid currents and dc-link voltage in each module can be simultaneously balanced. Finally, simulation and experimental results are presented to validate the performance of the controller and its application to microgrid SST. [ABSTRACT FROM PUBLISHER]

This paper presents and compares control strategies for three-phase open-end winding drives operating in the flux-weakening region. A six-leg inverter with a single dc link is associated with the machine in order to use a single energy source. With this topology, the zero-sequence circuit has to be considered since the zero-sequence current can circulate in the windings. Therefore, conventional overmodulation strategies are not appropriate when the machine enters in the flux-weakening region. A few solutions dealing with the zero-sequence circuit have been proposed in the literature. They use a modified space vector modulation or a conventional modulation with additional voltage limitations. This paper describes the aforementioned strategies, and then, a new strategy is proposed. This new strategy takes into account the magnitudes and phase angles of the voltage harmonic components. This yields better voltage utilization in the dq frame. Furthermore, inverter saturation is avoided in the zero-sequence frame, and therefore, zero-sequence current control is maintained. Three methods are implemented on a test bed composed of a three-phase permanent-magnet synchronous machine, a six-leg inverter, and a hybrid digital signal processor /field-programmable gate array controller. Experimental results are presented and compared for all strategies. A performance analysis is conducted as regards the region of operation and the machine parameters. [ABSTRACT FROM AUTHOR]

Microinverters for grid-connected photovoltaic (PV) power conversion systems often require voltage boost due to the low dc voltage of the PV panels. A high-frequency (HF) transformer-isolated differential-mode Ćuk inverter (DMCI) is an attractive topology due to its inherent voltage boost capability and high power density. One of the significant operational issue of the DMCI addressed in this paper is the presence of lower order harmonic distortion in the injected grid current. It is shown that lower order odd and even harmonic voltages are generated with this topology. This problem is accentuated due to the low damping offered by the grid to harmonic voltages. A systematic low-complexity control design is proposed to address this issue. It is shown experimentally that the DMCI operates stably with effective attenuation of the lower order harmonics using the proposed design. Practical operational issues of the DMCI with fast switching GaN field-effect transistor (FET) devices are analyzed and solutions are proposed. It is shown that there can be significant HF noise generation in the DMCI with a frequency range higher than the switching frequency. Practical solutions for resolving HF issues using a combination of circuit layout design and additional passive components are proposed and validated. All of the experimental results are demonstrated on a 500-W GaN-FET-based microinverter prototype. [ABSTRACT FROM PUBLISHER]

Several single-stage topologies have been introduced since kicking off the three-phase Z-source inverter (ZSI), and among these topologies, the quasi-ZSI (qZSI) is the most common one due to its simple structure and continuous input current. Furthermore, different modulation strategies, utilizing multiple reference signals, have been developed as well. However, prior art modulation methods have some demerits, such as the complexity of generating the gate signals, the increased number of switch commutations with continuous commutation at high current level during the entire fundamental cycle, and the multiple commutations at a time. Hence, this paper proposes two modified space vector modulation strategies, aimed at the reduction of the qZSI number of switch commutations at high current level for shorter periods during the fundamental cycle, i.e., reducing the switching loss, simplifying the generation of the gate signals by utilizing only three reference signals, and achieving a single-switch commutation at a time. These modulation strategies are analyzed and compared to the conventional ones, where a reduced-scale 1-kVA three-phase qZSI is designed and simulated using these different modulation strategies. Finally, the 1-kVA three-phase qZSI is implemented experimentally to validate the performance of the proposed modulation strategies and verify the reported analysis. [ABSTRACT FROM PUBLISHER]

This paper discusses the operation of a single-stage, isolated, high-frequency ac-link-based single-phase dc–ac converter, suitable for photovoltaic microinverter applications, controlled using phase modulation of the secondary-side cycloconverter devices. A detailed analysis is presented explaining the impact of prominent circuit nonidealities such as device capacitance and transformer leakage inductance on circuit behavior. The proposed extended-dead-time based modulation scheme helps in achieving zero-voltage-switching of the primary devices over the entire line cycle of the ac output and also offers the benefit of reduced transformer rms current due to absence of circulating current in the zero state. A flyback-based regenerative clamp circuit is used for mitigating voltage spikes on the secondary devices arising due to leakage inductance induced oscillations. A generic commutation strategy is also discussed, which makes operation with nonunity power factor loads also possible. Experimental results on a 260-W laboratory prototype under different load conditions are presented to illustrate the discussed principles and highlight the performance improvements. [ABSTRACT FROM PUBLISHER]

Flying capacitor photovoltaic (PV) inverters have been widely discussed in the literature. However, the relevant leakage current issues have not received much attention. In this paper, the modulation techniques for a transformerless three-phase flying capacitor PV inverter are investigated for the leakage current suppression. First, the theoretical analysis of the system common mode model and leakage current is presented. Second, three kinds of conventional carrier-based modulation techniques are evaluated, and results indicate that they fail to effectively suppress the leakage current. Third, a new carrier modulation and logic function is presented. It is able to maintain the constant common mode voltage, and consequently, the leakage current can be significantly reduced. Finally, the experimental tests are conducted on a transformerless three-phase flying capacitor PV inverter to verify the effectiveness of the proposed method. [ABSTRACT FROM PUBLISHER]

In the past two decades, the operating voltage of photovoltaic (PV) installation has increased in order to reduce current ratings and system installation costs. Such a large number of PV panels in series (e.g., 1000–1500 V systems) lead to wide variations of PV voltage due undesirable effects such as shading, soiling/dust, aging, and hot surface temperature. A partial shade would normally shut down solar inverters, unless a boost stage is added to the system input to ensure a proper dc-link operating voltage for the inverter. A boost input stage can double the input voltage operating range to extract maximum power under any possible shading and temperature condition. In this paper, a new PV string boost topology arrangement is proposed in the form of a miniboost used for three-phase grid-connected converters. The string miniboost increases the dc voltage range to extend power extraction under shading and low irradiance conditions and only requires to process a fraction of the rated power. The proposed cost-effective solution is further improved by using the inverter peak power envelope at boundary operation, resulting in expanded energy extraction beyond existing techniques. A design procedure to optimally size the miniboost and the peak-power envelope is presented along with a comparative analysis, under different irradiance levels, to illustrate the advantages in energy extraction obtained with the proposed PV string miniboost solution under low voltage and boundary operation. Furthermore, improved efficiency operation schemes and issues of common-mode current are discussed, and three mitigation design techniques intended for three-phase, three-level inverter transformerless topology are presented. Simulations and experimental results using a dual miniboost dc–dc stage and three-phase three-level neutral point clamped inverter are presented to validate the proposed dc-bus extension range and system design. [ABSTRACT FROM AUTHOR]

Multilevel inverters are receiving more attentions nowadays as one of preferred solutions for medium- and high-power applications. As one of the most popular hybrid multilevel inverter topologies, the five-level active-neutral-point-clamped inverter (5L-ANPC) combines the features of the conventional flying-capacitor type and neutral-point-clamped (NPC) type inverter and was commercially used for industrial applications. In order to further decrease the number of active switches, this paper proposes a seven-switch 5L-ANPC (7S-5L-ANPC) topology, which employs only seven active switches and two discrete diodes. The analysis has shown a lower current rating can be selected for the seventh switch under high power factor condition, which is verified by simulation results. The modulation strategy for 7S-5L-ANPC inverter is discussed. A 1 kVA single-phase experimental prototype is built to verify the validity and flexibility of the proposed topology and modulation method. [ABSTRACT FROM AUTHOR]

Large-scale photovoltaic (LSPV) energy conversion systems have been installed at many places across the world. The essential component of the LSPV system is the dc–ac conversion stage. The usage of multilevel converters is one of the recent advances in the dc–ac conversion stage of the LSPV system to enable transformer-less inversion. Current-fed multilevel inverter has been chosen in this paper as it provides high power inversion with inherent voltage boosting, and thus, avoids the usage of transformer. High power conversion necessitates low device switching frequency operation in order to satisfy thermal constraint of semiconductor devices and also to improve efficiency. However, low device switching frequency operation leads to higher harmonic distortion of inverter output currents. Synchronous optimal pulsewidth modulation (SOP) technique is an emerging low device switching frequency modulation technique that has been successfully implemented for voltage-source multilevel inverters. However, the state-of-the-art SOP technique cannot be directly applied to modulate current-source multilevel inverter topologies due to additional constraints on the switching commutations. Therefore, the purpose of our study was to propose a modified SOP technique to achieve: low device switching frequency and minimal harmonic distortion of inverter output currents. The topology of current-fed five-level inverter was used for demonstrating the performance of proposed technique. A generalized conversion method was introduced in the modified SOP technique for including switching constraints of the current-fed inverter. In addition, a state-sequencing machine was developed by utilizing redundant inverter states to produce equal switching commutation among all semiconductor devices at minimal switching frequency of 350 Hz. The experimental results obtained from the five-level current-source inverter of 1.2 kW demonstrated the effectiveness of the proposed SOP technique. [ABSTRACT FROM AUTHOR]

This paper presents a three-phase multilevel quasi-Z-source inverter (qZSI) topology operating in normal and fault-tolerant operation mode. This structure is composed by two symmetrical quasi-Z-source networks and a three-phase T-type inverter. Besides the intrinsic advantages of multilevel voltage source inverters, the proposed structure is also characterized by their semiconductor fault tolerance capability. This feature is only obtained through changes on the modulation scheme after the semiconductor fault and does not require additional extra-phase legs or collective switching states. In certain fault types, the reduction of the output power capacity will be compensated by the boost characteristic of the qZSI. The fault-tolerant behavior of the proposed topology is demonstrated by several simulation results of the converter in normal and fault condition. To validate the characteristics of this multilevel qZSI, an experimental prototype was also built to experimentally confirm the results. [ABSTRACT FROM PUBLISHER]

Dual-buck inverters feature some attractive merits, such as no reverse recovery issues of the body diodes and free of shoot-through. However, since the filter inductors of dual-buck inverters operate at each half cycle of the utility grid alternately, the inductor capacity of dual-buck inverters is twice as much as H-bridge inverters. Thus, the power density of dual-buck converters needs to be improved, as well as the conversion efficiency. In this paper, the detailed derivation process of two five-level full-bridge topology generation rules are presented and explained. One is the combination of a conventional three-level full-bridge inverter, a two-level capacitive voltage divider, and a neutral point clamped branch. The other method is to combine a three-level half-bridge inverter and a two-level half-bridge inverter. Furthermore, in order to enhance the reliability of existing five-level DBFBI topologies, an extended five-level DBFBI topology generation method is proposed. The two-level half-bridge inverter is replaced by a two-level dual-buck half-bridge inverter; thus, a family of five-level DBFBI topologies with high reliability is proposed. The operation modes, modulation methods, and control strategies of the series-switch five-level DBFBI topology are analyzed in detail. The power device losses of the three-level DBFBI topology and five-level DBFBI topologies, with different switching frequencies, are calculated and compared. Both the relationship between the neutral point potential self-balancing and the modulation index of inverters are revealed. A universal prototype was built up for the experimental tests of the three-level DBFBI topology, the five-level H-bridge inverter topology, and the existing three five-level DBFBI topologies. Experimental results have shown that the five-level DBFBI topologies exhibit higher efficiency than the five-level H-bridge inverter topology and the three-level DBFBI topology. As well, the higher power density has been achieved by the five-level DBFBI topologies compared with the three-level DBFBI topology. [ABSTRACT FROM AUTHOR]

Neutral point (NP) balancing problems in neutral-point-clamped (NPC) three-level inverters have been widely discussed in the past. Most of the previous researches have focused on the active NP control algorithms based on the common-mode duty cycle injection or the differential-mode harmonic current injection. Various active control methods have been proven to work well in real applications. On the other hand, it is well known that sometimes the NP is self-balanced, even without any active NP control. However, due to the uncertainty and lack of the theoretical explanations, active NP controllers are typically preferred for real applications, and the self-balancing characteristic of the NPC topology did not draw much attention in the past. Our paper covers this gap: the mechanisms of self-balancing characteristic are explored systematically. With the help of a precise mathematical model, readers can easily evaluate the self-balancing capability of their own design. In addition, this paper discusses some methods to enhance the self-balancing capability of an existing system. It is shown here that the self-balancing effect depends strongly on the switching frequency. Especially, for high-power insulated gate bipolar transistor/integrated gate-commutated thyristor/gate turn-OFF thyristors (IGBT/IGCT/GTO) applications, the effect is so strong at all power factors that this “do-nothing” control is sufficient and no other active NP controls are needed. [ABSTRACT FROM AUTHOR]

Eliminating the leakage current is one of the most important issues for transformerless three-phase photovoltaic (PV) systems. In this paper, the leakage current elimination of a three-phase four-leg PV inverter is investigated. With the common-mode loop model established, the generation mechanism of the leakage current is clearly identified. Different typical carrier-based modulation methods and their corresponding common-mode voltages are discussed. A new modulation strategy with Boolean logic function is proposed to achieve the constant common-mode voltage for the leakage current reduction. Finally, the different modulation methods are implemented and tested on the TMS320F28335 DSP +XC3S400 FPGA digital control platform. The experimental results verify the effectiveness of the proposed solution. [ABSTRACT FROM PUBLISHER]

Three-phase differential-mode inverters are single-stage inverters, which have the potential to reduce the number of devices and cost with higher power density. Among such inverter topologies, differential-mode three-phase Ćuk inverter (DTCI) has some advantage over other topologies, including modularity, lower number of switches, bidirectional power flow capability, and galvanic isolation. DTCI is a promising configuration for renewable-/alternative-energy applications with isolated and nonisolated structures. The continuous modulation scheme (CMS), which was introduced originally for the DTCI, activates all of three modules of the inverter. CMS increases the circulating power in modules and hence increases inverter power loss. This paper describes a discontinuous modulation scheme (DMS) for the DTCI which deactivates one module at a time resulting in a discontinuous operation of the inverter modules. The experimental open- and closed-loop results of DMS- and CMS-based DTCI are provided and compared. DMS reduces the circulating power, device voltage ratings, and mitigates the DTCI losses. The DTCI exhibits a nonlinear voltage gain with both DMS and CMS. It has been demonstrated that by feed-forwarding the input voltage and incorporating a static linearization method, the harmonic distortion of the output voltage is considerably reduced. [ABSTRACT FROM PUBLISHER]

In this paper, the performance of the new three-dimensional space vector-based switching signal generation technique for a grid-connected four-leg voltage source inverter used as a shunt compensator is proposed. The shunt compensator can be used for reactive power compensation, harmonic elimination, load balancing, and neutral current elimination in a three-phase four-wire grid-connected system. It is shown through experimental studies that switching losses in the four-leg voltage source inverter are appreciably reduced to a maximum of 33% in three-dimensional space vector modulation without NULL vector as the number of switches controlled at any instant of time is six out of eight. The new proposed technique is compared with three-dimensional space vector modulation with null vector. Experimental results are given to show the validity of the proposed switching control strategy. [ABSTRACT FROM AUTHOR]

This paper proposes a new topology named the active-switched-capacitor/switched-inductor quasi-Z -source inverter (ASC/SL-qZSI), which is based on a traditional qZSI topology. Compared to other qZSI-based topologies under the same operating conditions, the proposed ASC/SL-qZSI provides higher boost ability, requires fewer passive components such as inductors and capacitors, and achieves lower voltage stress across the switching devices of the main inverter. Another advantage of the topology is its expandability. If a higher boosting rate is required, additional cells can easily be cascaded at the impedance network by adding one inductor and three diodes. Both the simulation studies and the experimental results obtained from a prototype built in the laboratory validate proper operation and performance of the proposed ASC/SL-qZSI. [ABSTRACT FROM AUTHOR]

In this paper, a new configuration of a three-phase five-level multilevel voltage-source inverter is introduced. The proposed topology constitutes the conventional three-phase two-level bridge with three bidirectional switches. A multilevel dc link using fixed dc voltage supply and cascaded half-bridge is connected in such a way that the proposed inverter outputs the required output voltage levels. The fundamental frequency staircase modulation technique is easily used to generate the appropriate switching gate signals. For the purpose of increasing the number of voltage levels with fewer number of power electronic components, the structure of the proposed inverter is extended and different methods to determine the magnitudes of utilized dc voltage supplies are suggested. Moreover, the prototype of the suggested configuration is manufactured as the obtained simulation and hardware results ensured the feasibility of the configuration and the compatibility of the modulation technique is accurately noted. [ABSTRACT FROM AUTHOR]

The Z-source inverter is a relatively recent converter topology that exhibits both voltage-buck and voltage-boost capability. The Z-source concept can be applied to all dc-to-ac, ac-to-dc, ac-to-ac, and dc-to-dc power conversion whether two-level or multilevel. However, multilevel converters offer many benefits for higher power applications. Previous publications have shown the control of a Z-source neutral point clamped inverter using the carrier-based modulation technique. This paper presents the control of a Z-source neutral point clamped inverter using the space vector modulation technique. This gives a number of benefits, both in terms of implementation and harmonic performance. The adopted approach enables the operation of the Z-source arrangement to be optimized and implemented digitally without introducing any extra commutations. The proposed techniques are demonstrated both in simulation and through experimental results from a prototype converter. [ABSTRACT FROM AUTHOR]

In this paper, a novel single-phase five-level inverter is proposed using coupled inductors. This inverter can output five-level voltage with only one dc source. No split of the dc voltage capacitor is needed, totally avoiding the voltage balancing problem in conventional multilevel inverters. The level of the output voltage is only half of the dc-link voltage in all conditions, leading to much reduced dv/dt . This inverter is based on the widely used three-arm power module and the voltage stresses on all the power switches are the same, making it very easy to construct. Operation mechanism of this inverter is analyzed and the possible switching patterns are investigated. Based on these analyses, a novel optimized modulation scheme is presented. With this modulation method, no dc components exist in the inductor currents, which is very helpful for minimization of the inductors. Simulation and experimental results show the validity of the proposed inverter together with the optimized modulation scheme. [ABSTRACT FROM AUTHOR]

This paper proposes a bidirectional buck-boost cascade inverter and presents its modeling and control methods. The proposed inverter can be seen as the cascade of a buck converter and a boost converter, both with bipolar outputs. The buck stage maintains the main inductor current and the boost stage controls the output voltage to track a given reference. With detailed analysis, the switching function model is established, which reveals that the inverter has an extra control freedom for achieving high performance. Then, the averaged model for control is given and thereby the buck-boost capability is proven. Afterward, utilizing the feedforward compensation technique, a decoupled control scheme is designed. A new modulation strategy is also proposed to minimize the dead time effect. By simulations and experiments, it is verified that the proposed system possesses the following features: 1) bidirectional operation with bipolar buck-boost output voltage; 2) reduced output distortion due to advanced modulation minimizing the dead time effect; 3) reduced size and weight with only one main energy storage component; 4) decoupled linear controller design; and 5) good steady-state and dynamic performance including wide operation range, strong robustness to load and input voltage variations, fast dynamic response, and excellent overload protection. [ABSTRACT FROM AUTHOR]

A multilevel inverter topology for seven-level space vector generation is proposed in this paper. In this topology, the seven-level structure is realized using two conventional two-level inverters and six capacitor-fed H-bridge cells. It needs only two isolated dc-voltage sources of voltage rating Vdc/2 where Vdc is the dc voltage magnitude required by the conventional neutral point clamped (NPC) seven-level topology. The proposed topology is capable of maintaining the H-bridge capacitor voltages at the required level of Vdc/6 under all operating conditions, covering the entire linear modulation and overmodulation regions, by making use of the switching state redundancies. In the event of any switch failure in H-bridges, this inverter can operate in three-level mode, a feature that enhances the reliability of the drive system. The two-level inverters, which operate at a higher voltage level of Vdc /2, switch less compared to the H-bridges, which operate at a lower voltage level of Vdc/6, resulting in switching loss reduction. The experimental verification of the proposed topology is carried out for the entire modulation range, under steady state as well as transient conditions. [ABSTRACT FROM AUTHOR]

A novel H-bridge multilevel pulsewidth modulation converter topology based on a series connection of a high-voltage diode-clamped inverter and a low-voltage conventional inverter is proposed in this paper. A dc link voltage arrangement for the new hybrid and asymmetric solution is presented to have a maximum number of output voltage levels by preserving the adjacent switching vectors between voltage levels. Hence, a 15-level hybrid converter can be attained with a minimum number of power components. A comparative study has been carried out to present high performance of the proposed configuration to approach a very low total harmonic distortion of voltage and current, which leads to the possible elimination of the output filter. Regarding the proposed configuration, a new cascade inverter is verified by cascading an asymmetrical diode-clamped inverter, in which 19 levels can be synthesized in output voltage with the same number of components. To balance the dc link capacitor voltages for the maximum output voltage resolution as well as synthesize asymmetrical dc link combination, a new multi-output boost converter is utilized at the dc link voltage of a seven-level H-bridge diode-clamped inverter. Simulation and hardware results based on different modulations are presented to confirm the validity of the proposed approach to achieve a high-quality output voltage. [ABSTRACT FROM PUBLISHER]