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Modular multilevel converters have become the prominent topology for medium- and high-voltage applications. The performance of these converters highly depends on the accuracy of the used modulation approach, for which the capacitor voltage of submodules (SM) are usually assumed to be equal. This article exhibits that ignoring the capacitor voltage differences among SMs adversely affects the system performance. This becomes more obvious the larger the capacitor voltage differences are. Hence, this article proposes a more accurate feedforward modulation approach that takes into account either the instantaneous capacitor voltage value and the real output voltage in the modulation stage. As a result, in applications where larger SM voltage differences are expected, the current distortion and control performance are improved. Particularly, switching–saving approaches benefit from this method as it enables their operation with reduced switching losses without the downsides of increased distortion due to capacitor voltage differences. The proposed approach is analyzed and compared with the nearest-level modulation and with the level-shift PWM. Simulations and experimental validation are presented to confirm the effectiveness of the proposed technique. [ABSTRACT FROM AUTHOR]

This article proposes a new control method for modular multilevel converter (MMC), which is based on a modification of the conventional nearest level control (NLC) scheme implemented by a model predictive control (MPC) technique. Applying the proposed method, the simplicity of the NLC is maintained while the current control ability in terms of both phase current and circulating current is enhanced by the MPC technique. A proper rounding function is used for each arm of the MMC instead of the conventional nearest integer function. The rounding function is determined by evaluating a cost function within the frame of MPC. To validate the proposed technique, a three-phase MMC prototype is employed. The conventional NLC-based control approach of MMC is also evaluated for comparative purposes. Results show that the proposed method exhibits excellent current-regulating ability. Compared with the conventional control scheme, the overall performance is improved without significantly increasing the computational burden or adding relevant complexity to the control system design. [ABSTRACT FROM AUTHOR]

This article presents a dc solid state transformer based on three-level power module (PM) (TL-DCSST) for interconnection of medium-voltage dc (MVdc) and low-voltage dc distribution system. The proposed TL-DCSST adopts the low-voltage insulated-gate bipolar transistor (IGBTs) with excellent switching characteristics to build medium voltage PM and reduces the number of medium frequency transformer (MFT). This topology features inherent antibias mechanism for MFTs on the primary side, which saves the resonant capacitor at primary side. Meanwhile, the active front end is integrated to realize voltage and power regulation, low voltage ride-through and DC fault handling for MVdc side. In this article, the topology, operation principle, interleaving modulation, circuit parameter design, and control schemes are presented and analyzed comprehensively. At last, a prototype rated at 7 kW has been built and tested, and the experimental results verify effectiveness of the proposed TL-DCSST. [ABSTRACT FROM AUTHOR]

This paper proposes a novel control strategy for three-level neutral-point-clamped (NPC) power converter. The proposed control scheme consists of three control loops, i.e., instantaneous power tracking control loop, voltage regulation loop, and voltage balancing loop. First, in the power tracking control loop, a set of adaptive sliding mode controllers are established to drive the active and reactive power tracking to their desired values via radial basis function neural network technology. In the voltage regulation loop, an efficient but simple adaptive controller is designed to regulate dc-link output voltage where the load is considered as an external disturbance. Moreover, a composite controller is developed in the voltage balancing loop to ensure imbalance voltages between two dc-link capacitors close to zero, in which a reduced-order observer is used to estimate sinusoidal disturbance improving the converter performance. The effectiveness and superiority of the proposed control strategy for the NPC power converter are compared with other control schemes through experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes generation of a 15-level (14 concentric) dodecagonal voltage space vector structure (DVSVS) for a star connected induction motor drive. The proposed multilevel DVSVS is obtained by cascading two inverters, namely a primary and secondary inverter. The primary inverter is a five-level (5L) structure formed by stacking two three-level flying capacitors with individual reduced dc sources and the secondary inverter is also a 5L structure formed by cascading two capacitor-fed cascaded H-bridges (CHB). The active power is supplied by the primary inverter, while the secondary inverter acts as switched capacitor harmonics filter, and capacitors in the secondary inverter are balanced naturally irrespective of load power factor for entire modulation index. The high-voltage dc supply fed primary inverter is operated in quasi-square wave mode, while the high frequency switching is applied to low voltage CHBs, thus, reducing the overall switching loss. The proposed scheme gives the advantages of both DVSVS and multilevel structure, thus, making it one of the solutions for battery or stacked dc-fed applications. The paper also presents the experimental results as well as comparison study with the existing topologies to support the advantages of proposed scheme. [ABSTRACT FROM AUTHOR]

A multilevel inverter for generating 17 voltage levels using a three-level flying capacitor inverter and cascaded H-bridge modules with floating capacitors has been proposed. Various aspects of the proposed inverter like capacitor voltage balancing have been presented in the present paper. Experimental results are presented to study the performance of the proposed converter. The stability of the capacitor balancing algorithm has been verified both during transients and steady-state operation. All the capacitors in this circuit can be balanced instantaneously by using one of the pole voltage combinations. Another advantage of this topology is its ability to generate all the voltages from a single dc-link power supply which enables back-to-back operation of converter. Also, the proposed inverter can be operated at all load power factors and modulation indices. Additional advantage is, if one of the H-bridges fail, the inverter can still be operated at full load with reduced number of levels. This configuration has very low dv/dt and common-mode voltage variation. [ABSTRACT FROM AUTHOR]

A three-level common-mode voltage eliminated inverter with single dc supply using flying capacitor inverter and cascaded H-bridge has been proposed in this paper. The three phase space vector polygon formed by this configuration and the polygon formed by the common-mode eliminated states have been discussed. The entire system is simulated in Simulink and the results are experimentally verified. This system has an advantage that if one of devices in the H-bridge fails, the system can still be operated as a normal three-level inverter at full power. This inverter has many other advantages like use of single dc supply, making it possible for a back-to-back grid-tied converter application, improved reliability, etc. [ABSTRACT FROM AUTHOR]

In this paper, a new three-phase, five-level inverter topology with a single-dc source is presented. The proposed topology is obtained by cascading a three-level flying capacitor inverter with a flying H-bridge power cell in each phase. This topology has redundant switching states for generating different pole voltages. By selecting appropriate switching states, the capacitor voltages can be balanced instantaneously (as compared to the fundamental) in any direction of the current, irrespective of the load power factor. Another important feature of this topology is that if any H-bridge fails, it can be bypassed and the configuration can still operate as a three-level inverter at its full power rating. This feature improves the reliability of the circuit. A 3-kW induction motor is run with the proposed topology for the full modulation range. The effectiveness of the capacitor balancing algorithm is tested for the full range of speed and during the sudden acceleration of the motor. [ABSTRACT FROM AUTHOR]