Search

The purpose of neutral-point voltage balancing algorithms in the three-level neutral-point clamped (3L-NPC) topology is to eliminate the voltage unbalance of top- and bottom-side dc-link voltages (neutral-point voltage). These algorithms are divided into dc unbalance and ac unbalance compensation methods. The dc unbalance causes distortion of output currents; therefore, this problem has to be solved. The ac unbalance implies that there is an ac ripple in the top- and bottom-side dc-link voltages. In applications using 3L-NPC topology, a large dc-link capacitor value is required to mitigate this ac unbalance problem. As a result, the size and the cost of applications become large and expensive. In this paper, a compensation method for mitigating the ac unbalance of the neutral-point voltage is proposed, which causes the dc-link capacitor value to be small, when a carrier-based pulse width modulation method is applied. The proposed method compensates the ac unbalance of the neutral-point voltage by adding an optimal compensation value to the reference duty signals. This compensation value is calculated simply by currents and reference duty signals. The calculation process of the optimal compensation value is discussed, and the effectiveness of the proposed method is verified with simulations and experiments. [ABSTRACT FROM PUBLISHER]

This article proposes a method to eliminate abnormal output voltages generated in three-level hybrid active neutral-point clamped (ANPC) inverters. The hybrid ANPC inverter is a topology in which silicon (Si) devices are replaced with silicon-carbide (SiC) devices in part from the conventional ANPC topology. The hybrid ANPC inverters have the advantages of high switching frequency and low power switching loss due to the SiC devices. In this hybrid ANPC inverter, abnormal output voltages occur when the polarity of the output pole voltage is changed from positive to negative. The cause of the abnormal voltages is the switching time difference between the Si and SiC devices, and it is various from a few nanoseconds to a few microseconds. These abnormal output voltages need to be eliminated as it leads to degraded output power quality in the hybrid ANPC inverters. The proposed switching method effectively eliminates the abnormal output voltages and reduces output current distortion. The performance of the proposed method is verified using a prototype of the new three-level hybrid ANPC inverter type through both simulations and experiments. [ABSTRACT FROM AUTHOR]