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This paper presents an analysis of the natural voltage balancing dynamics of a three-phase flying capacitor converter when supplying an induction motor. The approach substitutes double Fourier harmonic series for the pulsewidth modulation switching waveforms and the frequency response of the motor, to create a linear state-space model of this type of load. The model requires the mid-frequency response (500 Hz-20 kHz) of the induction motor impedance to be identified, and takes skin and proximity effects into account by adding parallel R--L networks to a standard motor model. Model parameters were measured by applying FFT analysis to variable frequency square waves injected into the motor terminals, and fitting parameter values to these measurements using a least squares minimization method. From the analysis, it was found that the converter voltage balancing behavior degrades substantially at low motor speeds, and that a balance booster filter, as previously proposed, considerably improves the dynamic response. Experimental verification results using a scaled-down flying capacitor converter drive are included in the paper. Index Terms--AC motor drives, double Fourier series, dynamic model, flying capacitor, multilevel, power conversion.

To achieve high-power density in power supplies, it is desirable to minimize the physical size of the energy storage capacitor. The capacitance is determined by the energy storage requirement for line outage ride-through and also the ripple current handling capability of the capacitor. Interleaving is well known as an effective method to reduce the capacitor ripple current and in cases where ripple current considerations dominate, it could reduce capacitor size. This paper presents a methodology to calculate the ripple current, both for single phase and for m interleaved phases of power factor correction converters operating with constant load or a dc--dc converter load. Experimental results from a commercial power supply yielded a small error when compared to the calculations, showing that the proposed methodology has enough accuracy to be used as a design tool. Index Terms--Capacitor ripple current, interleaved, power factor correction (PFC).

This paper proposes two methods of reducing the storage capacitance in the ac/dc power supplies for light emitting diode (LED) lighting. In doing so, film capacitors can be adopted instead of electrolytic capacitors to achieve a long power supplies' lifetime. The voltage ripple of the storage capacitor is intentionally increased to reduce the storage capacitance. The method of determining the storage capacitance for ensuring that the boost power factor correction converter operates normally in the whole input voltage range is also discussed. For the purpose of further reducing the storage capacitance, a method of injecting the third harmonic current into the input current flow is proposed. While ensuring that the input power factor is always higher than 0.9 to comply with regulation standards such as ENERGY STAR, the storage capacitance can be reduced to 65.6% of that with an input power factor of 1. A 60-W experimental prototype is built to verify the proposed methods. Index Terms--Harmonic current injection, LED, power factor correction (PFC), power supply, voltage ripple.

In the previous literature, the introduction of the virtual-space-vector (VV) concept for the three-level, three-leg neutral-point-clamped converter has led to the definition of pulsewidth modulation (PWM) strategies, guaranteeing a dc-link capacitor voltage balance in every switching cycle under any type of load, with the only requirement being that the addition of the three phase currents equals zero. This paper presents the definition of the VVs for the general case of an n-level converter, suggests guidelines for designing VV PWM strategies, and provides the expressions of the leg duty-ratio waveforms corresponding to this family of PWMs for an easy implementation. Modulations defined upon these vectors enable the use of diode-clamped topologies with passive front-ends. The performance of these converters operated with the proposed PWMs is compared to the performance of alternative designs through analysis, simulation, and experiments. Index Terms--Capacitor voltage balance, diode-clamped, multilevel, pulsewidth modulation (PWM), virtual vector.

The lossless inductor current sensing method is well-known and is frequently applied in the measurement of output current in dc-dc converters due to its low cost and simplicity. This technique uses a low-pass filter that is matched to the inductance (L) and winding resistance to compensate for induced voltages due to the inductor. However, the waveform fidelity above the corner frequency of the inductor is generally poor due to large production tolerances and thermal drift. In this letter, we propose the use of a coupled sense winding, which increases the corner frequency of the sensing circuit by more than two orders of magnitude. We show, as an example, that for a 3.85[micro]H inductor the corner frequency of the measurement circuit can be increased from 36 Hz using the conventional approach to 5.8 kHz using the coupled sense winding method. Above the new corner frequency, a low-pass filter is still required but may now be constructed using a smaller capacitor and with improved high-frequency response. Index Terms--Current measurement, current sharing, dc--dc power converter, mutual coupling.

A complete equivalent model and analysis of high-efficiency charge-pump gain-increase (PGI) circuits with resistive loads are proposed. Based on this simple analytical model, the characteristics of PGI circuits can be approximately predicted and several handy equations, which are useful for pencil-and-paper design, can also be found for planning the desired circuit to achieve good enough performance with an acceptable accuracy tolerance in the steady state. In addition, an optimized design method for PGI circuits with resistive loads is developed in terms of the total number of gain stages in the design and the ratio between pump capacitors. For 1.5 V supply voltage operation, reliability and accuracy are demonstrated by comparisons between SPICE simulations of the PGI circuit and the results from the equivalent model. The model also has been validated by means of measurements taken from a test chip and typically shows relative open-loop output voltage errors lower than 8%. Finally, although the derivation of the model was based on a PGI circuit, it is shown that the design strategy can also be applied to other charge pump designs that have no voltage drop between the inner stages and the output stage. Index Terms--Charge pump, dc-dc converter, equivalent model, high-voltage generator, voltage multiplier.

An original method to power supply gate drivers has been previously developed. This solution takes advantage of power switch commutations to recharge periodically a storage capacitor, and then to create the necessary floating power supply, useful for many power electronic converters. It is a low cost solution that can be integrated, but it presents some disadvantages: the storage capacitor must be adjusted with respect to the ON state time duration, and a permanent ON state operation is forbidden. Moreover, with the existing solution, a low frequency operation is problematic, because a large storage capacitor would be required. The proposed work presents here an improvement of the solution, in order to a allow flexible or even permanent ON state time duration operation of a self powered metal oxide semiconductor field effect transistor, using few additional elements. This solution exhibits unexpected and fairly good efficiency levels and presents a high ability for a simple implementation and monolithic integration. Added to these new features, smaller values for the storage capacitor can be used for this self powered driver power supply, allowing from very low up to high frequency operation and high duty cycle operation. This particular solution may simplify the integration of the storage capacitor, in the same substrate as the main switch and its self powering circuits. Index Terms--Metal oxide semiconductor field effect transistor (MOSFET), supply gate driver.

In this paper, the guidelines to design a high-voltage power converter based on the hybrid series parallel resonant topology, PRC-LCC, with a capacitor as output filter are established. As a consequence of the selection of this topology, transformer ratio, and therefore secondary volume, is reduced. The mathematical analysis provides an original equivalent circuit for the steady-state and dynamical behavior of the topology. A new way to construct high-voltage transformers is also proposed, pointing out the advantages and establishing an original method to evaluate the stray components of the transformer before construction. The way to make compatible the characteristics of both, topology and transformer is illustrated in the frame of a practical application. To demonstrate the feasibility of this solution, a high-voltage, high-power prototype is assembled and tested with good performance and similar behavior to the one predicted by the models. Experimental results are shown on this particular. Index Terms--DC-DC conversion, high voltage, resonant converters, X-rays.

Direct current (dc)-link decoupling capacitors are normally used to control the voltage overshoot of switching devices in voltage source converters. This paper analyzes decoupling capacitors' impacts on device electromagnetic interference (EMI) noise as well as on device voltage stress. The design and selection of decoupling capacitors considering both voltage stress and EMI suppression are presented. A new high-frequency EMI filter by utilizing the decoupling capacitors is proposed. The filter is adopted as a local EMI filter for power modules. The integratable characteristics of the proposed filter are discussed. Simulation and experimental results verify the design. This high-frequency filter shows good attenuation for high-frequency EMI noise and voltage overshoot suppression. Index Terms--Common mode (CM), conducted electromagnetic interference (EMI), decoupling capacitor, differential mode (DM), EMI filter, integrated power electronics module (IPEM), Y capacitor.

Recent research in flying capacitor multilevel inverters (FCMIs) has shown that the number of voltage levels can be extended by changing the ratio of the capacitor voltages. For the three-cell FCMI, four levels of operation are expected if the traditional ratio of the capacitor voltages is 1:2:3. However, by altering the ratio, the inverter can operate as a five-, six-, seven-, or eight-level inverter. According to previous research, the eight-level case is referred to as maximally distended (or full binary combination schema) since it utilizes all possible transistor switching states. However, this case does not have enough per-phase redundancy to ensure capacitor voltage balancing under all modes of operation. In this paper, redundancy involving all phases is used along with per-phase redundancy to improve capacitor voltage balancing. It is shown that the four- and five-level cases are suitable for motor drive operation and can maintain capacitor voltage balance under a wide range of power factors and modulation indices. The six-, seven-, and eight-level cases are suitable for reactive power transfer in applications such as static var compensation. Simulation and laboratory measurements verify the proposed joint-phase redundancy control. Index Terms--Converter, flying capacitor, inverter, multilevel, rectifier, voltage balancing.

The first part of this paper introduces a novel three-level dc-dc converter topology. It is shown that a floating capacitor connected across the clamping diodes of a conventional three-level converter enables phase-shift control while retaining zero voltage switching. Design constraints and experimental results are shown for a 6-kW, 100-kHz dc-dc prototype. The second part of the paper discusses the same three-level topology operated as a single-stage front-end converter. In this application, the converter realizes power factor correction and dc output voltage regulation. To ensure low harmonic distortion, the input currents are operated in discontinuous conduction mode, and the performance, including soft switching, is also verified on a 3-kW, 50-kHz ac-dc converter. Index Terms--Distributed power systems (DPS), floating capacitor.

It is well known that common-mode (CM) conducted electromagnetic interference (EMI) is caused by the common-mode current flowing through the parasitic capacitance of transistors, diodes, and transformers to ground in the power circuit. Because of the potential for interference with other systems it is necessary to attenuate this noise. Ordinarily this is accomplished by using a magnetic choke across the input power lines, resulting in penalties to the overall size and cost of the completed system. In order to lessen the requirement for this magnetic choke, there has been in recent years a desire to introduce noise cancellation techniques to the area of EMI. This text introduces a method of canceling the common-mode EMI by using a compensating transformer winding and a capacitor. Compared with other cancellation techniques, it is much simpler and requires no additional transistors and gate-drive circuitry since it merely adds a small copper winding and a small capacitor. By using this technique the size of the EMI filter can be reduced, especially for applications requiring high currents. In this paper, the new method for passive noise cancellation is applied to many popular converter and inverter topologies. The method, results, and ramifications of this technique are presented in order of appearance. Index Terms--CM, EMI, gate-drive circuitry, high currents, magnetic choke, passive noise cancellation, transistors.

A zero-voltage switching (ZVS) scheme for a three-level capacitor clamping inverter based on the true pulsewidth modulation (PWM) pole is proposed in this paper. With this scheme, the main switches work with ZVS through the assistance of a small rating zero-current switching (ZCS) lossless auxiliary circuitry without imposing any voltage-current spikes on the main devices or any extra control complexities. Consequently, a three-level capacitor clamping inverter system can operate at a promoted switching frequency and becomes more eligible to be considered for high-power advanced applications, for example, in high-speed drives or power active filter areas. In this paper, the main circuit operation issues as regards the clamping voltage stability, clamping capacitor stress, and output voltage spectrum are shortly reviewed first, after which the commutation principle, auxiliary circuitry stress analysis, and auxiliary circuitry designing methodology are presented in details. Experimental results from a 700-V supply 3-kW half-bridge three-level capacitor clamping inverter are demonstrated which conform well to the proposal. Index Terms: Soft-switching, three-level inverter.

The bang-bang controlled capacitor coupled converter ([C.sup.3]) is described in this paper. Due to the converter's inherent commutating property, the [C.sup.3] can accommodate thyristors as well as high-power gate turn-off switches, due to zero-current switching transitions. The zero-current switching is achieved at no current stress increase, therefore, the topology is considered appropriate for high-power processing. DC and small signal ac models are derived for the bang-bang controlled [C.sup.3], a design procedure is proposed, and simulation results are discussed. Finally, oscillograms from a proof of principle prototype circuit are presented.

A new device of variable capacitance is proposed. And its applications to the output voltage regulation of resonant converters are presented. The new device has an independent input terminal for controlling its capacitance. The converters used here are the well-known Schwarz circuit and the buck-type current-resonant converter with the resonant switch. By applying the devices to the capacitors in the LC resonant tanks, the resonant converters can be regulated with the switching frequency fixed.

This paper develops a new series resonant (current resonant) dc link inverter with a voltage clamped circuit. The proposed circuit has a fixed pulse frequency operation. The fixed pulse frequency at 20-50 kHz enables the system to work without audible noise, and to involve the much small-sized dc inductance and output capacitors compared with hard-switched current source inverters. The proposed circuit has a voltage clamped circuit which could control the voltage stress of the switches. In this paper, explanations of the new circuit configuration, the simulation, design considerations, and some experimental results are included. Index Terms--Current source inverter, PWM, quasicurrent-resonant, soft-switching, voltage clamped circuit.