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Multilevel inverters can reduce the common mode voltage generated. Schemes have been reported for multilevel inverters that reduce the common mode voltage. However, most of the schemes result in reduced modulation depth, high switching losses, and high harmonic distortion. This paper proposes a space-vector modulation scheme to reduce common mode voltage for cascaded multilevel inverters. The proposed scheme can increase the voltage range of operation by about 17% and can produce lower total harmonic distortion than the previously proPOsed schemes. The scheme is explained for five-level inverter. The scheme can be easily extended to a n-level inverter. Both experimental and simulation results are provided. Index Terms--Cascaded H-bridge inverter, common-mode voltage reduction, overmodulation, space-vector PWM.

This paper proposes a simple space vector pulsewidth modulation algorithm for a multilevel inverter for operation in the overmodulation range. The proposed scheme easily determines the location of the reference vector and calculates on-times. It uses a simple mapping to generate gating signals for the inverter. A five-level cascaded inverter is used to explain the scheme. The scheme can be easily extended to a n-level inverter. It is applicable to neutral point clamped topology as well. Experimental results are provided for five-level and seven-level cascaded inverters. Index Terms--Cascaded H-bridge inverter, modulation index, multilevel inverter, overmodulation, space vector pulsewidth modulation (SVPWM).