Search

The superjunction MOSFET power devices, such as p-n column superjunction (named SJ or CoolMOS) devices and oxide-bypassed (OB) devices, are highly recognized for their higher blocking capability and lower on-state resistance. However, the performance of SJ devices is greatly handicapped due to difficulties in formation of perfect charge-balanced SJ p-n columns by the current process technology, especially for devices with small widths and voltage ratings below 180 V. OB devices can be an alternative in this voltage region, which utilize the well established oxide thickness control in fabrication instead of the difficult doping control as in SJ devices. However, OB drift region electric field distribution is not as optimal as that in SJ devices. Gradient oxide-bypassed (GOB) structure enhances the performance of OB devices so that it can achieve a performance comparable to that of an ideal p-n column SJ device in the medium voltage range, and at the same time, requires simple process technology. Complete descriptions on the GOB device and related design issues are presented in this paper. Fabrication issues are also discussed with possible sacrificial materials and etchants for making the vertical graded oxide sidewalls. Design cases for 80, 120, and 180 V GOB devices are also illustrated for better understanding in the device. Index Terms--Breakdown voltage, gradient oxide-bypassed (GOB), ideal unipolar silicon limit, oxide-bypassed (OB), power MOSFETs, specific on-state resistance, superjunction.

This paper describes research work on the design and fabrication of current sensor suitable for smart power integration in lateral insulated-gate bipolar transistor (LIGBT) structure. In general, the proposed design can also be used for various types of MOS- controlled bipolar transistor structures. Both the electron and hole current sensor layers are integrated in a concise form within the device structure. The sensing performance was further refined with the proposed flat-top doping profile achievable through a double-implantation, single-anneal and post-anneal-oxidation approach. The integrated structure was fabricated on silicon wafer with laboratory measurements performed to verify its electrical performance. The sensing ratio is maintained at a relatively constant level with a variation of within [+ or -] 0.46% and [+ or -] 1.2% (as a switching device), and [+ or -] 0.85% and [+ or -] 1.73% (as an amplifier device), respectively, when anode current and gate voltage vary. For operating temperature range of 300 K to 400 K, the sensor is able to maintain a sensing ratio within [+ or -] 5.2% variation. Index Terms--IGBT, integrated current sensor, smart power integration.

In low-output-voltage dc/dc converters, power losses due to the conduction of rectifying devices are significant. Using synchronous rectifiers instead of the conventional fast recovery diodes or Schottky diodes is an effective solution to this problem in most topologies. However, for synchronous rectifiers to perform effectively, it requires an external gate drive with proper sensing and timing control circuits. This can increase the complexity and cost in converter hardware implementation. For the first time, a smart power synchronous rectifier (SPSR), which is a two-terminal MOS rectifier, is designed to overcome this difficulty. The SPSR integrates a simple control unit with a power MOSFET into a smart module to form a self-controlled synchronous rectifier. It has great advantages over the conventional discrete circuit composition, such as integrated gate control, precise timing switching, and fast transient response, which are suitable for applications in high-frequency pulsewidth modulation (PWM) converter circuits. Index Terms - Power electronic devices, synchronous rectification.

Based on a generalized state-space sampled data modeling, an iterative and efficient algorithm for deriving the small signal transfer functions of any dc-dc converter is proposed. This algorithm is suitable to be implemented in a software program as an analytical tool for automated control analysis of general dc-dc converters. Such a tool would reduce considerably the time needed by research engineers in modeling existing and new topologies and control methods. The algorithm proposed is applicable to different kinds of linear and nonlinear control methods. It has been verified on different converters and control methods.

During off-state, the influence of surface-trapped electron charges induced by high-field stress near the gate electrode of AlGaN/GaN power high-electron mobility transistor devices causes a reduction in two-dimensional electron gas (2DEG) carrier density at the heterointerface. In a pulse turn-on operation, the weakened 2DEG channel results in a higher on-state conduction resistance during the transient, known as the current collapse phenomenon. The phenomenon increases the switching loss by a higher on-state resistance and prolonged turn-on transition time, thus limits the device operating frequency range. In this paper, such a phenomenon is modeled, analyzed by Sentaurus TCAD simulation, and verified by the laboratory measurement data, with the emphasis on the influence of field plates toward the current collapse. The spatial distributions of trapped electrons and excess free electrons along the AlGaN surface are modeled and analyzed to arrive at the quantitative relationships among the trapped electron density, on-resistance increase, and the electric field distribution which provide a reliable criterion for current collapse reduction. It was found that, with a proper field plate design, it is possible to achieve an improvement on transient on-state resistance and the current recovery time. [ABSTRACT FROM AUTHOR]

The superjunction MOSFET power devices, such as p-n column superjunction (named SJ or CoolMOS) devices and oxide-bypassed (OB) devices, are highly recognized for their higher blocking capability and lower on-state resistance. However, the performance of SJ devices is greatly handicapped due to difficulties in formation of perfect charge-balanced SJ p-n columns by the current process technology, especially for devices with small widths and voltage ratings below 180 V. OB devices can be an alternative in this voltage region, which utilize the well established oxide thickness control in fabrication instead of the difficult doping control as in SJ devices. However, OB drift region electric field distribution is not as optimal as that in SJ devices. Gradient oxide-bypassed (GOB) structure enhances the performance of OB devices so that it can achieve a performance comparable to that of an ideal p-n column SJ device in the medium voltage range, and at the same time, requires simple process technology. Complete descriptions on the GOB device and related design issues are presented in this paper. Fabrication issues are also discussed with possible sacrificial materials and etchants for making the vertical graded oxide sidewalls. Design cases for 80, 120, and 180 V GOB devices are also illustrated for better understanding in the device. [ABSTRACT FROM AUTHOR]