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The use of wireless power transfer technology in unmanned aerial vehicle (UAV) systems is rapidly improving in different application areas. The main limitations of electric-powered UAVs are their charging range and stability in dynamic conditions. To solve these, this article proposes a hybrid control method based on dc-link and switched capacitor control with a fixed operating frequency. The dc-link voltage is regulated by the boost power factor correction converter to smoothen the output voltage, and the switched capacitor is used to dynamically compensate for self-inductance variations under dynamic coupling conditions. The output voltage stabilization and near-unity power factor of the input impedance can be achieved by applying the hybrid control method. Therefore, efficiency improvement can be achieved. Furthermore, the proposed control method can also be applied to systems with large coupling variations. To verify the proposed control method, a 500-W prototype was set up in the laboratory, and the experimental results proved that the control method could ensure a stable output voltage with horizontal and vertical offsets of 200 and 62 mm. respectively. Additionally, the results show that the maximum efficiency of the proposed control method is 91.9%, demonstrating that the proposed method effectively improves the efficiency.

The dissipated energy ( $E_{\text{diss}}$ ) related to the resonant charging–discharging of a transistor output capacitance becomes a dominant loss factor for power converters operating in the MHz range. A recent letter has introduced a small-signal measurement method to quantify $E_{\text{diss}}$ with a frequency-dependent small-signal resistance, $R_{\text{s}}$ , and an effective small-signal output capacitance, $C_{\text{oss}}^{\text{eff}}$ . This letter provides further insights on the effect of $R_{\text{s}}$ and $C_{\text{oss}}$ upon the device losses in a broader sense. In particular, the $C_{\text{oss}}$ loss tangent, tan ( $\delta$ ), is introduced as a normalized $E_{\text{diss}}$ to combine the roles of $R_{\text{s}}$ and $C_{\text{oss}}$ together with the operating frequency into a single loss parameter. By evaluating commercial device families, it is demonstrated that tan ( $\delta$ ) is constant for a given family, independent of device on -state resistance, $R_{\text{DS(on)}}$ . It is shown that a minimum $E_{\text{diss}}$ is achieved by having the lowest tan ( $\delta$ ) for a given stored energy ( $E_{\text{oss}}$ ) in $C_{\text{oss}}$ . With accompanying guidelines, this letter identifies tan ( $\delta$ ) as a powerful figure of merit to classify field-effect transistors (FETs) for soft-switching applications, regardless of $R_{\text{DS(on)}}$ variations in devices within a family. The proposed concept provides a comprehensive method to characterize and benchmark field-effect transistors for efficient operation in high and very-high-frequency (VHF) applications.

Compensation topologies play an essential role in wireless power transfer systems for electric vehicles. Specifically, the double-sided LCC compensated (DS- LCC ) topology has been widely adopted, owing to its inherent advantages, such as load-independent constant current (CC) output, low sensitivity to load variation, and high freedom in parameter design. However, large resonant devices in the DS- LCC topology lower the system efficiency and increase the complexity of optimal parameter tuning. Therefore, in this article, the parameters of the DS- LCC compensation topology are reconfigured by adjusting the ratios of its two compensation inductances without changing the specified system-level parameters, such as the loosely coupled transformer, operating frequency, and specified CC outputs. The system performance under each case is analyzed and compared in detail, based on which, an asymmetric parameter-design method is proposed to optimize the system efficiency. To verify the reasonability of the proposed tuning method, a 6.6-kW experimental prototype is configured, and comparative experiments are conducted. The experimental results indicate that, compared with the conventional method, the proposed parameter-tuning method improves the system efficiency under overall load conditions, especially under light loads.

A self-biased adaptive reconfigurable rectenna, consisting of a microstrip patch antenna and a self-biased reconfigurable rectifying circuit, is proposed in this letter. To eliminate the need of bias networks, a dc power routing structure is introduced to link the reconfigurable matching stub and the load. Hence, the output dc current obtained by the rectifier can be divided/split, thereby letting a part of the dc current flow back to the matching stub for providing a bias voltage. According to the input power level, the states of the p-i-n switch can be automatically changed in order to connect/disconnect the matching stub to the rectifying circuit for achieving improved matching performance at different power levels. Simulated and measured results show that the proposed rectenna reaches more than 50% conversion efficiency over a broadened input power range from 0–20 dBm with the peak efficiency of 68% at 9 dBm. It is evident that the proposed self-biased reconfigurable matching scheme is a promising and effective solution to facilitate the less-complicated reconfigurable rectenna integration and realize high efficiency at higher operating frequency bands (e.g., >5 GHz).

This paper proposes a Class-DEM tuned power amplifier. The proposed amplifier achieves zero-voltage switching (ZVS), zero-voltage derivative switching (ZVDS), and zero-current switching (ZCS) at turning- on , and ZVS, ZVDS, ZCS, and zero-current derivative switching at turning- off . Therefore, the switching losses are extremely low, which is suitable for high-frequency operation. Moreover, the switch voltage stress is low, which is no more than its input voltage. A proposed amplifier was designed, built, and tested. The measured power conversion efficiency was 93.2% under the condition of the main input voltage of 46.8 V, the operating frequency of 1 MHz, and the output power of 4.87 W.

Power converters used for undersea applications utilize dc current distribution instead of dc voltage distribution due to the long distance from the shore and cable series impedance. Power converter modules employed in such scenarios use a constant current as a source of input power with several modules connected in series. Series-resonant converters (SRCs), which are used in each module, behave differently when driven by a constant-current input in comparison to the conventional case with a constant-voltage input. The differences in the behavior and design of such SRCs have not been thoroughly studied in the literature. In this paper, detailed steady-state analysis is presented to show the findings, and a design procedure is proposed for regulating the output current of an SRC topology with its input connected to a constant-current source. Constraints on the selection of resonant tank components and operating frequency are satisfied, while regulating the output current over the desired load range. The proposed design also considers variations of the component values accounting for the changes due to tolerances as well as aging. A design example for supplying power to an undersea observation system and hardware validation results are provided for a 400 kHz 450 W SRC with a constant input current of 1 A and an output current of 330 mA.

Field programmable gate arrays (FPGAs) are widely used in telecom, medical, military, cloud computing, and other high-performance computing applications, thanks to their unique combination of parallel hardware execution and reprogrammability. During compilation, the computer-aided design (CAD) tool estimates the maximum operating frequency of the user application based on the worst case timing analysis of the critical path at a fixed nominal supply voltage, which usually results in significant voltage or frequency margin. Hence dynamic voltage scaling (DVS) has great potential to reduce the power overhead in FPGAs; however, the reprogrammability of FPGAs make a safe implementation of DVS for any application that could be programmed into the FPGA challenging. This work presents a robust universal DVS scheme for FPGAs intended to run on a system production line, or regularly during each FPGA power-up. The proposed scheme requires the FPGA to be programmed twice: offline self-calibration and online DVS. During the offline self-calibration, the FPGA frequency and core voltage operating limits at different self-imposed temperatures are automatically found and stored in a calibration table (CT). During online operation, the power stage refers to the CT and dynamically adjusts the core voltage according to the FPGA temperature and the resistive voltage drop in the power delivery path. The proposed DVS scheme is demonstrated on a 60-nm Intel Cyclone IV FPGA, with a digitally controlled dc–dc converter, leading to 40% power savings in two typical applications.