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When faced with distorted grid voltage, more harmonics will appear in the output currents of the grid-connected inverters. The grid-voltage feedforward strategy, as the most direct solution to compensate the harmonics, however, is seriously affected by the errors in the grid-voltage feedforward loop, such as delays. This issue is more significant for high-power inverters, where the switching frequency is relatively low (< 5 kHz), and the grid-interface inductance is small (< 0.5 mH). The errors mainly include the signal distortion caused by the conditioning circuits, the control delay of the digital controller, and the zero-order hold (ZOH) characteristic of pulse width modulation (PWM). In this paper, several improvements have been made to reduce the signal distortion and compensate the delays. A second-order Butterworth low-pass filter in the conditioning circuit is carefully designed with the maximum flat magnitude response and the almost linear phase response to avoid distorting the measured grid voltage. Furthermore, based on the conventional repetitive predictor, an open-loop simplified repetitive predictor is proposed to compensate the delays in the grid-voltage feedforward loop. Three predictive steps are achieved by the open-loop simplified repetitive predictor to compensate the delays: one step for the delay caused by the conditioning circuit, the second step for the control delay of the digital controller, and the third step for the ZOH characteristic of PWM. The effectiveness of the improved grid-voltage feedforward strategy are experimentally validated on a 250-kVA solar power generation system, where the current harmonics are effectively attenuated. In addition, the inverter starting current is suppressed. [ABSTRACT FROM AUTHOR]

This paper has presented a stability analysis of a LCL-type grid-connected inverter in the discrete-time domain. It has been found that even though the system is stable when the resonance frequency fr is higher than one-sixth of the sampling frequency ( fs/6), an effective damping scheme is still required due to the potential influence of the grid impedance. With a conventional proportional capacitor-current-feedback active damping (AD), the valid damping region is only up to fs/6. This however is not sufficient in the design process for obtaining a high quality output current and the system can easily become unstable due to the resonance frequency shifting. Considering the resonance frequency design rules of the LCL filter, this paper proposes an improved capacitor-current-feedback AD method. With a detailed analysis and proper parameter design, the upper limit of the damping region is extended to fs/4, which can cover all the possible resonance frequencies. Then, the damping performance of the proposed AD method is studied. It shows that the optimal damping is obtained when the actual resonance frequency is (fr + fs/4)/2. Moreover, an approximate calculation for the optimal damping coefficient R is given. Finally, the experimental results have validated the effectiveness of the proposed AD method. [ABSTRACT FROM AUTHOR]

The higher voltage blocking capability and faster switching speed of silicon-carbide (SiC) mosfets have the potential to replace Si insulated gate bipolar transistors (IGBTs) in medium-/low-voltage and high-power applications. In this paper, a state-of-the-art commercially available 325 A, 1700 V SiC mosfet module has been fully characterized under various load currents, bus voltages, and gate resistors to reveal their switching capability. Meanwhile, Si IGBT modules with similar power ratings are also tested under the same conditions. From the test results, several interesting points have been obtained: different to the Si IGBT module, the over-shoot current of the SiC mosfet module increases linearly with the increase of the load current and it has been explained by a model of the over-shoot current proposed in this paper; the induced negative gate voltage due to the complementary device turn-off (crosstalk effect) is more harmful to the SiC mosfet module than the induced positive gate voltage during turn-on when the gate off-voltage is –6 V; the maximum dv/dt and di/dt (electromagnetic interference) during switching transients of the SiC mosfet module are close to those of the Si IGBT module when the gate resistance is larger than 8 Ω but the switching loss of the SiC mosfet module is much smaller; the switching losses of the Si IGBT module are greater than those of the SiC mosfet module even when the gate resistance of the former is reduced to zero. An accurate power loss model, which is suitable for a three-phase two-level converter based on SiC mosfet modules considering the power loss of the parasitic capacitance, has been presented and verified in this paper. From the model, a 96.2% efficiency can be achieved at the switching frequency of 80 kHz and the power of 100 kW. [ABSTRACT FROM AUTHOR]

The frequency splitting phenomenon (FSP) is a critical issue in wireless power transfer (WPT) systems. When the FSP exists, the load power will sharply increase and can be dozens of times of the power obtained at the resonant frequency if the driving frequency varies from the resonant frequency, which seriously affects the system safety. This article studies the impacts caused by the FSP in detail and then proposes a system control method by utilizing the advantages of the FSP to realize constant power output and zero voltage switching (ZVS) of the dc–ac inverter simultaneously. The splitting frequencies are tracked and the driving frequency is precisely adjusted together with the dc-link voltage. The specific implementation method is given in this article to minimize the impacts on the power transfer performance. An 85 kHz, 3.3 kW WPT system is built up to validate the proposed method. The experimental results show that when the FSP occurs at 150 mm coil-to-coil distance and 5 Ω load resistance, the load power can be hold at 3.3 kW with the dc-link voltage reduced from 327 to 160 V. Meanwhile, ZVS of the inverter is realized and the inverter efficiency is improved from 95% to 97%. [ABSTRACT FROM AUTHOR]

Voltage-controlled voltage source inverters (VSIs) are generally adopted to achieve seamless transfer between islanded mode and grid-connected mode in microgrid applications. However, these two operation modes for VSIs feature different output filters, i.e., LC filters for islanded mode while LCL filters for grid-connected mode, thus leading to different stability performance. In this article, the traditional control strategy based on an outer capacitor voltage loop cascaded with an inner capacitor current active damping loop is investigated in details. The analysis indicates that there exists an inevitable blind area of stability design, where the system cannot be stable under two operation modes at the same time. Therefore, in order to raise available space for system design, this article proposes a stability blind-area-free control design method. The analysis indicates that the proposed stability design is only affected by LC filter parameters under islanded mode. Therefore, the blind area of the traditional control method can be well eliminated, and meanwhile the system robustness against the grid impedance variation under grid-connected mode is improved. The detailed design method is also presented. Simulation and experimental results are finally provided to verify the effectiveness of the analyses and the feasibility of the method. [ABSTRACT FROM AUTHOR]

Efficiency, power quality, and reliability of SiC MOSFET-based voltage-source converters are significantly affected by the dead-time settings. The conventional fixed dead-time setting can induce large output voltage loss and additional energy loss due to the output capacitance of the SiC MOSFETs and the SiC Schottky barrier diodes or the freewheeling of the diodes, which will be more serious under high switching frequencies. This paper analyzes and models the detailed switching process of the SiC MOSFET half-bridge circuit when various dead-time settings are adopted. Based on the models, an optimal asymmetric variable dead-time (OAVDT) setting is proposed, which can avoid the discharging loss of the output capacitance and redundant freewheeling loss of the diode. The OAVDT setting is realized by adjusting the optimal dead-time in real time after the active device is turned off, which does not require any additional hardware circuits. The OAVDT setting can also reduce the output voltage loss to a certain level compared to the fixed dead-time setting. A three-phase two-level SiC MOSFET inverter has been built in the lab to verify the proposed OAVDT setting. Experimental results show a decrease of power loss by 22.5% with reduced output voltage loss compared to the fixed dead-time setting of 0.28 μs when the output power is 8 kW and the switching frequency is 40 kHz. The proposed OAVDT setting shows clear advantages over that of fixed dead-time setting, especially at light load and high switching frequencies. [ABSTRACT FROM AUTHOR]

Coil misalignment in inductively coupled power transfer (ICPT) systems will lead to fluctuation of transferred power, and even instability of the ICPT systems. To obtain robust control for ICPT system with coil misalignment, a μ-controller based on structured singular value (SSV) is used to set up a closed-loop system in this paper. A generalized state-space averaging (GSSA) model is established using GSSA method first. Then a standard M-Δ configuration is obtained by a linear fractional transformation of the nominal and uncertainty parts of the GSSA model. Finally, a μ-controller is designed by D-K iteration. Besides, the theoretical results are validated by computer simulations and practical experiments. [ABSTRACT FROM AUTHOR]

In voltage-source inverters, it is necessary to add the dead time between gating signals of the upper and lower switches to prevent short circuit in a phase leg. But in current-source inverters (CSI), due to the large series inductor in dc link, it is necessary to add the overlap time in gating signals of switches during the commutation process for avoiding voltage spikes generated by the intermittent dc current. However, the overlap time will cause negative influence in the output current waveform. In this paper, the current commutation process of CSI within a carrier period is investigated, which shows that the overlap time can cause output-current-vector errors. The output-current-vector errors are then analyzed, which are equivalent to a superposition and introducing additional low-order harmonics in the output current waveform. The relationship between harmonic distortion and the overlap time is derived. An overlap-time compensation method is then proposed, which compensates the dwell time of vectors according to the relations of voltages at the ac side of the inverter. The proposed overlap-time compensation method can effectively decrease the current harmonics introduced by the overlap time and improve the output current of the inverter. Simulation and experimental results are finally provided to verify the feasibility and validity of the proposed method. [ABSTRACT FROM PUBLISHER]

LCL-filtered grid-connected converters are widely used for distributed generation systems. However, the current regulation of such converters is susceptible to weak grid conditions, e.g., grid impedance variation and background harmonics. Paralleling multiple harmonic compensators (HCs) is a commonly used method to suppress the current distortion caused by grid background harmonics, but the control bandwidth should be wide enough to ensure system stability. In order to enhance the adaptability of LCL-filtered grid-connected converters under weak grid operation, this paper proposes an improved capacitor-voltage-feedforward control with full delay compensation. When used with converter-side current feedback, the proposed control can keep system low-frequency characteristic independent of grid impedance and provide a high-harmonic rejection capability without using additional HCs. Moreover, it completely avoids the design constraints of an LCL filter, i.e., \omega r< \omega s/ 6 is required for single-loop converter-side current control. Therefore, a higher resonant frequency can be designed to achieve a wider control bandwidth and to lower the current distortion caused by the paralleled filter capacitor branch. Experimental results are finally presented to verify the proposed control, which are also in good agreement with theoretical analysis. [ABSTRACT FROM PUBLISHER]

In this paper, the stability of LC-type voltage source inverter is investigated, with the emphasis focused on the LC resonance. It has been found that the traditional capacitor-voltage inductor-current dual-loop control is unstable when the resonance frequency is higher than one-sixth of the sampling frequency. In addition, due to the coupling between current inner loop and voltage outer loop, it is difficult to design control parameters to ensure the system stability in traditional dual-loop control. In order to develop a systemic design principle, the capacitor-voltage control with inductor-current feedback active damping evolved from traditional dual-loop control is analyzed in detail. The mathematic model is established to reveal the reason of instability, and the stable regions are identified. Moreover, the optimal damping coefficient is also derived to enhance the system damping performance. Finally, the experimental results are provided to verify the effectiveness of the proposed method. [ABSTRACT FROM PUBLISHER]

The adoption of silicon carbide (SiC) MOSFETs and SiC Schottky diodes in power converters promises a further improvement of the attainable power density and system efficiency, while it is restricted by several issues caused by the ultrafast switching, such as phase-leg shoot-through (“crosstalk” effect), high turn-on losses, electromagnetic interference (EMI), etc. This paper presents a split output converter, which can overcome the limitations of the standard two-level voltage source converters when employing the fast-switching SiC devices. A mathematical model of the split output converter has been proposed to reveal how the split inductors can mitigate the crosstalk effect caused by the high switching speed. The improved switching performance (e.g., lower turn-on losses) and EMI benefit have been demonstrated experimentally. The current freewheeling problem, the current pulses and voltage spikes of the split inductors, and the disappeared synchronous rectification are explained in detail both experimentally and analytically. The results show that the split output converter can have lower power device losses compared with the standard two-level converter at high switching frequencies. However, the extra losses in the split inductors may impair the efficiency of the split output converter, which is verified by experiments in the continuous operating mode. A 95.91% efficiency has been achieved by the split output converter at the switching frequency of 100 kHz with suppressed crosstalk, lower turn-on losses, and reduced EMI. [ABSTRACT FROM AUTHOR]

For a multimegawatts doubly-fed induction generator (DFIG), the grid voltage disturbances may affect the stator flux and induce the transient stator flux, due to the direct connection of the stator and the grid. The accumulation of the transient stator flux caused by the variations of the stator voltage may introduce harmful power and torque oscillations to the DFIG, and even lead to rotor overcurrent. For the conventional field-oriented vector control strategy, the design of the controller is based on the steady-state model of the DFIG, which neglects the dynamic of the stator flux, and, therefore, it cannot work well during the transient state to decay the transient flux and to suppress the flux accumulation. In this paper, a dual-loop control strategy, which includes the conventional current loop and an additional flux loop, is proposed to not only control the active and reactive power, but also decay the stator transient flux, and avoid the accumulation of the stator transient flux. Moreover, the proposed strategy can obtain nearly constant stator active power and electromagnetic torque, which may prolong the lifetime of the drive train. A case study on a typical 2-MW DFIG-based wind turbine demonstrating the effectiveness of the proposed control methods is verified with simulations in MATLAB/Simulink. The proposed control methods are also experimentally validated using a scaled-down 7.5-kW DFIG. The simulation and experimental results clearly validate the effectiveness and feasibility of the proposed strategy, and show the improved dynamic performances of the DFIG. [ABSTRACT FROM PUBLISHER]