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An inverter scheme with 18-sided polygonal voltage space-vector structure is proposed for induction motor drive applications. An open-end winding configuration is used for the drive scheme. The motor is fed from one end with a conventional two-level inverter and from the other end with a three-level inverter, realised by cascading two conventional two-level inverters. The inverters are fed with asymmetrical DC-link voltages. A simple linear PWM control scheme up to 18-step mode is proposed, based only on the motor reference phase amplitudes. The proposed scheme gives an increased modulation range with the elimination of the 5th, 7th, 11th and 13th-order harmonics, for the entire modulation range, when compared with any conventional schemes. The absence of low-order harmonics gives nearly sinusoidal currents throughout the modulation range, and makes PWM control of voltage very simple, with low inverter switching frequencies, especially in the extreme modulation range. [ABSTRACT FROM AUTHOR]

The issues in synchronised implementation of space vector-based pulse width modulation (SVPWM) signal generation are addressed on a conventional DSP platform. With the present day digital signal processors (DSPs) with clock over 10 MHz, it is possible to include additional tasks for synchronisation in the interrupt service routine (ISR). Also, the task of the synchronisation can be easily accommodated within the same ISR without disturbing the time critical pulse width modulation (PWM) operation. The authors systematically present the additional software requirements to determine the time period proportional to the half carrier switching time interval that is required for the synchronisation. First, the DSP implementation of the conventional multi-level SVPWM based on the sampled amplitudes of reference voltages is presented and then the additional requirements to maintain the PWM in synchronisation are discussed. The simulation results as well as experimental results are presented for a five-level PWM signal generation. A five-level inverter configuration, using a 1.5 kW open-end winding induction motor drive, is used for experimentally verifying the SVPWM. [ABSTRACT FROM AUTHOR]