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Conventional modular multilevel converters (MMCs) are promising converters for high-voltage high-power applications. Unlike DC-AC conversion, DC-DC conversion of MMCs suffers from unbalanced capacitor voltages due to the energy drift problem. In this study, a new modular DC-DC converter is proposed, which consists of front-end half-bridge MMC with half-bridge submodules followed by full-bridge MMC with full-bridge submodules. The proposed modular multilevel DC-DC converter can be used effectively for connecting two different DC voltage levels in high-/medium-voltage DC grids. The proposed architecture provides successful DC-DC conversion with balanced capacitor voltages throughout the arm interchange concept. It also provides a high conversion ratio, bidirectional power flow, low losses, low current stresses, reduced number of submodules, and DC fault blocking capability. Detailed illustration, operational concept, and design of the proposed architecture with the arm interchange concept are presented. Simulation results for a high-voltage high-power DC-DC converter with the suggested approach are presented to demonstrate the system performance during different normal as well as abnormal operating conditions. Finally, a scaled-down prototype has been implemented for validation. The extracted simulation and experimental results elucidate the presented claims. [ABSTRACT FROM AUTHOR]

In this study, a cost‐effective HVDC shunt tap with low‐number of relatively low‐voltage semiconductor devices and small‐sized passive components is proposed. The proposed architecture is based on employing three single‐phase half‐bridge Modular Multilevel Converters (MMCs), where the DC sides of MMCs are connected in series across the total DC‐link voltage. The MMCs are adopted instead of conventional Two‐Level Voltage Source Converters (2L‐VSCs) to avoid the complications of series connection of Insulated Gate Bipolar Transistors (IGBTs). The involved MMCs in the suggested architecture are operated with the conventional 2L modulation, which results in insignificant arm inductors and Sub‐Modules (SMs) capacitances (in range of µH and µF, respectively). This, in turn, affects positively the converter cost and footprint. Each arm of the involved MMCs can be considered as a high‐voltage valve of a 2L‐VSC. To maintain the balance of SMs capacitors, each arm of the involved (N + 1)‐level MMC has an extra SM (a balancing SM) to select N out of N + 1 SMs during the turn‐off condition. The operational concept, design, and assessment of the proposed architecture are presented in this study. Simulation results are provided for substantiation of the proposed concept. Finally, a scaled down single‐phase prototype is used for experimental validation. [ABSTRACT FROM AUTHOR]