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Here, a new bi‐directional hybrid modular non‐isolated DC–DC converter is proposed where it consists of a boost converter (BC) fed from the high‐voltage (HV) side. At the BC output stage, a certain number of half bridge submodules (HB‐SMs) is connected across the BC switch. During the turn‐on period of BC switch, the HB‐SMs are connected sequentially to the low‐voltage (LV) side, which results in charging/discharging their capacitors from/into the LV side. While, during the turn‐off period, the LV side is bypassed and the HB‐SMs capacitors are connected in series across the BC output stage, which results in discharging/charging them into/from the HV side. The power flow is controlled in both directions by controlling the duty cycle. The proposed configuration provides self‐balancing operation thanks to the sequential connection of HB‐SMs capacitors, and it also provides the ability to operate with high conversion ratios. Illustration and analysis of the proposed converter and its closed‐loop controller are presented. A full design of the values and ratings of the involved components are presented. Simulation study for a 2.5 MW (25 kV/10 kV) DC–DC converter is presented. Finally, experimental results for a downscaled prototype are presented for validation. [ABSTRACT FROM AUTHOR]

The half‐bridge modular multilevel converter (HB‐MMC) is one of the most promising topologies for high‐voltage direct current (HVDC) systems. Unlike full‐bridge MMC (FB‐MMC) and clamp double sub‐module MMC (CDSM‐MMC), HB‐MMCs are defenceless against DC side faults. Different types of DC circuit breakers (DC CBs) assisted with arrester banks/damping resistors such as solid‐state CB and hybrid DC CBs can be used to interrupt the DC fault current. Arrester banks are used to protect against overvoltage after interrupting the fault current and in turn to demagnetise the circuit inductors. The main disadvantage of the arresters is that they forcibly break apart when they are overloaded. In this study, an arrester‐less fault current limiter is proposed for HB‐MMC configuration, which provides an opposing voltage during the DC side fault. This is achieved by inserting external pre‐charged capacitors in the DC current path during the fault. The selection of these external capacitors, their suitable initial voltages, and their charging stations are also presented in this study. A comparison between the proposed scheme and the CDSM‐MMC has been held as well. The proposed protection scheme is assessed using a simulation study for a point‐to‐point nine‐level HB‐MMC‐based HVDC system. [ABSTRACT FROM AUTHOR]