1. Joint hardware–software leakage minimization approach for the register file of VLIW embedded architectures
- Author
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Atienza, David, Raghavan, Praveen, Ayala, José L., De Micheli, Giovanni, Catthoor, Francky, Verkest, Diederik, and López-Vallejo, Marisa
- Subjects
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EMBEDDED computer systems , *AUTOMATION , *COMPUTER architecture , *MULTIMEDIA computer applications , *HIGH performance processors - Abstract
New applications demand very high processing power when run on embedded systems. Very Long Instruction Word (VLIW) architectures have emerged as a promising alternative to provide such processing capabilities under the given energy budget. However, in this new VLIW-based architectures, the register file is a very critical contributor to the overall power consumption and new approaches have to be proposed to reduce its power while preserving system performance. In this paper, we propose a novel joint hardware–software approach that reduces the leakage energy in the register files of these embedded VLIW architectures. This approach relies upon an energy-aware register assignment method and a hardware support that creates sub-banks in the global register file that can be switched on/off at run time. Our results indicate energy savings in the register file, after considering the overhead of the added extra hardware, up to 50% for modern multimedia embedded applications without performance degradation. We illustrate this approach using real-life applications running on these processors. We also illustrate the tradeoff between the area overhead vs. the gains in the leakage energy for the different strategies. [Copyright &y& Elsevier]
- Published
- 2008
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