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Block copolymer directed self-assembly (DSA) is a simple and promising candidate next-generation device fabrication technology, which is low-cost as complement with multi-patterning for contact layer patterning. In this paper, we consider the contact layer mask and template assignment problem of DSA with triple patterning lithography of general layout. To address this problem, first we construct a weighted conflict grouping graph, in which edges with negative weights are introduced, then a discrete relaxation based mask assignment problem is proposed. The integer linear program (ILP) formulation of the discrete relaxation problem is solved for obtaining a lower bound on the optimal value of this problem. In order to improve the lower bound, some valid inequalities are introduced to prune some poor relaxation solutions. At last, the obtained discrete relaxation solution is transformed to a legal solution of the original problem by solving a template assignment problem on the layout graph, which provides an upper bound on the optimal value of the original problem. Experimental results and comparisons show the effectiveness and efficiency of our method. In addition, under the discrete relaxation theory, the quality of our experimental results can be evaluated by the obtained upper and lower bounds. Specifically, the gap between the obtained upper and lower bounds is 0 for most of the sparse benchmarks, and the average gap is 0.4% for dense benchmarks. [ABSTRACT FROM AUTHOR]

With the increasing complexity in modern circuit designs, the 6T&6TPPNN circuits have become popular in advanced technologies for better trade-offs among routability, timing, power and performance. The 6TPPNN cells incur great challenges to layout designs, especially the legalization problem due to their complex minimum width (MW) constraints and the fragmentation effect (FE). In this paper, we address the mixed 6T&6TPPNN cell legalization problem considering both MW constraints and FE issues. Given a global placement result, we first align all cells to the correct rows/half-rows that satisfy the VDD/VSS alignment constraints, and then propose a clustering-based MW constraints solving method to eliminate all the MW violations. After that, we formulate the legalization problem with MW constraints as a quadratic programming (QP) problem, which not only satisfies the MW constraints, but also avoid causing excessive dead spaces. Finally, we integrate the FE issues into the formulated MW-aware QP model, and adopt the modulus-based matrix splitting iteration method (MMSIM) to solve the mathematical model effectively and efficiently. Experimental results show that our algorithm can resolve all MW constraints and mitigate the half-row fragmentation effect without any extra area overhead in a reasonable time. • We propose a clustering-based method to eliminate all the minimum width (MW) violations. • We formulate the legalization problem with MW constraints as a quadratic programming problem. • We further integrate the fragmentation effect (FE) issues into the formulated MWaware legalization model. • We adopt the modulus-based matrix splitting iteration method to solve the MW&FE-aware legalization problem effectively. • Experimental results show that our algorithm can resolve all MW constraints and mitigate the FE in reasonable runtime. [ABSTRACT FROM AUTHOR]

As an emerging manufacture technology, block copolymer directed self-assembly (DSA) is promising for via layer fabrication. Meanwhile, redundant via insertion is considered as an essential step for yield improvement. For better reliability and manufacturability, in this paper, we first concurrently consider DSA guiding template cost assignment with multiple redundant via and dummy via insertion. Firstly, by analyzing the structure property of guiding templates, we propose a building-block based solution expression to discard redundant solutions. Then, honoring the compact solution expression, we construct a conflict graph with dummy via insertion, and then formulate the problem to an integer linear programming (ILP). In addition, to optimize the guiding template cost, we incorporate it into the objective of ILP by introducing vertex weight and edge weight in conflict graph. To make a good trade-off between solution quality and runtime, we relax the ILP to an unconstrained nonlinear programming (UNP). Finally, a line search optimization algorithm is proposed to solve the UNP. Experimental results verify the effectiveness of our new solution expression and the efficiency of our proposed algorithm. Specifically, our guiding template cost optimization method can save 18% total guiding template cost. • In this journal version, we first use multiple redundant via insertion technique to further improve the manufacture rate and insertion rate for the DSA guiding template and redundant via insertion problem. In Section 1, we present the role of multiple redundant via insertion by illustrating an example as Figure 4. • In this journal version, we first consider the cost of DSA guiding template. Complex templates with more holes would introduce larger overlays than regular templates with less holes. Considering guiding template cost can reduce overlays. • For the DSA guiding template assignment with multiple redundant via and dummy via insertion (DMRD) problem, we prove its NP complexity in Section 2.3. • In Section 3.2, we add the introduction of our graph reduction technique. • In Section 3.3, we add the introduction and relationship of guiding template cost, building-block cost and template edge weight. • In Section 4.3, we prove the local convergence and analyze the efficiency of our unconstrained nonlinear programming (UNP) solver. • In Section 4.4, we extend our ILP formulation in conference paper to consider guiding template cost, which is a quadratic integer programming (QIP). Furthermore, the QIP also can be solved by our UNP solver. • In Section 5, we add experimental result comparison of our ILP solver with previous works. And we add the comparison of our UNP solver and the ILP solver in TCAD'17 [18] on nine much larger benchmarks in Table 2. In addition, 1 we compare the guiding template cost between our UNP solver with guiding template cost and without guiding template cost in Section 5.3. [ABSTRACT FROM AUTHOR]

Floorplanning is a crucial step in very large scale integration design flow. It provides valuable insights into the hardware decisions and estimates a floorplan with different cost metrics. In this paper, to handle a multi-objective thermal-aware non-slicing floorplanning optimization problem efficiently, an adaptive hybrid memetic algorithm is presented to optimize the area, the total wirelength, the maximum temperature and the average temperature of a chip. In the proposed algorithm, a genetic search algorithm is used as a global search method to explore the search space as much as possible, and a modified simulated annealing search algorithm is used as a local search method to exploit information in the search region. The global exploration and local exploitation are balanced by a death probability strategy. In this strategy, according to the natural mechanisms, each individual in the population is endowed with an actual age and a dynamic survival age. Experimental results on the standard tested benchmarks show that the proposed algorithm is efficient to obtain floorplans, with decreasing the average and the peak temperature. [ABSTRACT FROM AUTHOR]