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Summary: This paper presents an automatic procedure for the design and optimization of switched‐capacitor (SC) filters, including the automatic sizing of transistors in the amplifiers and switches. The optimization procedure is based on genetic algorithms (GAs) where the circuit's fitness is first computed using equations describing the filter's transfer function and then using transient simulations. These equations are obtained using a fast numerical methodology that takes into consideration the electrical behavior of all components in the circuit. The poles and zeros of the SC filter's transfer function are computed using a system of differential equations, obtained from the inspection of the circuit. This system describes the filter's behavior for all switch combinations, including the non‐ideal effects of the transistors in the switches and amplifiers. Due to the low computational effort and accuracy of this methodology, it is possible to use a large population in the GA. After finding a solution through equations, the more computationally intensive SPICE transient simulations are used to fine‐tune the solution, with a much smaller population in the GA. Taking advantage of the equations' low computational load and accuracy, process, voltage, temperature (PVT) corners and mismatch errors optimizations are also performed, allowing the chromosomes fitness to be calculated taking into consideration multiple cases, thus resulting in a low sensitivity design. [ABSTRACT FROM AUTHOR]

Summary: This paper presents an overview of design techniques to reduce the capacitance spread of SC notch filters. Three of these techniques are used in the design of a 50‐Hz notch filter, intended for an internet of things (IoT) water management sensor node. In this application, due to the high sampling frequency required by the acquisition channel's ADC, the filter's Fs/fp ratio becomes excessively large, resulting in a capacitance spread of 3225.8, if a conventional SC implementation is used. Using charge division networks, with up to seven share/reset cycles, the filter's capacitance spread is reduced by a factor 12.9 and the total capacitance by 5.9, and a total power dissipation of approximately 262 μW, for a supply voltage of 0.9 V. Using capacitive T‐cell networks, the filter's capacitance spread is reduced by a factor 40.5 and the total capacitance by 14.2. Using partial charge transfer networks, the filter's capacitance spread is improved by a factor 41.6, and the total capacitance by 10.0. The filter's total power consumption, using the last two techniques, is approximately 11 μW. [ABSTRACT FROM AUTHOR]

An energy-harvesting system requires an energy-storing device to store the energy retrieved from the surrounding environment. Rechargeable batteries are commonly used to store this energy; however, because of the limited number of charge/discharge cycles, they need to be periodically replaced. A supercapacitor, which has, ideally, a limitless number of charge/discharge cycles, avoids this problem. In this case, it is required for the power management unit to produce a constant output voltage as the supercapacitor discharges. This paper presents a system with a multiratio switched capacitor DC-DC converter, in a 130-nm technology, with a maximum output power of 2 mW, a maximum efficiency of 79.63% and a maximum output ripple, in the steady state, of 23 mV for an input voltage range of 2.3-0.87 V. The proposed converter has four operation states, to maximize its efficiency, that correspond to the conversion ratios of 1/2, 2/3, 1/1 and 3/2. Its clock frequency is automatically adjusted to produce a stable output voltage of 1 V. These features are implemented through two distinct controller circuits that use two asynchronous time machines to dynamically adjust the clock frequency and to select the active state of the converter. All the theoretical expressions as well as the behaviour of the whole system were verified by using electrical simulations. Copyright © 2016 John Wiley & Sons, Ltd. [ABSTRACT FROM AUTHOR]