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A power system is separated into as many subnetworks, referred to as a bordered block diagonal form (BBDF) matrix, as the processors of a parallel computer. Balance loading on all processors is essential to ensure the success of any parallel approach. In this study, a novel method involving the node ordering approach on the basis of calculating the maximum number of fill-in and the degree of every node as the cutest block nodes is proposed. To promote the performance, the synchronized phasor measurement units (PMUs) installed on the cutest block nodes capture the state variable for solving the load flow equations. Simulation results of the Taiwan Power Company 288-bus system are presented to verify the feasibility of the proposed approach and its capability to implement parallel computing for load flow analysis. [Copyright &y& Elsevier]