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In this paper, a Dickson-based RF-DC (Radio frequency power to direct current power) rectifier for energy harvesting system is designed. Dickson double-voltage structure, voltage-dividing structure and switching transistors are integrated in the system to fulfil the synchronous rectifying function, which can upgrade PCE (Power Conversion Efficiency) value, reduce the threshold voltage and decrease the leakage current, etc.. The simulation is conducted on the designed synchronous rectifier for energy harvesting of 900 MHz signal. It shows that when the input voltage $${V_{IN}} = 1V$$ V IN = 1 V , the peak output DC voltage can be stabilised at 1.8 V with the assistance of LDO (Low dropout) regulator, while the reverse leakage current is below 20 µA and the PCE value reaches 58%. The designed rectifier is assembled and tested in the paper. Both the simulation and testing results demonstrate the feasibility of the proposed synchronous rectifier. [ABSTRACT FROM AUTHOR]

With the emerging of Internet of Things (IoT) industry, applications like smart power plugs, security ID tags, home automation and wearable electronic devices all make the demand for low-power WiFi chips impendency. In this paper, a low-power 2.4 GHz 802.11b/g/n WiFi system-on-chip (SoC) is designed and implemented with 40-nm CMOS process, with area of 8.1 mm2. The low-power SoC integrates 32-bit microcontroller, 802.11b/g/n WiFi baseband, 2.4 GHz RF transceiver, ample memory space, ADC, 6-channel PWM, flexible I/O interfaces, multi-stage power management module, etc. It has several sleep modes with extremely low leakage current as 0.8 mA/12 µA in light/deep sleep mode and 0.4 µA in shutdown mode to reduce the power consumption. High performance is demonstrated, including Pout (−28 dB/-30 dB EVM) of 20.1 dBm/19.1 dBm and RX sensitivity of −76 dBm/-74 dBm meanwhile the total current of 148.5 mA/146.5 mA (TX) for 54 Mbps OFDM/HT20 MCS7. [ABSTRACT FROM AUTHOR]

With CMOS process developing, the Static Random Access Memory (SRAM) suffers unavoidable degradation in terms of read and write stabilities. To optimise the memory with conventional 6-T cell in 7-nm process technology, Response Surface Method (RSM) is adopted to get the optimised relationship among the noise margin, the operating temperature, the supply voltage, the unit ratio, the pull-up ratio and the pre-charged voltage, et al. It shows that RSM approach is an effective statistical method for the optimisation of the SRAM cell, especially in the nano-scale scheme. In order to prove the superiority of the RSM approach, the noise margin variation is investigated from 90 nm to 7 nm technology nodes based on the general butterfly curves approach for the comparison. It shows that the stability of the SNM of the 6-T cell tends to be degraded with the continuous shrinkage of the process nodes. The RSM approach is demonstrated to be an effective way for the optimisation of the SRAM cell in single-digit nanometre node. [ABSTRACT FROM AUTHOR]