Search

An extrinsic electron induced by a dielectric (EID) AlGaN/GaN MOS high-electron-mobility transistor (HEMT) on Si substrate was designed and investigated. The EID structure with SiO2 deposition and subsequent high-temperature annealing, which induces two-dimensional electron gases (2DEGs) on fully depleted AlGaN/GaN hetero-epitaxial layers with thin AlGaN barrier layer, was applied to access and drift regions in the HEMT. The fabricated HEMT exhibited enhancement-mode operation with a specific on-resistance of 7.6 mΩ cm2 and a breakdown voltage of over 1 kV. In addition, electron state analysis using hard X-ray photoelectron spectroscopy revealed that changes in the chemical states of Al and energy level lowering at the SiO2/AlGaN interface affect the induction of 2DEG in the EID structure. The proposed HEMTs should become a strong candidate for highly reliable high-power switching devices due to the damage-less fabrication without dry etching or fluorine plasma exposure processes on the semiconductor layers.

The effect of annealing on the physical properties of an SnS thin film and also on SnS/CdS heterojunction band alignment was studied. Vacuum annealing has greatly improved the crystalline quality of SnS and an average grain size of 1.6 μm was achieved. Sulfur-rich secondary phases observed on the surface of as-grown SnS thin film were eliminated after vacuum annealing, resulting in a decrease of the resistivity and an increase of the carrier concentration of the film. A maximum hole mobility of 17 cm2 V−1 s−1 was obtained for SnS thin films annealed at 400 °C. A transition of SnS/CdS heterojunction from “spike” type to “cliff” type was observed when the vacuum annealed SnS thin film was post-air-annealed at 200 and 250 °C. The band alignment of SnS/CdS heterojunction could be adjustable between “spike” type to “cliff” type via vacuum annealing followed by post-air-annealing.

Cu2ZnSnS4 (CZTS) is interesting as a light absorption layer for thin-film solar cells because it consists of only earth-abundant materials such as copper, zinc, tin, and sulfur. The poor adhesion between CZTS and molybdenum (Mo), which is the back metal contact material, causes CZTS to peeling off during the chemical bath deposition (CBD) for the formation of CdS as a buffer layer. This induces severe degradation of the solar cell performance. In this study, we investigated the effect of annealing following back contact metal layer formation on CZTS stability and solar cell performance. By annealing Mo/soda lime glass at 400 °C in atmosphere, Mo was oxidized, and the surface roughness of Mo increased. On the Mo surface, the CZTS peeling off was suppressed during the CBD process, resulting in an improvement in the shunt resistance.

Au layer thickness dependence (9–34 nm) of Ge crystallization in the metal-induced layer exchange process has been investigated. It has been found that Ge crystals are (111) oriented when the Au layer is as thin as 9 nm, whereas crystal grains are randomly oriented when the Au layer is as thick as 34 nm. The difference is discussed in terms of the difference in the position of nucleation sites of Ge crystals.

This paper investigated the multi-level 2-bit/cell operation utilizing a Hf-based metal/oxide/nitride/oxide/silicon (MONOS) nonvolatile memory (NVM) device with a HfO2 and HfON tunneling layer (TL). The 2-bit/cell operation is realized by utilizing the localized charge injection method. It was found that drain-current–gate-voltage (I D–V G) characteristics of the programmed states were affected by asymmetry localized in a trapped location along the channel direction. Moreover, the amount of localized trapped charge is strongly affected by drain-source voltage (V DS) in the case of HfON TL. HfON TL shows distinguishable separated all programmed states compared to HfO2 TL. Finally, it was found that all programmed states of HfO2 and HfON TL show similar characteristics according to the channel length and width (L/W) of 2–10/15–90 μm.

An impact of the vacuum anneal of Al/Ge(111) structure on the Ge segregation has been investigated to get an insight into the precise control of ultrathin Ge crystalline growth. The Al/Ge(111) structure was prepared by thermal evaporation of Al on wet-cleaned Ge(111) and then vacuum annealed without air exposure to promote Ge formation on the Al surface. The Ge formation and its chemical bonding features were evaluated by X-ray photoelectron spectroscopy analysis. In addition, changes in the average Ge thickness depending on annealing temperature and time were crudely estimated. We found that the annealing temperature had a greater effect than time on the control of sub-nanometer scale Ge growth.

AlGaN/GaN high electron mobility transistors (HEMTs) on GaN substrates with different thicknesses of GaN channel and C-doped buffer layers were fabricated and characterized with conventional DC and side-gate (SG) measurements. In SG measurement, drain current (I D) was measured while SG bias (V SG) was applied through a separate SG contact that surrounds the device active region. Whereas all HEMTs have comparable DC measurement results (∼500 mA mm−1 I D, −2 V threshold voltage and ∼130 mS mm−1 transconductance), SG measurements show drastically different performances among the samples. Comparing HEMTs with and without C-doped buffer layer, results demonstrate that HEMT with doped buffer was stable against SG modulation until −15 V V SG, whereas the HEMT without doped buffer was modulated near 0 V, and hence unstable against SG bias. Comparing HEMTs different channel thicknesses, the HEMT with a thicker 900 nm channel was more resistant to SG modulation than the HEMT with a thinner 100 nm channel. Therefore, these results highlight the importance of buffer doping and channel thickness to buffer stability.

We performed single-walled carbon nanotube (SWCNT) growth on flexible stainless-steel foils by applying alcohol catalytic chemical vapor deposition (CVD) using an Ir catalyst with an alumina buffer layer. When the alumina thickness was 90 nm, vertically aligned SWCNTs with a thickness of 4.6 μm were grown. In addition, Raman and transmission electron microscope results showed that the diameters of most SWCNTs were distributed below 1.1 nm. Compared with conventional CVD growth where Si wafers are used as substrates, this method is more cost effective and easier to extend for mass production of small-diameter SWCNTs.

Monocrystalline Pb(Zr, Ti)O3 (mono-PZT) thin films are suitable for specific MEMS applications. However, these films are more brittle than general polycrystalline PZT thin films. Herein, we focus on an epitaxial PZT thin film with multiple variants in the in-plane direction. Such a unique crystalline structure is expected to have properties intermediate between the mono- and polycrystalline PZT thin films. Such a film is called as "epi-poly" thin film in this paper. We formed an LaNiO3 buffer layer with three variants as an underlayer. PZT was then sputter-deposited onto it. Thus, a (100)-oriented epi-poly PZT thin film with three variants was obtained. Its piezoelectricity, |e31,f|, dielectric constant, er33, dielectric loss, and tanδ were measured to be approximately 9 C/m2, 750–800, and 0.02, respectively. Nano-indentation tests on the epi-poly and mono-PZT thin films indicated that the former had superior mechanical robustness than that of the latter.

AlGaN-based ultraviolet light-emitting diodes (UV-LEDs) are key components for the inactivation of viruses. Highly efficient and high-power UV-LEDs, capable of inactivating viruses in a short time, are in demand. For this purpose, the growth technologies of n-type AlGaN contact layers were developed from two points of view: first, to decrease the resistivity of n-type Al0.62Ga0.38N by minimizing the electron compensation, resulting in electronic degeneracy with metallic conduction;second, to improve the light emission uniformity in AlGaN multiquantum wells (MQWs) by controlling the morphology of the underlying n-type AlGaN layer to inhibit macrostep formation. A UV-LED module emitting at 275 nm was demonstrated with the developed growth technology, and illuminated with an irradiation power of 2.6 mW cm(-2) on SARS-CoV-2 samples. Over 99.999 % of viruses were inactivated within 5 s owing to the high power of this module.

To explain the deviation in the valence subband energy levels of the Si(111) inversion layer obtained by experiments and calculations, the band edge profile that has the same subband levels as the experimental results is searched through numerical calculations. The obtained band edge profile is characterized by its flat feature in the subsurface region over 1.2 nm from the surface of the Si substrate. By taking the second derivative of the obtained band edge profile, the carrier distribution in the space charge layer is obtained, and the existence of negative charges in the subsurface region is revealed. The origin of the negative charges is attributed to the inhomogeneous valence electron distribution due to the standing wave formation in the narrow space charge layer.

In the coming years, threshold switching based on insulator-metal phase transition (IMT) devices is expected to be applied in selector devices for reducing sneak currents and building blocks for neuromorphic computing. In this work, we fabricated IMT devices using NbOx as an insulator layer and compared the device performance for two cases with metal electrodes: an asymmetric electrode device of stacked Pt/Ti/TiN/NbOx/Pt films, and a symmetric electrode device of Pt/Ti/TiN/NbOx/TiN/Ti/Pt. We changed the atomic ratio of Nb and O in NbOx films by controlling the argon-to-oxygen flow ratio during reactive sputtering. In the case of the asymmetric device, we observed a clear hysteresis loop in the current-voltage characteristics, indicating threshold switching only when a positive voltage was applied to the top electrode. We proposed a model in which a domain of the NbO2 phase is present in contact with a filament with oxygen vacancies, with its size changing depending on the direction of the electric field. On the other hand, in the case of the symmetrical device, nearly symmetric hysteresis loops were observed for both positive and negative voltage sweeps.

ZnO nanowires were grown by mist chemical vapor deposition at a growth temperature of approximately 900 °C (tube furnace temperature) on a c-plane sapphire substrate sputtered with a thin Au layer with a designed thickness of 3 nm. ZnO nanowires of various lengths were grown, and their optical properties were investigated by room-temperature photoluminescence (RT-PL) measurements under high excitation conditions. The RT-PL spectra having sharp peaks may be capable of lasing actions. The result shows that this fabrication technique is useful for obtaining optical microcavities based on ZnO nanowires.

We applied a damage-free substrate removal technique using photoelectrochemical etching (PECE) by incorporating sacrificial layer In0.12Ga0.88N single quantum well (SL-SQW) types in semipolar ( 20 2 ¯ 1 ) flip-chip laser diode (FC-LD) structures. Although 40 nm type I promoted the development of high-quality green active region devices in terms of managing strain relaxation, processing was required under low-temperature KOH. However, 10 nm type II exhibited a smooth n-type GaN surface with room-temperature KOH, thereby promoting the applicability of the proposed technique for either a short light emitter or a combination with type I. The temperature-dependent PECE of SL-SQW types is important in realizing advanced FC-LDs.

The effect of an Al buffer layer on the growth of AlN on a Si (111) substrate was investigated to develop an all-sputtered GaN film on a Si (111) template substrate. The X-ray diffraction method revealed an obvious improvement in the crystallinity of an AlN layer on the initial layer. At the interface structure, AlN film without the Al buffer layer exhibited surface nitridation of the Si surface, which degraded the AlN crystal growth. After investigating various growth conditions such as substrate temperature and layer thickness, we achieved the all-sputtered epitaxial growth of a GaN/AlN/Si substrate. The substrate temperature was below 650 °C, and the total thickness was less than 200 nm, which is beneficial as regards the cost efficiency of the template substrate for nitride semiconductors.

Thin film growth of Zn x Mn1−x S on a Si (100) substrate by sputtering was investigated for nonpolar AlN film growth on Si (100) substrate. The Zn x Mn1−x S buffer layer reduces the large differences in thermal expansion coefficient and lattice constants between AlN and Si. Although the solubility of ZnS in MnS is less than 5% at 800 °C in bulk form, the insertion of a room-temperature MnS layer between Zn x Mn1−x S and Si enabled (100)-oriented cubic-Zn x Mn1−x S film growth even at x = 9.5%, which is a metastable phase and a phase separation region in bulk form. On the (100)-oriented cubic Zn x Mn1−x S film, nonpolar AlN growth was achieved by sputtering. Furthermore, X-ray photoelectron spectroscopy measurements revealed that the Zn x Mn1−x S film improved the stability of the AlN/Zn x Mn1−x S interface. Zn x Mn1−x S has the potential to enable nonpolar AlN growth on large-diameter Si (100) substrates.

This is the Accepted Manuscript version of an article accepted for publication in Japanese Journal of Applied Physics. IOP Publishing Ltd are not responsible for any errors or omissions in this version of the manuscript or any version derived from it. The Version of Record is available online at https://doi.org/10.35848/1347-4065/abec5a., Elastic constants and sound velocities of nm order thin films are essential for designing acoustic filters. However, it is difficult to measure them for dielectric thin films. In this study, we use a three-layer structure where a dielectric nano-thin film is sandwiched between thicker metallic films to measure the longitudinal elastic constant of the dielectric film. We propose an efficiency function to estimate the optimal thicknesses of the components. We use Pt/NiO/Pt three-layer films for confirming our proposed method. The determined elastic constant of NiO deposited at room temperature is smaller than the bulk value by ∼40%. However, it approaches the bulk value as the deposition temperature increases. We also reveal that the uncertainty of the elastic constant of the Pt film insignificantly affects the accuracy of the determined elastic constant of NiO in this structure.

A non-equilibrium 2D plasma was induced on the insulating plate by a dielectric barrier discharge under a flowing mixture of nitrogen and oxygen gases. A titanium-peroxo precursor to prepare an anatase TiO2 film was irradiated with the plasma. The technique was applied to form a porous TiO2 layer for a dye-sensitized solar cell (DSSC). We found the N–O metastable plasma induced under the higher nitrogen gas concentration played an important role in forming a porous TiO2 layer and promoted a necking process between the TiO2 particles to reduce an internal resistance within the layer. The DSSC fabricated with the porous TiO2 layer showed maximum conversion efficiency of 3.7%, which was lower than that of the general DSSC. However, with a non-equilibrium 2D plasma, the substrate temperature was kept below 80 °C during the plasma irradiation, which opens the way for subsequent progress in producing a DSSC for daily use.

InAs quantum dots with InGaAs strain-reducing layer on GaAs(001) grown at three different temperatures were investigated from the aspect of both structural and optical properties. Dislocations originated from the InAs quantum dot (QD) layer were observed at growth temperatures of 490 °C, 500 °C, and 510 °C. Their densities are relatively larger in the cases of 490 °C and 510 °C, where they are caused by strain accumulation at larger-size InAs quantum dots during cover layer growth. Photoluminescence lifetimes at 6 K are almost the same in the three samples. On the other hand, that of the 500 °C-grown sample is an order of magnitude larger than the other two samples at 300 K. This indicates that dislocations act as a non-radiative center to deteriorate optical characteristics. Growth around 500 °C suppresses the growth of larger-size InAs QDs and reduces the InAs strain accumulation, which leads to the dislocation formation at the cover layer.

We propose a fabrication process for a silicon on insulator (SOI) wafer with an extremely thick buried oxide (BOX) layer for custom micro-electro mechanical systems (MEMS) devices. A BOX layer is generally formed by thermal oxidation above 800 °C. It is limited for this method to form an extremely thick layer of more than 10 μm. Thus, we attempted to deposit the BOX layer by chemical vapor deposition at 300 °C for a short time, followed by annealing at above 300 °C to make it denser. In addition, a silicon layer was bonded to the BOX layer at room temperature by surface activated bonding not to receive thermal stress. As a result, the bonding interface had no voids. The breakdown electric field of the BOX layer in the accidental B mode was improved by annealing. Therefore, SOI wafers fabricated by our method will be beneficial to next-generation MEMS device fabrication.

We experimentally studied three types of group-IV-semiconductor quantum-dots (IV-QDs) of Si-, SiC-, and C-QDs in a thermal SiO2 layer that were fabricated using a very simple hot-ion implantation technique for Si+, double Si+/C+, and C+ into the SiO2 layer, respectively, to realize a different wavelength photoluminescence (PL) emission from near-IR to near-UV ranges. TEM analyses newly confirmed both Si- and C-QDs with a diameter of approximately 2–4 nm in addition to SiC-QDs in SiO2. We successfully demonstrated very strong PL emission from three IV-QDs, and the peak photon energies (E PH) (peak PL-wavelength) of Si-, and SiC-, and C-QDs were approximately 1.56 eV (800 nm), 2.5 eV (500 nm), and 3.3 eV (380 nm), respectively. IV-QDs showed that the PL properties strongly depend on the hot-ion doses of Si and C atoms and the post N2 annealing processes. Consequently, it is easy to design peak PL wavelengths by controlling the ion doses of Si+ and C+ implanted into the SiO2 layer.

In this paper, we present hetero acoustic layer (HAL) structures based on ScAlN thin films with a c-axis tilt angle. The surface acoustic wave (SAW) excitation modes and their propagation characteristics for different Euler angles (0°, θ, ψ) of the ScAlN thin film are analyzed using the finite element method. We find that the acoustic field distribution of HAL structures can be adjusted by rotating their Euler angles and that normal SAWs are suppressed; however, leaky SAWs (LSAWs) with significantly improved electromechanical coupling coefficients (K 2) are excited. A maximum K 2 of 14% can be obtained for shear horizontal (SH)-type LSAWs, which is almost 7 times larger than that of the previously reported normal SAW Sezawa mode. Moreover, the optimized HAL structure consisting of (0°, 90°, 60°) ScAlN thin film/SiO2/AlN/Si simultaneously possesses a larger K 2, a wider bandwidth, and a higher Q value, which is promising for the design and application of wideband SAW devices with high performance.

Enhanced oxidation of the 4H-SiC surface in an oxygen-lean environment by a thin CeO x layer was confirmed. By capping with a 40 nm thick SiO2 layer on a 1 nm thick CeO x layer, the formation of the interfacial SiO2 layer was suppressed, and the growth of the capped SiO2 layer was observed instead. A high peak field mobility of 54 cm2 V−1 s−1 was obtained with the structure, which is higher than the commonly used thermally grown SiO2 layer with NO-based high-temperature annealing. Moreover, the threshold voltage kept higher than 2 V, which has an advantage over other mobility enhancement gate oxide formation processes.

In order to improve the heat insulating properties of low-emissivity coatings, it is necessary to reduce the electrical resistivity of their multilayer structure, which consists of an Ag layer and oxide layers. In this study, structures comprising glass/ZnO/Ag and glass/TiO2/ZnO/Ag were deposited by sputtering, and the effects of these layers on the electrical resistivity were investigated. For a ZnO layer deposited at low sputtering gas pressure, lower surface roughness reduced the electrical resistivity of the Ag layer. Also, it was found that the electrical resistivity could be further decreased by inserting a TiO2 lowermost layer between the substrate and the ZnO layer. The results of X-ray diffraction and X-ray reflectivity measurements showed that the decrease in resistivity was mainly due to the improved crystal orientation of the ZnO and Ag layers.

The theoretical lateral current of the surface inversion layer in a crystalline silicon (cSi) surface for a p-aSi:H/i-aSi:H/cSi heterojunction (SHJ) solar cell was calculated using computer simulation and was compared with the experimental one to study defects/traps at the aSi:H/cSi interface and/or in the cSi surface and to detect the acceptor concentration (N a) in p-aSi:H. To experimentally extract the lateral surface inversion layer current, a field-effect transistor type test element group device was co-integrated with SHJ cells on the same wafer. From the correlation between the experimental and calculated lateral surface inversion layer current, the density of defects/traps (D it) at the aSi:H/cSi interface and/or in the cSi surface and the value of N a were extracted. The calculated lateral surface inversion layer current stayed unchanged for various minority carrier lifetimes in the substrate, suggesting that this method is not suffered from the variation in the material parameters in the substrate.

We fabricated pentacene memory transistors using a monolayer of ligand-exchanged and energy-level-controlled PbS colloidal nanodots (NDs) as charge-trapping layers, and it was demonstrated that the writing and retention times were reduced and increased, respectively. This result is explained with a model that the memory effect is due to the electrons tunneled from the pentacene layer into the PbS NDs when a writing voltage was applied. According to this model, the writing and retention characteristics were improved because of the lowered electron energy levels in the NDs.

Zn x Fe1−x Fe2O4 nanoparticles (x = 0.0–0.25) were synthesized by the coprecipitation method. Their microstructure was investigated by X-ray diffraction with Rietveld refinement software, energy-dispersive X-ray spectroscopy, transmission electron microscopy, and Fourier transform infrared absorption spectroscopy. Their thermal, magnetic properties were investigated by thermogravimetric analysis and vibrating-sample magnetometer. The nanoparticles exhibited superparamagnetic properties, with a maximum saturation magnetization of 80.2 emu g−1 in H = 11 000 Oe at room temperature for sample with x = 0.20. The Zn nonmagnetic element content is related to the cation distribution in the superlattices and magnetic moment of the particles. The Zn0.15Fe0.85Fe2O4 nanoparticles were coated with polyvinyl pyrrolidone (PVP) with different PVP mass. Their core–shell structure was investigated, the results showed that their chemical stability and saturation magnetization were greater than those of pure Fe3O4. PVP has biological compatibility; thus, Fe0.85Zn0.15Fe2O4/PVP0.75 nanocomposite has the potential to be widely used in medical biology, science and technology.

Morphological structures of two-dimensional (2D) Ge thin films and three-dimensional (3D) Ge dots/islands grown on SiO2 substrates were analyzed with UV–visible spectroscopic ellipsometry. The pseudo-dielectric functions (〈ε〉 = 〈ε 1〉 + i〈ε 2〉) were calculated under the Bruggeman effective medium approximation. The 〈ε〉 spectra of 2D films were well fitted with a simulation assuming a single-layer or two-layer model. The single-layer model has a mixture of c-Ge, a-Ge, and void components. The two-layer model has a base-layer consisting of 100% c-Ge and a surface-roughness layer consisting of a mixture of c-Ge, a-Ge, and voids. In the case of 3D films, the overall shape of the 〈ε〉 spectra could only be reproduced by using a two-layer model: a base-layer consisting of mixtures of c-Ge and a-Ge with a surface-roughness layer consisting of c-Ge, a-Ge, and voids. The degree of disagreement correlated with the root mean square surface roughness measured by atomic force microscopy.

Subsurface damage (SSD) in chemical mechanical polishing (CMP)-finished (010)-oriented β-Ga2O3 substrates was investigated using optical microscopy and X-ray topography (XRT). Damaged layers at the surface of (010)-oriented substrates caused by lapping and mechanical polishing had measured thicknesses of 50 μm and 20 μm, respectively, but no detectable damage was caused by CMP. The damage remained as SSD underneath the CMP-finished surface unless the SSD was completely removed by heat treatment. XRT images of an SSD-free (010)-oriented substrate prepared using CMP after heat treatment unambiguously showed dislocations and twin boundaries.

Efficiency and operational durability are crucial characteristics for the high-performance quantum-dots light-emitting diodes (QLEDs). In order to improve the efficiency and the stability of the QLEDs, we have inserted an inorganic Al2O3 interfacial modification layer (IML) next to the electron transport layer (ETL) using atomic layer deposition (ALD). We conducted a comparative analysis of two different positions of Al2O3 IML inside the device, inserting IML before ETL and after ETL, to find an optimized structure for the efficient QLEDs. As a result, when Al2O3 IML was located after ETL, reduction of oxygen vacancy in the ZnO layer was occurred due to the reaction of O2 plasma reactant that used during the ALD process. It can have the effects of decreasing the exciton quenching phenomenon and balancing the charge injection. Therefore, improved device performances were observed, and the maximum luminance was 56 108 cd m−2 when 1 nm Al2O3 IML was deposited after ZnO ETL. These results suggest Al2O3 IML deposition would provide a useful way to improve the performance of QLEDs.

Thermochomic VO2 thin films are fabricated by using high power impulse magnetron sputtering (HIPIMS) at room temperature. In order to increase the crystallinity and transparency of VO2 thin films, a barrier layer of TiO2 is deposited on the glass substrate. Then TiO2/VO2 stacks are post-annealed at a temperature of 500℃ for 3 minutes. The transmittance properties as functions of TiO2 and VO2 thicknesses are discussed. The effects of TiO2 thickness on the strain state of (011) and (2 11) planes of monoclinic phase are studied. The laminated film shows satisfactory optical properties with an excellent solar regulation efficiency (ΔTsol=10.2 %) and an acceptable luminous transmittance (Tlum=41.1 %) in a low-temperature state. Good endurance property is demonstrated using a thermal stress cycle of 25℃/85℃ for 100 times.

Carbon nanoparticles (CNPs) incorporated diamond-like carbon (DLC) films have been fabricated by a combination of rf sputtering and plasma chemical vapor deposition. Spherical CNPs with a mean size of 21.2 nm are sandwiched between DLC layers with a mass density of 1.7 g/cm3. The film stress is decreased to 119 MPa, by depositing the CNPs over the base DLC layer at a surface coverage of 10.7%. This reduction is approximately half of that without CNPs. Raman spectroscopy indicates the insertion of CNPs barely alters the bonding structure of the upper DLC layer.

Abdulrahman H. Basher, Ikutaro Hamada, and Satoshi Hamaguchi. Jpn. J. Appl. Phys. 59 090905., In thermal atomic layer etching (ALE) of Ni, a thin oxidized Ni layer is removed by a hexafluoroacetylacetone (hfacH) etchant gas at an elevated surface temperature, and etching ceases when a metallic Ni surface appears (self-limiting step). However, atomistic details of the self-limiting step was not well understood. With periodic density-functional-theory calculations, it is found that hfacH molecules barrierlessly adsorb and tend to decompose on a metallic Ni surface, in contrast to the case of a NiO surface, where they can form volatile Ni(hfac)2. Our results clarify the origin of the self-limiting process in the thermal ALE.

This research investigates the cause of lifetime reduction properties of a crystalline defect layer introduced by the plasma process such as reactive plasma deposition (RPD). The plasma irradiation damage to silicon substrate with the different oxygen and carbon concentrations were evaluated. Minority carrier lifetime of the silicon substrate after the RPD process has been significantly reduced by plasma irradiation. Furthermore, photoluminescence (PL) spectroscopy revealed that the cause of the lifetime degradation on the silicon substrate is Ci–Oi defect generation originated in the plasma irradiation during the RPD process.

In this paper, we demonstrate retention improvement in nonvolatile charge-trapping memory cells by tunneling oxide engineering with Al2O3. By utilizing SiO2/Al2O3/SiO2 layers for the tunneling oxide, it is shown that the threshold voltage window after 10 years is significantly improved from 0.78 V to 4.18 V through Synopsys Sentaurus technology computer-aided design simulation. In addition, retention improvement from incorporating SiO2/Al2O3/SiO2 tunneling layers is compared with that using SiO2/Si3N4/SiO2 tunneling layers. The relationship between charge-trapping layer thickness and trapped charge emission is also investigated. As a result, we open up the possibility of using HfO2 as a charge-trapping layer with significant reliability enhancement.

Four types of perovskite solar cells (PVK PV) were fabricated to investigate the effect of charge separation interface (p/n junction) for inverted and normal structures. For inverted structures, (1)TCO/p-type/p-PVK/n-type and (2)TCO/p-type/n-PVK/n-type, were prepared by changing the PVK composition. For normal structures, (3)TCO/n-type/n-PVK/p-type and (4)TCO/n-type/p-PVK/p-type structures were fabricated in the same way. The solar cell efficiency of (2) was better than that of (1), and (3) showed higher efficiency than (4). In all cases, the cell in which p/n junction is located at the back side of PVK layer from the incident light direction gave higher efficiency. Band bending, Felmi level, carrier mobility were measured for these PVK layers and solar cells. We concluded that the higher efficiency for (2) and (3), where both cells of p/n junction are located on the bottom of the PVK layer, is explained by higher mobility of minority carriers, respectively.

In this study, the effect of growth of intermetallic compound (IMC) layer between Au-Sn solder and electroless Ni/immersion Au (ENIG) on the thermal resistance of a flip-chip (FC) light emitting diode (LED) package was investigated. Two IMC layers were formed at the interface of FC LED package, including Au5Sn and (Ni,Au)3Sn4 that were identified using a transmission electron microscopy (TEM). A thermal aging test was carried out at 200 °C for 1000 h to observe IMCs growth. After 1000 h, the (Ni,Au)3Sn4 thickness increased to about 1.5 µm and the thermal resistance of the FC LED package increased by 3.5 times compared to the initial thermal resistance of 2 K/W. As the (Ni,Au)3Sn4 grew, a calculation of thermal resistance also increased comparing to the initial aging test, thus, the growth of (Ni,Au)3Sn4 layer can be effective factor on the increase of thermal resistances of FC LED package.

The high-power microwave breakdown on the atmosphere side of the dielectric surface leads to the formation of the thin plasma layer. A two-dimensional model coupling Maxwell's equations with quasi-neutral plasma fluid equations is used to study the breakdown evolution. We concentrate on the breakdown caused by the incident electric field parallel to the dielectric surface. The results show that the electric field enhancement at the tips of plasmoid in the direction parallel to the dielectric surface accelerates the propagation of the plasma front, while the propagation speed in the perpendicular direction decreases in time since the upstream plasma collapses the local electric field. The difference between the two speeds is responsible for the formation of the thin plasma layer. The effect of air pressure on the breakdown evolution is discussed. The breakdown delay time from simulations as a function of pressure shows the same trend as the experiment.

Selective metal-vapor deposition using photochromic diarylethene (DAE) enables the formation of fine metal patterns for various organic devices by maskless vacuum deposition. We investigated the resolution of fine metal patterns generated by selective Mg-vapor deposition. A DAE layer on a photomask substrate generated a corresponding fine isomerization pattern by UV-irradiation through the substrate. A clear Mg pattern was formed for the isomerization width with a resolution of a 10-μm level by maskless Mg deposition but a blurred Mg pattern was obtained on the line and space isomerization patterns with a several-μm level; no-Mg deposition was observed at the edge of the colored area. This is because Mg atoms diffuse a distance of several microns on the colored surface. The diffusion distance depended on a glass transition temperature (Tg) of the colored surface and a DAE with a higher Tg in the colored state would enable a higher metal-pattern resolution.

Memory capacitors with stacked Zr0.5Si0.5O2/SiO2/Zr0.5Si0.5O2/SiO2/Zr0.5Si0.5O2 trapping layers are fabricated, and the effect of inserted SiO2 thickness on memory characteristics is investigated. It is observed that the electric field across the tunneling layer, electrostatic repulsive forces between adjacent interfaces, electron tunneling thickness, occupied probability of traps and temperature jointly contribute to the memory characteristics, and the optimal thickness should be in the range of 1.3–1.7 nm, taking into consideration the trade-off between memory window, program/erase speed and data retention characteristics. In the aspect of selecting inserted layer thickness, the result provides useful references for future charge trapping memory applications.

ZnS/Au/ZnS (ZAZ) transparent conductive tri-layer films with different Au layer thickness have been prepared by a pulsed laser deposition technique, and the effect of Au layer thickness on the optical and electrical properties of ZAZ films has been studied in detail. As-deposited ZAZ films showed an intense X-ray diffraction peak corresponding to ZnS (111) orientation and a very weak peak belonging to the Au (111) plane. The optical transmittance first increases and then decreases with the increase of Au layer thickness, which is due to the fact that Au changes from discontinuous island-shape to near-continuous structure when Au increases from 2 to 10 nm, and when Au is above 10 nm, the reflection of Au layer is enhanced. With the increase of Au layer thickness, both the sheet resistance and the resistivity of ZAZ films decrease, and the carrier concentration and the mobility increase. When the Au layer thickness is 10 nm, ZAZ films have the best figure of merit of 2.44 × 10−3 Ω−1.

Organic light-emitting diodes with trilayer PIN structures are fabricated using only thiophene/penylene co-oligomer derivatives: 5,5'-bis(4-biphenylyl)-2,2'-bithiophene (BP2T), 5'''-bis(4-trifluoromethylphenyl)[2,2';5',2'';5'',2''']quaterthiophene (P4T-CF3), and 5,5'-bis-(4'-cyanobiphenyl-4-yl)-2,2'-bithiophene (BP2T-CN) as the P, I, and N materials, respectively. As designed from their expected frontier orbital energies, electroluminescence (EL) is obtained from the P4T-CF3 layer. When the BP2T layer is first deposited on an indium-tin-oxide (ITO) substrate, the device (Al:Li/BP2T-CN/P4T-CF3/BP2T/ITO) shows homogeneous EL. On the other hand, the device with an opposite deposition order (Au/BP2T/P4T-CF3/BP2T-CN/ITO) shows dotted EL with higher efficiency at lower bias voltages. By decreasing the deposition rate of the P4T-CF3 layer in the latter device, its morphological change results in homogeneous EL with increased density of dotted emission.