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Spin-torque oscillators (STOs) are new oscillating devices based on spintronics technology with many advantageous features, i.e., nanoscale size, high tunability, and compatibility with standard silicon processing. Recent research has shown that two electrically connected STOs may operate as a single device when specific conditions are met. To overcome the limitation of the small output power of STOs, the phase-locking behavior of multiple STOs is hereby extensively investigated. In this paper, we present a circuit-level model of two coupled STOs considering the interaction between them such that it can represent the phase-locking behavior of multiple STOs. In our model, the characteristics of each STO are defined first as functions of applied DC current and external magnetic field. Then, the phase-locking condition is examined to determine the properties of the two coupled STOs on the basis of a theoretical model. The analytic model of two coupled STOs is written in Verilog-A hardware description language. The behavior of the proposed model is verified by circuit-level simulation using HSPICE with CMOS circuits including a current-mirror circuit and differential amplifiers. Simulation results with various CMOS circuits have confirmed the effectiveness of our model.

The spin-torque oscillator (STO) is a new compact device operating as a tunable RF oscillator in the tens of gigahertz range whose characteristics are determined by the applied current and magnetic field. In this paper, we present a physics-based empirical circuit-level model of an STO that is compatible with circuit-level simulators such as SPICE. The characteristics of an STO are modeled as physics-based analytic functions of the applied current and external magnetic field. The validity of our model was verified by the HSPICE simulation of a current mirror circuit that contains an STO element. The simulation results are in good agreement with the experimental data in the normal operation range. High-order nonlinear effects at large currents are not included in our model because there is no theoretical equation available yet that can precisely explain these effects.

In spin transfer torque (STT)-based magnetic tunnel junction (MTJ), the switching depends on the current pulse-width as well as the magnitude of the switching current. We present an advanced macro-model of an STT-MTJ for a circuit simulator such as HSPICE. The macro-model can simulate the dependence of switching behavior on current pulse-width in an STT-MTJ. An imaginary resistor–capacitor (RC) circuit is adopted to emulate complex timing behavior which cannot be described nicely by existing functions in HSPICE. Simulation results show the resistance–current (R–I) curve and timing behavior is in good agreement with the experimental data.

Magnetoresistive random access memory (MRAM) using a magnetic tunnel junction (MTJ) memory cell has the potential to revolutionize both high-density and high-speed memory applications with devices exhibiting non-volatility and good write endurance. This work presents a macromodel for an MTJ that is applicable to an HSPICE circuit simulator. The macromodel is realized as a five-terminal subcircuit that reproduces the characteristics of an MTJ including hysteresis and asteroid curves with thermal variation, and the R–V characteristics.

A novel sensing scheme for a magneto-resistive random access memory (MRAM) with a twin cell structure is presented. New sensing circuit has very simple structure while providing stable operation. Voltage-controlled transistor switch limits the voltage across the magnetic tunnel junction (MTJ) under 400 mV while reading. The circuit layout is small enough to fit into 4-cell pitches that high speed synchronous operation is made possible in MRAMs as in DRAMs or SRAMs. We have fully integrated a 256 bit synchronous MRAM operating at 100 MHz with 0.35 µm complementary metal oxide semiconductor (CMOS) technology.