Search

Ferroelectric domain-wall random access memory (DWRAM), based on the utilization of highly conductive domain walls in insulating ferroelectric LiNbO 3 (LNO) single-crystal thin films, holds great promise for the future of memory storage. The ability to scale this technology up in a crossbar architecture means that it has the otential to surpass the storage density capabilities of commercial ferroelectric random access memory devices. Nevertheless, the passivation layer in the vertically integrated structure (VIS) architecture is critical because it affects many vital parameters of the memory such as retention, on/off current ratio, reliability, etc. Therefore, a detailed strain investigation of silicon nitride and silicon dioxide fabricated by plasma-enhanced chemical vapor deposition (PECVD) is presented. Furthermore, the effect of residual strain on the electrical properties of LNO DW cells was investigated. The results indicated that a monolayer of SiO 2 or Si 3 N 4 is not a good choice for the insulating layer because of the undesirable passivation caused by defects and residual strain. Hence, a Si 3 N 4 /SiO 2 composite passivation layer is proposed, which not only solves the residual strain problem but also ensures good insulation performance. Finally, a crossbar array of DW memory cells with an on/off current ratio greater than 104 was fabricated using the Si 3 N 4 /SiO 2 composite dielectric layer, demonstrating good uniformity and retention. This work validates the feasibility of high-density integration of LNO domain wall memories and provides a foundation for selecting passivation layers in the VIS architecture. • In ferroelectric domain wall random access memory, SiO 2 or Si 3 N 4 is not a good choice for insulating layer due to undesirable residual strain. • A Si 3 N 4 /SiO 2 composite passivation layer not only solves the residual strain problem, but also ensures good insulation performance. • A crossbar array of DW memory cells was fabricated using the Si 3 N 4 /SiO 2 composite dielectric layer, demonstrating good uniformity and retention. [ABSTRACT FROM AUTHOR]

• The conductivity of the NDWs is three orders of magnitude higher than the T-T DWs but is one order of magnitude lower than the H-H DWs in a LiNbO 3 transistor. • The wall current is affected by discontinuous domain retraction across different voltage sweeping ranges. • The wall current is thermally activated and the activation energy changes at 260 K. Conducting domain walls in an insulating ferroelectric matrix are interesting for the development of next generation multifunctional nanodevices with large output powers. However, electrical conductions are diversified among head-to-head (H-H), neutral (N), and tail-to-tail (T-T) domain walls (DWs) with disputable conduction mechanisms. It is generally accepted that the charged DWs are more electrically conductive than the neutral DWs. However, the charged walls are unstable due to high depolarization energies. Here, we stabilized the H-H DWs, NDWs and T-T DWs within a LiNbO 3 transistor by controlling charge injection in compensation of the domain boundary charge under applied drain–gate, drain–source and gate–source voltages. The walls were created through the local 180° domain reversals in different inclined angles, and the transistors in different sizes were fabricated at the surfaces of 5 mol.% MgO-doped LiNbO 3 single crystals in monodomain patterns. The NDWs are positively charged due to small inclination angles (~1°) and local sideways meandering behavior of the charged dipoles with electrical conduction that is three orders of magnitude higher than that across the T-T DWs but is one order of magnitude lower than that across the H-H DWs. Voltage dependences of wall currents can be fitted according to the space-charge-limited current equation with an exponential coefficient varying between 2.1 and 3.7 in some specific voltage ranges, implying discontinuous domain retraction in different inclined wall angles against the reduced applied voltage to affect the wall current. This finding provides the fundamental physics to improve domain wall conduction via domain reconstruction and broadens the domain wall application in future nano-devices. [ABSTRACT FROM AUTHOR]