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In SiN/AlGaN/GaN heterostructures, the evaluation of interface charges at the SiN/AlGaN and AlGaN/GaN interfaces is crucial since they both rule the formation of the two-dimensional electron gas (2DEG) at the AlGaN/GaN interface. In this paper, we conducted a thorough analysis of the gate-to-channel capacitance CGC(VG) and of the drain current ID(VG) over a gate voltage VG range enabling the depletion of the 2DEG and the formation of the electron channel at the SiN/AlGaN interface. This work includes the establishment of analytical equations for VTH1 (formation of the 2DEG) and VTH2 (formation of the electron channel at the SiN/AlGaN interface) as a function of interface charges and of the p-doping below the 2DEG. The inclusion of the p-doped layer below the 2DEG and the use we made of VTH2 have not been reported in previous studies. Our analysis allows a reliable estimate of the interface charges at the AlxGa1−xN/GaN and SiN/AlxGa1−xN interfaces for various Al concentrations x as well as to demonstrate that the polarization charge at the SiN/AlxGa1−xN interface is compensated, which confirms previous findings. Moreover, this compensation is found to be induced by the AlGaN layer rather than the SiN layer.

International audience; This paper investigates the ability of second harmonic generation (SHG) to probe the passivation quality of atomic layer deposited (ALD) Al2O3 on Si by estimating the induced interface electric field due to fixed charges in the oxide. Samples with various oxide charges (Qox) and interface state densities (Dit) were fabricated, using different deposition parameters. The samples were characterized by capacitance-voltage (C-V) and microwave photoconductance decay (µ-PCD) measurements in order to evaluate Qox and Dit, as well as the effective minority carrier lifetime τeff. The SHG results were consistent with Qox, Dit and τeff values, proving the ability of the technique to monitor the interfacial quality in a contactless and non-destructive way. Optical simulations which use the electric field values obtained from the C-V measurements could reproduce the measured SHG signal. This demonstrates that SHG coupled with optical simulation can give access to the electric field magnitude and thus characterize the electrical properties of oxide/Si interfaces.

We report on the high-field (up to 10T) magnetoresistance measurements performed on the short (down to 75-nm gate length) n-type Si metal-oxide-semiconductor field-effect transistors. The electron magnetoresistance mobility of these nanometer devices was determined for a wide range of the electron concentration (107–1013cm−2, i.e., from a weak to a strong inversion) and gate length (10μm–75nm). In the case of long samples, the magnetoresistance mobility was compared to the effective mobility obtained by the standard parameter extraction and the split C–V techniques. The results are discussed in terms of the scattering power-law two-dimensional transport analysis. The data clearly indicate a significant decrease of the mobility with the gate length reduction below 100nm.

The physical bases of the most commonly used methods for the one-dimensional calculation of direct-tunneling current in metal–oxide–semiconductor (MOS) structures (i.e., Bardeen’s approach, the resonant transfer matrix method, and transparency-based approximations) are discussed. Each of them is presented in detail, underlining in a simple way the basic principles. In particular, an original derivation for Bardeen’s approach is proposed. A comparison of the different methods is then carried out for the simple case of two square quantum wells, where analytical solutions can be given, and for actual MOS structures, taking into account quantization effects. It is shown that all these methods, despite the very different formalisms, are based on similar physical approaches and provide very close results.

We investigate physical mechanisms of random telegraph signal (RTS) noise in reverse base current of hot carrier-degraded polysilicon emitter bipolar junction transistors. RTS noise, analyzed in the time domain, is studied as a function of reverse base-emitter bias, temperature, and additional reverse-bias stress. Two-level RTS with a relative amplitude as high as 100% is observed at room temperature. The RTS amplitude varies exponentially with the applied reverse base-emitter voltage and depends weakly on temperature. The additional hot carrier stress is observed to induce changes in RTS amplitude and mean pulse widths (independent or correlated), and a disappearance/reappearance of the RTS fluctuations. The results are interpreted by a model where the RTS noise is caused by fluctuations of generation-recombination (g-r) parameters (i.e., capture cross sections and energy position in the gap) of a stress-induced complex bistable defect (CBD) at the Si/SiO2 interface. The complex defect is assumed to be e...

In this work, charge transport through interpoly thin nitride/oxide stacked films, including nitride/oxide dual- and oxide/nitride/oxide tri-layer films, was studied. Extensive experimental results, concerning current conduction in single oxide layer, single nitride layer, nitride/oxide dual-layer, and oxide/nitride/oxide tri-layer films are presented. An effective investigation of the various mechanisms that can explain current conduction and charge trapping in these dielectrics was performed. To this aim, different approaches to transport modeling, namely, a classical current continuity model, a transmission model, and a two-step trap assisted model are proposed. The gains and trade offs offered by each model are pointed out. A comprehensive model for the conduction mechanisms in thin nitride/oxide stacked films is proposed.

The practicality of modeling the power law degradation observed in thin dielectrics after Fowler–Nordheim stress has been demonstrated on the basis of a generalized trapping approach with appropriate trap cross-section and density profiles. A detailed mathematical analysis of the negative bulk oxide charge kinetics has been established using incomplete Gamma and generalized hypergeometric functions, after assuming exponentially varying trap cross-section and density profiles throughout the oxide. These spatial distributions could be due to the structural nature of the oxide after growth. Moreover, the asymmetry of the charge distribution centroid for negative and positive gate bias stress has been satisfactorily interpreted by neglecting the trapping in the tunneling region near the cathode. Overall this generalized kinetic trapping model provides very good fitting of the variation of the trapped oxide charge with the injection dose for oxide thicknesses between 5.5 and 10 nm. The evolution of the charge centroid is also well predicted but with less accuracy, due to the presence of other concurrent charge generation processes associated with positive and/or negative charge buildup.

The effects of electrical stress on static characteristics and power spectral density, SIb, of base current, Ib, fluctuations at low frequencies, f

Experimental results on low frequency noise in quasiself-aligned bipolar n-p-n junction transistors, with widely varying emitter/base junction dimensions are presented and compared with former results obtained on devices of the same type. The power spectral density of base current fluctuations was found to depend linearly on the inverse of the area of the emitter/base interface junction, implying localization of the low frequency noise sources on the interface, rather than on the transistor perimeter. An application of current-to-voltage converters for studies of current fluctuations is also discussed and compared with a more conventional technique.

A new model for the low frequency (LF) noise in the base current of polysilicon emitter bipolar junction transistors (BJTs) is proposed. This model is based on the carrier number fluctuation approach and satisfactorily accounts for the base current noise characteristics. The base current fluctuations are ascribed to surface and volume noise sources. The surface noise arises from the low frequency fluctuations of the surface generation–recombination base current component due to the dynamic trapping–detrapping of carriers into/from slow states located in the spacer oxide at the periphery of the emitter/base junction. The volume noise results from the intrinsic fluctuations of the diffusion base current due to the carrier number fluctuations in the emitter or at the emitter–base junction. This LF noise model has been applied to BJTs subjected to hot carrier stress after reverse biasing of the base–emitter junction. The evolution of the base current noise characteristics after stress clearly demonstrates tha...

A comprehensive study of the temperature dependence of the Fowler–Nordheim (F–N) tunnel emission in a metal‐oxide‐semiconductor structure is conducted both theoretically and experimentally. The theoretical variations with temperature of the F–N emission is analyzed both for metallic and degenerate semiconductor cathode materials. The influence of the electron concentration of a degenerate semiconductor on the amplitude of the F–N current is demonstrated. A new analytical formula for the F–N current temperature dependence is derived from the exact expressions using the Sommerfeld expansion. This new analytical approximation proves to be much more efficient than the previous analytical formula developed by Good and Muller [Field Emission, Handbuch der Physik, Vol. 21 (Springer, Berlin, 1956)] and may be very useful for F–N current computer‐aided‐design‐oriented numerical simulation. The experimental study of the F–N current in MOS capacitors clearly demonstrates the strong impact of temperature on the F–N e...

A detailed investigation of the electrical properties of metal‐oxide‐semiconductor (MOS) transistors with gate oxides nitrided for long (3 h) and short (40 min) times has been conducted as a function of temperature (4.2–300 K). The nitrided oxides (NO) and Re‐oxidized‐nitrided oxides devices have been fabricated using a low pressure plasma enhanced nitridation in ammonia. The P‐ and N‐ channel MOS transistors parameters, such as the threshold voltage, maximum mobility, mobility attenuation factor, and subthreshold slope have been extracted from the ohmic transfer characteristics. The negative shift of the threshold voltage due to the nitridation‐induced positive charge has been found to be independent of temperature for N‐channel devices, whereas it decreases at low temperature for P‐channel devices. A more pronounced decrease of the interface state density (measured from the subthreshold slope) after nitridation has been found for P‐channel devices at low temperature. This feature corresponds to a reduct...

The effects of high‐dose silicon and arsenic ion implantation on the electrical and structural properties of silicon layers are investigated. Combining electrical, transmission electron microscopy, and triple‐crystal x‐ray‐diffraction measurements made it possible to characterize the effects of thermal annealing both on defect annihilation mechanisms and on electrical doping activation. It is clearly shown that a low‐temperature (≤450 °C) electrical activation process is taking place in the amorphous surface layer induced by high‐dose ion implantation. This phenomenon is found to be completely independent of the recrystallization regrowth by solid phase epitaxy which occurs at higher temperature. This electrical activation process is found to be well described by a local relaxation model involving point defect migration.

The impact of the oxide reliability on the endurance performance of nonvolatile memories [electrically erasable read only memories (EEPROMs)] is analyzed quantitatively. The degradation rate of tunnel SiO2 layers as obtained from EEPROM cells as well as tunnel oxide capacitors subjected to different modes of electrical stress (write/erase operations, static and dynamic stress) are compared and attributed to a specific charge generation mechanism. Furthermore, a reliability criterion for the optimization of the tunnel oxide technology entering the fabrication of EEPROM cells is also proposed.

An approach giving a physical understanding of the stress-induced leakage current (SILC) generation kinetics based on anode hole injection and hole dispersive transport in the oxide is presented. It is shown that the SILC is not directly correlated to the defects responsible for oxide breakdown. However, it is suggested that trapped holes can impact on the defect creation rate and, in turn, on the breakdown generation.

An analytical model and experimental results are proposed to account for the floating body effects in SOI (silicon‐on‐insulator) MOSFETs (metal‐oxide‐semiconductor field‐effect transistors). The model enables a quantitative description of hysteresis effects in the static characteristics and shows a strong correlation between the conductance and transconductance. It is demonstrated that an SOI MOSFET may exhibit both a negative conductance and a negative transconductance. A short‐channel device may be biased in such a way that a critical phenomenon, comparable to a second‐order phase transition, takes place. The major parameters and applications of these critical effects are described in detail.

An analysis of silicon metal‐oxide‐semiconductor (MOS) transistor operation at liquid‐helium temperature is presented. More specifically, analytical models providing the drain current and transconductance characteristics in the linear and nonohmic regions are established in the presence of source‐drain series resistances. These models, which rely on a specific mobility law for very low temperature, enable a good description of MOS transistor operation to be obtained. They permit the understanding and the prediction of the effects of source‐drain series resistance both in the linear and nonlinear regions. Furthermore, they allow a suitable parameter extraction method to be developed for the liquid‐helium temperature range. In addition, peculiarities of the drain voltage dependence of the mobility at low longitudinal electric field are also pointed out and empirically accounted for in the modeling of the output characteristics.

The interface state density of silicon metal‐oxide‐semiconductor (MOS) transistors operated at room, liquid‐nitrogen, and liquid‐helium temperatures is investigated using the conventional subthreshold slope technique. The magnitude of the interface state density found of the order of 1013–1014/eV cm2 at liquid‐helium temperature, suggests that such states correspond to the localized states situated in the band tails below the mobility edge of the two‐dimensional subband. Moreover, the interface state densities found by the subthreshold slope have been confirmed using the dynamic transconductance technique.

A study of carrier transport in top-gate and bottom-contact TIPS-pentacene organic field-effect transistors (OFETs) based on mobility is presented. Among three mobilities extracted by different methods, the low-field mobility obtained by the Y function exhibits the best reliability and ease for use, whereas the widely applied field-effect mobility is not reliable, particularly in short-channel transistors and at low temperatures. A detailed study of contact transport reveals its strong impact on short-channel transistors, suggesting that a more intrinsic transport analysis is better implemented in relatively longer-channel devices. The observed temperature dependences of mobility are well explained by a transport model with Gaussian-like diffusivity band tails, different from diffusion in localized states band tails. This model explicitly interprets the non-zero constant mobility at low temperatures and clearly demonstrates the effects of disorder and hopping transport on temperature and carrier density d...

In this work, Monte Carlo simulations and analytical modeling are used to investigate quasi-ballistic transport in nanometric metal oxide semiconductor field effect transistors (MOSFETs). In particular, we examine how the thermal nature of the distribution functions, which is implicitly assumed in the most common expression for the backscattering coefficient, leads to an underestimation of the backscattering coefficient in high field conditions and erroneous velocity distribution along the channel. An improved analytical model is proposed, which better captures the nonequilibrium nature of the distribution function and its impact on backscattering and by allowing velocity profiles to exceed the thermal limit. The improved model provides additional insights on the impact of several assumptions on backscattering and could serve as the basis for the development of physically based compact models of quasi-ballistic MOSFETs.

A modeling of organic field-effect transistors’ (OFETs’) electrical characteristics is presented. This model is based on a one-dimensional (1-D) Poisson’s equation solution that solves the potential profile in the organic semiconducting film. Most importantly, it demonstrates that, due to the common open-surface configuration used in organic transistors, the conduction occurs in the film volume below threshold. This is because the potential at the free surface is not fixed to zero but rather rises also with the gate bias. The tail of carrier concentration at the free surface is therefore significantly modulated by the gate bias, which partially explains the gate-voltage dependent contact resistance. At the same time in the so-called subthreshold region, we observe a clear charge trapping from the difference between C-V and I-V measurements; hence a traps study by numerical simulation is also performed. By combining the analytical modeling and the traps analysis, the questions on the C-V and I-V characteristics are answered. Finally, the combined results obtained with traps fit well the experimental data in both pentacene and bis(triisopropylsilylethynyl)-pentacene OFETs.

International audience; An analytical model for the transconductance to drain current ratio (gm/Id) of lightly doped nanoscale double-gate metal-oxide-semiconductor field-effect transistors (DG MOSFETs) has been developed in the weak inversion and from linear to saturation region, using the conductive path potential approach. The obtained analytical model for gm/Id in the weak inversion has been extended in the strong inversion and in the linear region including the short-channel effects, as well as the surface roughness scattering, series resistance, and saturation velocity effects. The obtained gm/Id model from weak to strong inversion has been verified by comparing simulation and experimental results of DG MOSFET with gate length 50 nm and it has been implemented in modeling the 1/f low-frequency noise. The introduced noise model has been validated by developing a Verilog-A transistor noise model, which is in good agreement with the experimental noise results of DG MOSFET with gate length 50 nm in the linear region from weak to strong inversion.

This paper discusses the limit of the sensitivity that can be given to the design of nanowire sensors when the low frequency (LF) noise, due to trapping-detrapping at the nanowire surface, is taken into account. The sensitivity is calculated as the relative conductance variation per unit of external charge density. The LF noise is shown to limit the minimum detectable charge density. Our modeling approach shows how the performance can be optimized by tuning the channel length and the width, and the doping concentration. The implications of these developments are outlined as useful features for the design and the optimization of silicon nanowire sensors.

In this paper we highlight the existence of tensile stress in heavily arsenic-doped epitaxial silicon (Si:As) prepared by low pressure chemical vapor deposition. Despite the large size of As atoms compared to Si ones, we demonstrate with x-ray diffraction and convergent electron beam diffraction that the heavily doped epitaxial layers show a tetragonal lattice with a reduced out of plane parameter. Using positron annihilation spectroscopy, we highlight the formation of arsenic-vacancies defects during the growth. We show that the tensile strain is related to this type of defects involving inactive As atoms and not to the As active concentration.

ac and dc Hall‐effect measurements, as a function of temperature and frequency, have been employed to characterize arsenic‐implanted silicon films. A significant modification of the carrier scattering mechanism occurs for annealing temperature around 550 °C which is manifested as a drastic change in the behavior of the temperature and frequency dependence of the transport parameters. Finally, the experimental results are discussed with respect to transport models which take into account short‐ and long‐range disorder, in order to help us understand the behavior of the implantation defects and inhomogeneities, and their thermal annihilation.

A study of the charge pumping phenomena occurring in a metal‐oxide‐semiconductor structure is presented. This study, which is based on numerical simulations of charge pumping in the time domain, enables a good overall description of the charge pumping characteristics to be obtained. In particular, the influence of various charge pumping configurations is analyzed relative to gate voltage signal characteristics such as rise/fall times, low/high gate biases, pulse duration, and signal waveform, and to device parameters such as interface‐state density, flat‐band voltage, and threshold voltage. The numerical simulations are also compared to typical experimental charge pumping characteristics. The adequacy of analytical or simplified models generally used to exploit the charge pumping data is also discussed.

A general time domain analysis of the recombination currents involved in the charge pumping phenomenon occurring in a metal‐oxide‐semiconductor structure is presented. This analysis not only allows a better understanding of the physical origin of the charge pumping current, but also furnishes quantitative information about the charge pumping current intensity versus the frequency, shape, and amplitude of the applied gate voltage signal. A comparison between our numerical simulations and analytical models available in the literature is also conducted. In particular, the range of applicability of the Groeseneken formula is studied both for trapezoidal and triangular time dependence of the gate voltage.

This paper deals with a model of silicon oxidation including stress relaxation by viscous flow during growth. Based on a Deal–Grove process and a Maxwellian stress relaxation approach, an integrodifferential equation giving the inverse growth rate dt/deox vs eox is established. Valid in any case of thickness growth rate dependence, it allows us to fit dry silicon oxidation data on a wide range of oxidation temperature (780–980 °C).

A study of the normalized drain current spectral density SId/I2d as a function of drain current has been carried out on n channel metal‐oxide‐semiconductor transistors at very low (4 K), low (77 K), and room temperatures. It is demonstrated experimentally that the drain current dependence of SId/I2d is strongly correlated to that of the transconductance‐current ratio squared (gm/Id)2. This result clearly shows that the carrier‐number fluctuation model is applicable not only at room temperature but also at low and very low temperatures. Therefore, it is proved that the mobility fluctuation model is inadequate for the interpretation of our flicker noise data.