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Optical transitions in atomically thin MoS2 samples made by sulfidation of a metallic molybdenum layer have been studied by photoreflectance (PR) and photoacoustic (PA) spectroscopy. The obtained spectra are compared with PR and PA spectra of bulk MoS2. It is shown that the absorption edge observed in the PA spectrum shifts to blue when moving from the bulk MoS2 to the atomically thin MoS2 layers, whereas the direct optical transitions at the K point of the Brillouin zone (A and B transitions), which are observed in the PR spectrum, do not shift spectrally in a significant manner. On the other hand, the AH transition, which is related to the direct optical transition at the H point of the Brillouin zone and is typical of bulk MoS2, is not observed for atomically thin MoS2 layers. Moreover, a strong and broad PR resonance related to the band nesting (C transition) is identified in the PR spectra of studied samples. In this case, C and CH transitions are observed for bulk MoS2, while only a C transition is observed for atomically thin MoS2.

The hydrogen termination and surface reconstruction of (100) silicon annealed at high temperature in a H2 atmosphere at 1 bar is investigated with multiple internal reflection infrared spectroscopy and atomic force microscopy. The surface flattens and becomes 2×1 reconstructed and terminated by strained monohydrides. This surface is shown to be very stable against contamination and oxidation.

This study relates to the heteroepitaxy of InP on patterned Si substrates using the defect trapping technique. We carefully investigated the growth mechanism in shallow trench isolation trenches to optimize the nucleation layer. By comparing different recess engineering options: rounded-Ge versus V-grooved, we could show a strong enhancement of the crystalline quality and growth uniformity of the InP semiconductor. The demonstration of III-V heteroepitaxy at scaled dimensions opens the possibility for new applications integrated on Silicon. ispartof: Journal of Applied Physics vol:115 issue:2 pages:023710-1 status: published

The evolution of (001) and (111) facets for the epitaxial growth inside submicron trenches is systematically studied in this report. The analysis with the method of “Lagrange multiplier” indicates the equilibrium crystal shape. In the case of non-equilibrium without external fluxes, we employed the “weighted mean curvature” method to mathematically model the inter-facet migration rate for two extreme kinetic cases: “surface diffusion limited” and “surface attachment/detachment limited.” Coupled with external supply of atoms, the self-limited behavior of facet size is theoretically predicted. Moreover, we find that the self-limited stable facet size in trenches of different widths has a specific relationship determined by the surface energy ratio, kinetic rate ratio, and isolated growth rate difference. The two limited cases could be discriminated according to the mathematical fitting of one exponent in this relationship based on the stable facet size in trenches of different widths. ispartof: Journal of Applied Physics vol:115 issue:2 pages:1-7 status: published

Heterogeneous integration of III–V semiconductors on Si substrate has been attracting much attention as building blocks for next-generation electronics, optoelectronics, and photonics. In the present paper, we studied the selective area epitaxial studies of InP grown on 300 mm on-axis Si (001) substrates patterned with Shallow Trench Isolation (STI) using the necking effect technique to trap crystalline defects on the sidewalls. We make use of a thin Ge buffer in the bottom of the trench to reduce interfacial strain at the interface and to promote InP nucleation. We could show here, by systematic analysis, the strong impact of the growth temperatures and pressures of the InP layer on the growth uniformity along the trench and crystalline quality that we correlated with resistance changes and interdiffusion measured in the III–V layer. The key challenge remains in the ultimate control of crystalline quality during InP selective growth in order to reduce defect density to enable device-quality III–V virtual substrates on large-scale Si substrates.

Monitoring oxidation steps is an important factor during the fabrication of semiconductor devices, because transistor performance can be greatly affected by defects in the passivation layer. As an example, we discuss the formation of a gate stack in metal oxide semiconductor (MOS) devices using Ge as an alternative channel material. Building an MOS gate stack on Ge requires passivation of the interface between the dielectric (typically a high-k material such as Al2O3 or HfO2, grown by means of atomic layer deposition (ALD)) and the Ge channel. Such passivation can be obtained from a very thin Si layer, epitaxially grown on Ge. The Si surface receives an oxidizing clean (O-3 or wet chemical clean) before the ALD step. In this work, second-harmonic generation (SHG) data are presented for silicon layers with varying thickness, grown with either trisilane (Si3H8) or silane (SiH4) and with various cleaning steps. The trend in second-harmonic response upon azimuthal rotation of the samples was comparable for both silane and trisilane as a Si precursor. Our results show that upon oxidation, the SHG intensity reduces, most likely due to a reduction of the amount of crystalline Si, which is converted to SiO2. (C) 2012 American Institute of Physics. [http://dx.doi.org/10.1063/1.3695989] ispartof: Journal of Applied Physics vol:111 issue:6 status: published

The passivation of the interface between Ge and the gate dielectric is a critical issue for the integration of Ge into next generation CMOS devices. GeO2 has recently garnered a lot of interest, but there is always a trade-off between low interface state densities and a low equivalent oxide thickness. In this paper we investigate the S-passivation of the Ge gate stack in which only 1 monolayer of S is needed in order to improve the interface properties of the gate stack. S-passivation is achieved via exposure of the clean Ge(100) surface to H2S. The high-k dielectric is deposited via atomic layer deposition. We show that the oxidant precursor type (H2O versus O3) will result not only in different growth behavior but also in different interface properties. The H2O based process results in low defect densities at the valence bandedge, whereas the O3 based process results in low defect densities at the conduction bandedge.

The integration of high carrier mobility materials into future CMOS generations is presently being studied in order to increase drive current capability and to decrease power consumption in future generation CMOS devices. If III-V materials are the candidates of choice for n-type channel devices, antimonide-based semiconductors present high hole mobility and could be used for p-type channel devices. In this work we first demonstrate the heteroepitaxy of fully relaxed GaSb epilayers on InP(001) substrates. In a second part, the properties of the Al2O3/GaSb interface have been studied by in situ deposition of an Al2O3 high-kappa gate dielectric. The interface is abrupt without any substantial interfacial layer, and is characterized by high conduction and valence band offsets. Finally, MOS capacitors show well-behaved C-V with relatively low D-it along the bandgap, these results point out an efficient electrical passivation of the Al2O3/GaSb interface. (C) 2011 American Institute of Physics. [doi:10.1063/1.3569618] This work is part of the IMEC Industrial Affiliation Program and is supported by the European Commission’s project FP7-ICT-DUALLOGIC no. 214579, “Dual-Channel CMOS for (sub)-22nm High Performance Logic.” The authors would like to thank Th. Conard and A. Franquet for XPS characterizations, F. Paola and H. Bender for TEM analyses, and H. Costermans for the support of the MBE tool.

We report the Ge thermal instability against surface diffusion in extremely narrow channels isolated by SiO2 and demonstrate the selective growth of strain-relaxed Ge epitaxial layers in channels as narrow as 10 nm on patterned Si (001) substrates by a combination of low temperature growth and selective recrystallization using Ge melt and regrowth during a millisecond laser anneal. Filling narrow channels at high growth temperatures is prohibited by Ge outdiffusion due to the high Ge chemical potential in such narrow channels. The Ge thermal instability depends on the channel width and a critical channel width of 50 nm is extracted from our calculation and experimental results. The Ge surface diffusion rate is dominated by the surface diffusion activation energy barrier that is significantly enhanced by the adsorbed surface hydrides. At a low temperature below 450 °C, a hydride-terminated surface is maintained which increases the Ge surface diffusion barrier and retards the outdiffusion of the Ge adatoms,...

A mechanism of strain relief of pseudomorphic Si1-xGex/Si(100) heterostructures by Si+ ion implantation and annealing is proposed and analytically modeled. The degree of strain relaxation is presented as a function of Ge content and implantation and annealing parameters. Rutherford backscattering spectrometry/channeling, Raman spectroscopy, and transmission electron microscopy are employed to quantify the efficiency of the relaxation process and to examine the quality of the samples, respectively. The mechanism and the conditions for strain relaxation are discussed in terms of dislocation loop formation in the implanted range with emphasis on loop formation in the compressively strained SiGe layer. The detrimental effect of local amorphization of the SiGe layer on its relaxation and on strain transfer to the Si-cap layer is also addressed. (C) 2009 American Institute of Physics. [DOI: 10.1063/1.3139274]

The structural reaction of sub- and supercritical thickness-strained Si layers on novel thin SiGe strain-relaxed buffers (SRBs) during high-temperature annealing used in device fabrication is investigated. Atomic force microscopy, chemical defect etching, scanning electron microscopy, optical profilometry, optical microscopy, and Raman spectroscopy are used to study defect formation and morphology on thin and thick Si0.82Ge0.18 SRBs grown using a C-induced relaxation technique. For subcritical thickness layers, the defect density was found to be similar in both thin and thick SRBs and both structures responded similarly to annealing, indicating good thermal stability of thin SRB technology. The root-mean-square surface roughness of strained Si grown on thin SRBs was ∼50% lower than on similarly grown thick SRBs and conventional step-graded thick SRBs, and was robust during annealing. The impact of strained Si layer thickness on surface morphology is also analyzed. Using detailed filtering techniques, macr...

Thin epitaxial GaAs films, with thickness varying from 140 to 1000 nm and different Si doping levels, were grown at 650C by organometallic vapor phase epitaxy (OMVPE) on Ge substrates and extensively analyzed by low-temperature photoluminescence (PL) spectroscopy., 19 pages, 14 figures

We examined, both experimentally and theoretically, the mobility reduction in metal-insulator-semiconductor field-effect transistors (MISFETs) limited by remote charge scattering. The accuracy of the mobility calculations was confirmed by agreement with experiments on MISFETs with pure SiO2 gate dielectrics, in which mobility is reduced due to scattering from the depletion charges in the polycrystalline silicon gate. In MISFETs with Al2O3∕SiO2 gate stacks, we could not identify the contributions from the remote phonon scattering by using low-temperature measurements of the mobility. The experimental mobility reduction is explained by a model in which both negative and positive charges are located at the Al2O3∕SiO2 interface. According to this model, the mobility increases with the interfacial SiO2 thickness. We confirmed this by fabricating MISFETs with various interfacial SiO2 thicknesses.

Germanium combined with high- κ dielectrics has recently been put forth by the semiconductor industry as potential replacement for planar silicon transistors, which are unlikely to accommodate the severe scaling requirements for sub- 45-nm generations. Therefore, we have studied the atomic layer deposition (ALD) of Hf O2 high- κ dielectric layers on HF-cleaned Ge substrates. In this contribution, we describe the Hf O2 growth characteristics, Hf O2 bulk properties, and Ge interface. Substrate-enhanced Hf O2 growth occurs: the growth per cycle is larger in the first reaction cycles than the steady growth per cycle of 0.04 nm. The enhanced growth goes together with island growth, indicating that more than a monolayer coverage of Hf O2 is required for a closed film. A closed Hf O2 layer is achieved after depositing 4-5 Hf O2 monolayers, corresponding to about 25 ALD reaction cycles. Cross-sectional transmission electron microscopy images show that Hf O2 layers thinner than 3 nm are amorphous as deposited, while local epitaxial crystallization has occurred in thicker Hf O2 films. Other Hf O2 bulk properties are similar for Ge and Si substrates. According to this physical characterization study, Hf O2 can be used in Ge-based devices as a gate oxide with physical thickness scaled down to 1.6 nm.