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This paper presents development of a hardware simulator for the DC–AC inverters of electric compressors (e-compressors). In general, early-release EVs often feature a nominal battery voltage of around 400 V. However, EVs with a 400 V battery have drawbacks such as slow battery charging speeds and limited driving distances. To overcome these drawbacks, the nominal battery voltage has recently been increased from 400 V to around 800 V. Accordingly, research on electrical components applicable to EVs with an 800 V battery has been conducted. However, research on the DC–AC inverter used in the e-compressor, as a core component of an electric air conditioning system for EVs with 800 V battery, is insufficient. Therefore, the development of a hardware simulator of DC–AC inverters for the e-compressors used in EVs with an 800 V battery is proposed in this paper. The validity of the proposed hardware simulator is verified by experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a diagnostic and fault-tolerant method for an open-fault condition in dual inverters with open-end winding interior permanent magnet synchronous motors (OEW-IPMSMs). Certain switch pairs show similar behavior in the output current in an open-fault condition due to the structural characteristics of the two-level dual inverter. This work presents a method for detecting open-fault conditions and ensuring a fault-tolerant operation. The proposed method is applied in dual inverters with isolated voltage sources for driving OEW-IPMSM. In the event of an open-fault condition, a pair of switches containing the faulty switch is identified based on the stator current. Subsequently, the switch with the open-fault condition is determined, and fault-tolerant control for a faulty switch is immediately performed through a single-mode operation using zero-voltage vectors. The effectiveness of the proposed detection and tolerant control method is confirmed through simulation and experimental results. [ABSTRACT FROM AUTHOR]

The multi-level inverter (MLI) is more efficient due to its ability to eliminate low-order harmonics. Thus, it is widely used in renewable energy generation, electric vehicles (EVs), etc. The choice of the neutral-point clamped (NPC) converter topology as a research object is of great significance in practical engineering. However, complex modulation algorithms and neutral-point voltage unbalance are two inherent problems for such NPC inverters. In this paper, an improved multi-voltage vector model predictive control (MVV-MPC) strategy based on neighboring four voltage vector synthesis is presented for three-phase NPC inverters. The duty cycle calculation and derivation methods for the proposed method are very simple, and they were obtained through the action time of each voltage vector being inversely proportional to the value of the corresponding cost function. Moreover, the fixed switching frequency of this strategy is maintained and the current peak ripple is reduced, guaranteeing the preferred total harmonic distortion of the output waveform. Furthermore, a voltage balancing method based on zero-sequence voltage injection is utilized to achieve dynamic balancing of the midpoint voltage difference and to limit the oscillation magnitude of the midpoint voltage difference to within ± 1 V. Finally, MATLAB simulations and an HIL experimental platform are built to demonstrate the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

The conventional topological approach to eliminate the multiple-input DC voltage requirement in multilevel inverter configurations for synthesizing high-output voltage levels is to deploy split capacitor banks at the input terminal. This method stipulates a less expensive, light weight, and reduced size inverter system. However, the excessive demand for several capacitor banks and the complex voltage balancing strategy associated with this conceptual approach poses numerous limitations in their deployment. In view of these drawbacks, this study proposes a self-balanced, single-phase, nine-level switched-capacitor-based inverter topology consisting of a single-input DC voltage, an auxiliary circuit, and an H-bridge circuit unit. A commensurate single carrier-based sinusoidal pulse-width modulation scheme is developed for the proposed power circuit control, enabling the synthesis of a nine-level output voltage waveform whose amplitude is four times the input voltage value. Detailed power circuit operations and switching functions are adequately provided in the proposed topology. A comparison between the proposed inverter and its recent counterparts in terms of component count, cost involvement, and output voltage-boosting ability is duly carried out using Python data visualization. Results reveal that the proposed inverter competes well in these three criteria. For varying R–L load values, the inverter has the capability of high active and reactive power delivery. Its dynamic response for step changes in the modulation index under these power-mode operations is presented in this paper. For high active power-mode operation, efficiencies of 98.27% and 98.92% under light- and heavy-load conditions, respectively, are obtained on a 3-kW-rated inverter prototype. [ABSTRACT FROM AUTHOR]