17 results on '"Gain–bandwidth product"'
Search Results
2. A transimpedance amplifier for optical communication network based on active voltage-current feedback.
- Author
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Seifouri, Mahmood, Amiri, Parviz, and Dadras, Iman
- Subjects
- *
TOPOLOGY , *ELECTRIC potential , *ELECTRIC currents , *ELECTRIC circuits , *ELECTRIC transients - Abstract
In this paper, a new topology is proposed for designing and analyzing a transimpedance amplifier (TIA) based on active voltage-current feedback. The proposed topology reduces the input and output impedances by using a common source transistor as a voltage-current feedback. In this topology instead of using a resistor to convert current to voltage, we convert transistor transconductance into transimpedance, and then by applying an electrical current to the drain the required voltage appears at the gate terminal. Simulation of the designed TIA for 1.8 V 0.18 µm CMOS technology shows that the gain of 59 dBΩ with 1 dBΩ gain ripple of the bandwidth of 7.9 GHz can be achieved. While the whole TIA circuit consumes 18 mW from 1.8 V power supply the simulated average input current noise spectral density is about 23 pA / √ Hz within the TIA frequency band. In this topology new tradeoffs are possible which make a further degree of freedom which are not available in previous topologies. [ABSTRACT FROM AUTHOR]
- Published
- 2017
- Full Text
- View/download PDF
3. The high recycling folded cascode (HRFC): A general enhancement of the recycling folded cascode operational amplifier
- Author
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Ghader Yosefi
- Subjects
010302 applied physics ,Power supply rejection ratio ,Total harmonic distortion ,Computer science ,Transconductance ,020208 electrical & electronic engineering ,General Engineering ,02 engineering and technology ,01 natural sciences ,law.invention ,Common-mode rejection ratio ,CMOS ,law ,0103 physical sciences ,0202 electrical engineering, electronic engineering, information engineering ,Electronic engineering ,Operational amplifier ,Cascode ,Gain–bandwidth product - Abstract
In this paper, an enhanced CMOS recycling folded cascode (RFC) operational amplifier (Op-Amp) is presented. It is based on the high recycling folded cascode (HRFC) in amplifying the transconductance at the output by shorting two nodes in the RFC structure. Compared to the conventional RFC, our circuit is capable to enhance DC gain and unity gain bandwidth (UGBW) in the same power consumption. Moreover, the improvements of the proposed circuit are in better input-referred noise, fast-settling time, input-offset voltage, total harmonic distortion (THD), common mode rejection ratio (CMRR) and power supply rejection ratio (PSRR). Simulation results in 180 nm CMOS standard technology confirm the theoretical results and indicate that our circuit has a good figure of merit (FoM). Compared to the RFC, the proposed HRFC has 1.8 times the UGBW (247 versus 137 MHz) and also has 6 times gain boosting (73 versus 57 dB) in the same power supply (1.8 V), power consumption and driving capacitor load of 5 pF.
- Published
- 2019
- Full Text
- View/download PDF
4. Design of broadband transimpedance amplifier for optical communication systems.
- Author
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Seifouri, Mahmood, Amiri, Parviz, and Rakide, Majid
- Subjects
- *
BROADBAND communication systems , *BROADBAND amplifiers , *BIOELECTRIC impedance , *ELECTRIC capacity , *MICROELECTRONICS - Abstract
This paper describes the design and analysis of broadband transimpedance amplifiers (TIAs) based on Regulated Cascode (RGC) configuration. The focus is to deal with bandwidth restriction occurring in optical receivers coming from TIA input parasitic capacitances. Despite the conventional method for broadband RGC TIA design that a ladder matching network is employed to isolate the input capacitance of TIA and the photodiode capacitance, the proposed TIA eliminates the effects of these parasitic components by absorbing them in a T-matching network. The conventional broadband RGC TIA is analyzed and the disadvantages of the ladder matching network is demonstrated in a TIA design example. The proposed RGC TIA is simulated on 0.18-μm standard RF CMOS process. The simulation results presented show that the Gain-Bandwidth product (GBW) is extended by a larger factor compared to that of the conventional broadband RGC TIA while the biasing conditions and the value of the photodiode capacitance are considered the same. [ABSTRACT FROM AUTHOR]
- Published
- 2015
- Full Text
- View/download PDF
5. Split compensation for inverter-based two-stage amplifier.
- Author
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Liao, Pengfei, Luo, Ping, Li, Hangbiao, and Zhang, Bo
- Subjects
- *
ELECTRONIC amplifiers , *ELECTRIC inverters , *QUANTITATIVE research , *CAPACITORS , *BANDWIDTH compression , *SIGNAL processing - Abstract
Abstract: A split compensation for inverter-based self-biased two-stage amplifier is presented in this paper with detailed quantitative analysis. The conventional miller capacitor is split into two parts to accomplish frequency compensation. With the split compensation, the non-dominant poles and their corresponding Q-values are independent on the parasitic parameter, moreover, this compensation together with inverter-based input stage and the self biased technique improves the performance such as DC gain, gain-bandwidth product, stability and sensitivity. The proposed amplifier has been implemented in a SMIC 0.13μm CMOS process and the chip area is 0.10×0.14mm2. It achieves 10.2-MHz gain-bandwidth product when driving a 20-pF capacitive load dissipating 97.2μW power at 1.2V supply, which shows an improvement in IFOMS and IFOML performance. [Copyright &y& Elsevier]
- Published
- 2013
- Full Text
- View/download PDF
6. A 25 Gbps inductorless optical receiver analog front-end based the modified Cherry-Hooper amplifier for optical interconnect
- Author
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Wei Heng, Xurui Mao, Gaolei Zhou, Sheng Xie, and Haocheng Cai
- Subjects
010302 applied physics ,Transimpedance amplifier ,Computer science ,business.industry ,Amplifier ,020208 electrical & electronic engineering ,Optical interconnect ,General Engineering ,Electrical engineering ,02 engineering and technology ,01 natural sciences ,Analog front-end ,CMOS ,0103 physical sciences ,0202 electrical engineering, electronic engineering, information engineering ,Bandwidth (computing) ,business ,Electrical efficiency ,Gain–bandwidth product - Abstract
In this paper, a 25 Gbps inductorless optical receiver analog front-end is presented. The inverter-based modified Cherry-Hooper amplifier is proposed and adopted as main stage of the optical receiver to extend the bandwidth by alleviating Miller capacitance. The optimization of shunt-feedback transimpedance amplifier is implemented by improving the gain bandwidth product of main amplifier. In multi-stage limiting amplifier, the staggered active feedback technique is used to boost the deteriorated bandwidth. Fabricated in a 55 nm CMOS technology, the whole chip occupies an area of 770 μm × 800 μm, and core area is only 100 μm × 400 μm. The measured 3-dB bandwidth reaches 21.7 GHz, sufficient for 25-Gbps operation. For an input voltage of 3 mVp-p, the chip achieves a BER = 10−12 at 25-Gbps PRBS7, and 320 mV differential output voltage is delivered. From the supply voltage of 1.2 V, the test chip consumes the power of 56 mW and exhibits the power efficiency of 2.3 pJ/s.
- Published
- 2021
- Full Text
- View/download PDF
7. A transimpedance amplifier for optical communication network based on active voltage-current feedback
- Author
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Iman Dadras, Parviz Amiri, and Mahmood Seifouri
- Subjects
Transimpedance amplifier ,Engineering ,Open-loop gain ,business.industry ,Transconductance ,020208 electrical & electronic engineering ,General Engineering ,020206 networking & telecommunications ,Common source ,Hardware_PERFORMANCEANDRELIABILITY ,02 engineering and technology ,Fully differential amplifier ,Operational transconductance amplifier ,Negative feedback amplifier ,Hardware_INTEGRATEDCIRCUITS ,0202 electrical engineering, electronic engineering, information engineering ,Electronic engineering ,business ,Gain–bandwidth product - Abstract
In this paper, a new topology is proposed for designing and analyzing a transimpedance amplifier (TIA) based on active voltage-current feedback. The proposed topology reduces the input and output impedances by using a common source transistor as a voltage-current feedback. In this topology instead of using a resistor to convert current to voltage, we convert transistor transconductance into transimpedance, and then by applying an electrical current to the drain the required voltage appears at the gate terminal. Simulation of the designed TIA for 1.8 V 0.18 µm CMOS technology shows that the gain of 59 dBΩ with 1 dBΩ gain ripple of the bandwidth of 7.9 GHz can be achieved. While the whole TIA circuit consumes 18 mW from 1.8 V power supply the simulated average input current noise spectral density is about 23 pA / √ Hz within the TIA frequency band. In this topology new tradeoffs are possible which make a further degree of freedom which are not available in previous topologies.
- Published
- 2017
- Full Text
- View/download PDF
8. Frequency compensation of three-stage operational amplifiers: Sensitivity and robustness analysis
- Author
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Mohammad Danaie and Esmaeel Ranjbar
- Subjects
Engineering ,Settling time ,business.industry ,Capacitive sensing ,020208 electrical & electronic engineering ,General Engineering ,Frequency compensation ,Phase margin ,020206 networking & telecommunications ,02 engineering and technology ,Power factor ,law.invention ,Control theory ,law ,Robustness (computer science) ,0202 electrical engineering, electronic engineering, information engineering ,Operational amplifier ,Electronic engineering ,business ,Gain–bandwidth product - Abstract
Many different compensation techniques have been proposed in the literature for today's low-voltage multi-stage integrated opamps. Each of them tries to optimize their proposed designing procedure considering desired characteristics such as: slow rate, DC gain, power consumption and unity gain-bandwidth. However, the existence of uncertainty in the parameters of the opamps or the compensation elements can affect the optimality of their responses. Variation of the capacitive load of a compensated opamp is one of the probable sources of uncertainty. As a matter of fact, different compensation topologies do not exhibit equal sensitivity to the variation of capacitive loads. Therefore; the selection of a proper compensation technique is considered as an important step when designing an opamp. In this paper, the goal is to study the existing compensation techniques and their behavior in the presence of load uncertainty. It is our goal to present a guide which helps to choose the suitable compensation topology considering the level of uncertainty in capacitive loads. To achieve these goals the structures are first designed for equal performance metrics such as: gain bandwidth product, phase margin and settling time. Then the sensitivity of the different structures is evaluated. Thereby, the least sensitive structures can be chosen as good candidates for realization. Based on the knowledge of the authors, no such thorough analysis has ever been performed before.
- Published
- 2017
- Full Text
- View/download PDF
9. Bandwidth and gain extension technique for CMOS distributed amplifiers using negative capacitance and resistance cell
- Author
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Seyed Amin Alavi, Saman Ghadirian, and Seyyed Javad Seyyed Mahdavi Chabok
- Subjects
Physics ,Open-loop gain ,Amplifier ,020208 electrical & electronic engineering ,RF power amplifier ,General Engineering ,Distributed amplifier ,020206 networking & telecommunications ,02 engineering and technology ,Fully differential amplifier ,law.invention ,law ,0202 electrical engineering, electronic engineering, information engineering ,Operational amplifier ,Electronic engineering ,Direct-coupled amplifier ,Gain–bandwidth product - Abstract
This paper presents the design of a distributed amplifier simulated in a 0.13m CMOS model That use of a negative capacitance and resistance in order to increase gain and bandwidth. The proposed structure is used at the gate transmission line of the distributed amplifier. The negative capacitance at the gate transmission line decreases parasitic effects of gain cells and increases amplifier bandwidth and accordingly increases voltage gain. The generated negative resistance decreases transmission lines losses and increases bandwidth. The proposed 7-stage distributed amplifier consumes 97mW from 1.8V power supply while providing a voltage gain of 15dB from 0.5-to-49GHz with less than 0.3dB in-band gain-variation. The circuit has a measured input and output return losses 7.9dB and 9.4dB, respectively, and an in-band noise-figure less than 4.7dB, while circuit input and output are matched with 50 resistance.
- Published
- 2017
- Full Text
- View/download PDF
10. Ultra-low power OTA based on bias recycling and subthreshold operation with phase margin enhancement
- Author
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HyungWon Kim and Ahmed Ragheb
- Subjects
Engineering ,business.industry ,Subthreshold conduction ,020208 electrical & electronic engineering ,Bandwidth (signal processing) ,General Engineering ,Electrical engineering ,Phase margin ,020206 networking & telecommunications ,Hardware_PERFORMANCEANDRELIABILITY ,02 engineering and technology ,Power factor ,Operational transconductance amplifier ,Hardware_INTEGRATEDCIRCUITS ,0202 electrical engineering, electronic engineering, information engineering ,Electronic engineering ,Cascode ,business ,Gain–bandwidth product ,Voltage - Abstract
An ultra-low power and wide bandwidth operational transconductance amplifier (OTA) is presented. The proposed OTA employs a folded cascode (FC) structure with an enhanced current recycling technique. It provides the advantages of rail-to-rail input and output swing, while presenting lower power consumption and higher DC gain than conventional FC. It substantially reduces the power consumption by operating all devices under subthreshold region. In addition, it improves the phase margin of the OTA via special property of all-subthreshold operation substantially enhanced recycling effect of RFC OTA that ensures high gain and bandwidth. We implemented the proposed OTA in a 65nm CMOS process technology. The post layout simulation results demonstrate a robust performance exhibiting a DC-gain of 50.7dB, and a unity gain bandwidth of 2.1KHz 27.3MHz for a capacitive load of 0.5pF15nF. It also provides high phase margin (PM) up to 90.5 with extremely low power consumption of 3.9W under a low supply voltage of 0.5V.
- Published
- 2017
- Full Text
- View/download PDF
11. Investigation of DC, RF and linearity performances of a back-gated (BG) heterojunction (HJ) TFET-on-selbox-substrate (STFET): Introduction to a BG-HJ-STEFT based CMOS inverter
- Author
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Prince Kumar Singh, Satyabrata Jit, Ashish Kumar Singh, Manas Ranjan Tripathy, and Kamalaksha Baral
- Subjects
010302 applied physics ,Materials science ,business.industry ,Transconductance ,020208 electrical & electronic engineering ,General Engineering ,Linearity ,02 engineering and technology ,01 natural sciences ,CMOS ,Parasitic capacitance ,IMD3 ,Gate oxide ,0103 physical sciences ,0202 electrical engineering, electronic engineering, information engineering ,Optoelectronics ,Inverter ,business ,Gain–bandwidth product - Abstract
This manuscript reports the back-gate effects on device-level performance of a heterojunction TFET on SELBOX substrate (HJ-STFET). The proposed structure implements a stacked gate oxide where the conventional SiO2 is replaced by a SiO2/HfO2 in a stacked manner to increase its On-current. A back gate (BG) is also considered in the proposed TFET to enhance the device-level performance. Investigation of DC, RF and linearity parameters such as drain current, transconductance, electric field, parasitic capacitance, cut-off frequency (fT), gain bandwidth product (GBP), intrinsic delay (ꞇ), higher-order of gm (gm2, gm3), VIP2, VIP3, IIP3, IMD3, and 1-dB compression point are carried out for the proposed TFET and the results are compared with other conventional structures. Performance evaluation shows that BG-HJ-STFET is a suitable candidate for distortionless and high-frequency applications. In addition, analysis of DC and transient behaviour of a CMOS TFET inverter using the BG-HJ-STFET is thoroughly investigated to verify its circuit-level performance.
- Published
- 2020
- Full Text
- View/download PDF
12. Improving GBW product on CMOS operational transconductance amplifiers by interleaved feedforward paths
- Author
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Diego D.J. Corona-Lopez, Gerardo Mino-Aguilar, R. C. Ambrosio-Lazaro, Victor R. Gonzalez-Diaz, and J. Fermi Guerrero-Castellanos
- Subjects
Engineering ,business.industry ,Transconductance ,Amplifier ,General Engineering ,Electrical engineering ,Feed forward ,Frequency compensation ,law.invention ,CMOS ,law ,Operational transconductance amplifier ,Hardware_INTEGRATEDCIRCUITS ,Electronic engineering ,Resistor ,business ,Gain–bandwidth product - Abstract
This paper presents two Operational Transconductance Amplifier (OTA) compensation schemes for multistage topologies. The solutions are based on interleaved feedforward paths that cancel a non-dominant pole similarly to the zero nulling resistor technique with the advantage of avoiding resistors. Both schemes are designed in 90 nm CMOS process, the first one obtains 71 dB of DC gain, a gain bandwidth product (GBW) of 720 MHz with 360 μW of power consumption. The second proposed scheme obtains a similar DC gain and doubles the former proposed OTA GBW at the expense of 2.2 mW of power consumption for high speed applications. The compensation schemes are theoretically analyzed and the design guidelines are presented. The results of post layout simulations and corner analysis validate the new solutions.
- Published
- 2015
- Full Text
- View/download PDF
13. Design of broadband transimpedance amplifier for optical communication systems
- Author
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Mahmood Seifouri, Parviz Amiri, and Majid Rakide
- Subjects
Transimpedance amplifier ,Engineering ,business.industry ,Amplifier ,General Engineering ,Optical communication ,Electrical engineering ,Capacitance ,Photodiode ,law.invention ,law ,Broadband ,Hardware_INTEGRATEDCIRCUITS ,Electronic engineering ,Cascode ,business ,Gain–bandwidth product - Abstract
This paper describes the design and analysis of broadband transimpedance amplifiers (TIAs) based on Regulated Cascode (RGC) configuration. The focus is to deal with bandwidth restriction occurring in optical receivers coming from TIA input parasitic capacitances. Despite the conventional method for broadband RGC TIA design that a ladder matching network is employed to isolate the input capacitance of TIA and the photodiode capacitance, the proposed TIA eliminates the effects of these parasitic components by absorbing them in a T-matching network. The conventional broadband RGC TIA is analyzed and the disadvantages of the ladder matching network is demonstrated in a TIA design example. The proposed RGC TIA is simulated on 0.18-µm standard RF CMOS process. The simulation results presented show that the Gain-Bandwidth product (GBW) is extended by a larger factor compared to that of the conventional broadband RGC TIA while the biasing conditions and the value of the photodiode capacitance are considered the same.
- Published
- 2015
- Full Text
- View/download PDF
14. Split compensation for inverter-based two-stage amplifier
- Author
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Hangbiao Li, Bo Zhang, Ping Luo, and Pengfei Liao
- Subjects
Engineering ,business.industry ,Amplifier ,General Engineering ,Frequency compensation ,Power factor ,law.invention ,Power (physics) ,Compensation (engineering) ,Capacitor ,law ,Hardware_INTEGRATEDCIRCUITS ,Electronic engineering ,Inverter ,business ,Gain–bandwidth product - Abstract
A split compensation for inverter-based self-biased two-stage amplifier is presented in this paper with detailed quantitative analysis. The conventional miller capacitor is split into two parts to accomplish frequency compensation. With the split compensation, the non-dominant poles and their corresponding Q-values are independent on the parasitic parameter, moreover, this compensation together with inverter-based input stage and the self biased technique improves the performance such as DC gain, gain-bandwidth product, stability and sensitivity. The proposed amplifier has been implemented in a SMIC [email protected] CMOS process and the chip area is 0.10x0.14mm^2. It achieves 10.2-MHz gain-bandwidth product when driving a 20-pF capacitive load dissipating [email protected] power at 1.2V supply, which shows an improvement in IFOM"S and IFOM"L performance.
- Published
- 2013
- Full Text
- View/download PDF
15. Design methodology for ultra low-power analog circuits using next generation BSIM6 MOSFET compact model
- Author
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Thierry Taris, Francois Fadhuile, Christian Enz, Maria-Anna Chalkiadaki, Yann Deval, and Anurag Mangla
- Subjects
Engineering ,Analogue electronics ,business.industry ,Transconductance ,Transistor ,General Engineering ,Electrical engineering ,Inversion (meteorology) ,law.invention ,Threshold voltage ,law ,MOSFET ,Electronic engineering ,Design methods ,business ,Gain–bandwidth product - Abstract
The recently proposed BSIM6 bulk MOSFET compact model is set to replace the hitherto widely used BSIM3 and BSIM4 models as the de-facto industrial standard. Unlike its predecessors which were threshold voltage based, the BSIM6 core is charge based and thus physically continuous at all levels of inversion from linear operation to saturation. Hence, it lends itself conveniently for the use of a design methodology suited for low-power analog circuit design based on the inversion coefficient (IC) that has been extensively used in conjugation with the EIN model and allows to make simple calculations of, for example, transconductance efficiency, gain bandwidth product, etc. This methodology helps to make a near-optimal selection of transistor dimensions and operating points even in moderate and weak inversion regions. This paper will discuss the IC based design methodology and its application to the next generation BSIM6 compact MOSFET model. (C) 2013 Elsevier Ltd. All rights reserved.
- Published
- 2013
- Full Text
- View/download PDF
16. Effect of gate engineering in double-gate MOSFETs for analog/RF applications
- Author
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Swapnadip De, Chandan Kumar Sarkar, Angsuman Sarkar, and Aloke Kumar Das
- Subjects
Engineering ,Intrinsic gain ,business.industry ,MOSFET ,General Engineering ,Electronic engineering ,Linearity ,Silicon on insulator ,Context (language use) ,business ,Cutoff frequency ,Gain–bandwidth product ,Communication channel - Abstract
This work uncovers the potential benefit of fully-depleted short-channel triple-material double-gate (TM-DG) SOI MOSFET in the context of RF and analog performance characteristics. A systematic, quantitative investigation of the analog and RF performance figures-of-merits (FOMs) of TM-DG MOSFET are presented. The key idea in this paper is to demonstrate the improved RF, analog and linearity performance exhibited by TM-DG MOSFET over dual-material dual-gate (DM-DG) and conventional single-material double-gate (SM-DG) MOSFET. Using two-dimensional (2-D) device simulations, we have examined various design issues and provided the reasons for the improved performance. The effect of different length ratios of three channel regions related to three different gate materials of TM-DG structure on the RF and analog performance have also been discussed. Simulations reveal an improvement of intrinsic gain by 20.41% and 38.53%, an increase of 14.23% and 26.4% in the case of f"T, an increase of 13.9% and 23.85% in the case of f"m"a"x values for TM-DG (1:2:3) MOSFET compared to DM-DG and SM-DG MOSFET respectively. As a result, we demonstrate that TM-DG MOSFET can be a viable option to enhance the performance of SOI technology for high-frequency analog applications.
- Published
- 2012
- Full Text
- View/download PDF
17. Ultra low voltage, high performance operational transconductance amplifier and its application in a tunable Gm-C filter
- Author
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Seyed Javad Azhari and Farzan Rezaei
- Subjects
Engineering ,Sine wave ,CMOS ,Filter (video) ,business.industry ,Operational transconductance amplifier ,General Engineering ,Electronic engineering ,Frequency compensation ,business ,Low voltage ,Cutoff frequency ,Gain–bandwidth product - Abstract
This paper presents an ultra low voltage, high performance Operational Transconductance Amplifier (OTA) and its application to implement a tunable Gm-C filter. The proposed OTA uses a 0.5V single supply and consumes 60@mw. Employing special CMFF and CMFB circuits has improved CMRR to 138dB in DC. Using bulk driven input stage results in higher linearity such that by applying a 500mv"p"-"p sine wave input signal at 2MHz frequency in unity gain closed loop configuration, third harmonic distortion for output voltage is -46dB and becomes -42.4dB in open loop state for 820mv"p"-"p output voltage at 2MHz. DC gain of the OTA is 47dB and its unity gain bandwidth is 17.8MHz with 20pF capacitance load due to both deliberately optimized design and special frequency compensation technique. The OTA has been used to realize a wide tunable Gm-C low-pass filter whose cutoff frequency is tunable from 1.4 to 6MHz. Proposed OTA and filter have been simulated in 0.18@mm TSMC CMOS technology with Hspice. Monte Carlo and temperature dependent simulation results are included to forecast the mismatch and temperature effects after fabrication process.
- Published
- 2011
- Full Text
- View/download PDF
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