7 results on '"Larysa Titarenko"'
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2. Designing FPGA-Based Mealy FSMs with Two Levels of Logic.
3. Design of FPGA-Based Mealy FSMs with Counters.
4. Twofold state assignment for FPGA-based mealy FSMs.
5. Design of CPLD-based mealy FSMs with counters.
6. Designing Moore FSM with extended class codes.
7. Code sharing in CPLD-based Moore FSMs.
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