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Recently, various resistance-based memory devices are being studied to replace charge-based memory devices to satisfy high-performance memory requirements. Resistance random access memory (RRAM) shows superior performances such as fast switching speed, structural scalability, and long retention. This work presented the different filament control by the DC voltages and verified its characteristics as a synaptic device by pulse measurement. Firstly, two current–voltage (I–V) curves are characterized by controlling a range of DC voltages. The retention and endurance for each different I–V curve were measured to prove the reliability of the RRAM device. The detailed voltage manipulation confirmed the characteristics of multi-level cell (MLC) and conductance quantization. Lastly, synaptic functions such as potentiation and depression, paired-pulse depression, excitatory post-synaptic current, and spike-timing-dependent plasticity were verified. Collectively, we concluded that Pt/Al2O3/TaN is appropriate for the neuromorphic device. [ABSTRACT FROM AUTHOR]

Memory devices with bilayer CeO2−x/ZnO and ZnO/CeO2−x heterostructures sandwiched between Ti top and Pt bottom electrodes were fabricated by RF-magnetron sputtering at room temperature. N-type semiconductor materials were used in both device heterostructures, but interestingly, change in heterostructure and electroforming polarity caused significant variations in resistive switching (RS) properties. Results have revealed that the electroforming polarity has great influence on both CeO2−x/ZnO and ZnO/CeO2−x heterostructure performance such as electroforming voltage, good switching cycle-to-cycle endurance (~ 102), and ON/OFF ratio. A device with CeO2−x/ZnO heterostructure reveals good RS performance due to the formation of Schottky barrier at top and bottom interfaces. Dominant conduction mechanism of high resistance state (HRS) was Schottky emission in high field region. Nature of the temperature dependence of low resistance state and HRS confirmed that RS is caused by the formation and rupture of conductive filaments composed of oxygen vacancies. [ABSTRACT FROM AUTHOR]

This letter presents dual functions including selector and memory switching in a V/SiOx/AlOy/p++Si resistive memory device by simply controlling compliance current limit (CCL). Unidirectional threshold switching is observed after a positive forming with low CCL of 1 μA. The shifts to the V-electrode side of the oxygen form the VOx layer, where the threshold switching can be explained by the metal-insulation-transition phenomenon. For higher CCL (30 μA) applied to the device, a bipolar memory switching is obtained, which is attributed to formation and rupture of the conducting filament in SiOy layer. 1.5-nm-thick AlOy layer with high thermal conductivity plays an important role in lowering the off-current for memory and threshold switching. Through the temperature dependence, high-energy barrier (0.463 eV) in the LRS is confirmed, which can cause nonlinearity in a low-resistance state. The smaller the CCL, the higher the nonlinearity, which provides a larger array size in the cross-point array. The coexistence of memory and threshold switching in accordance with the CCL provides the flexibility to control the device for its intended use. [ABSTRACT FROM AUTHOR]