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Silanization is one of the widely explored surface modification strategies for biofunctionalization of oxide interfaces. For biosensor applications, silanes with active terminal groups such as amine, thiol, carboxylic, and aldehyde groups are utilized in routine. In near‐field sensing schemes like biologically sensitive field‐effect transistors, it is crucial to generate a homogeneous layer of silane to confine the biointeractions in close vicinity of the sensor interface. The homogeneity of such biofunctional layer is determined by the surface activation and silanization protocol being applied. Herein, the impact of the surface activation process and silanization on electrical characteristics of field‐effect devices is studied comprehensively using an electrolyte‐oxide‐semiconductor (EOS) capacitor with a high‐quality gate oxide. The thermally grown silicon oxide (SiO2) interface is activated using acidic mixtures and plasma treatment, while the subsequent silanization steps are investigated comparatively using two different silanes (3‐aminopropyl triethoxysilane (APTES) and 3‐glycidyloxypropyl trimethoxysilane (GPTMS) in wet‐chemical and vapor‐phase processes. Furthermore, the optimized silanization process is utilized to immobilize an oligo strand at the EOS capacitor surface, followed by the hybridization of complementary oligo strands. The optimized protocol holds the potential for large‐scale production of functional oxide interfaces for various applications. [ABSTRACT FROM AUTHOR]

Carbon nanotube (CNT)‐based transistor devices have been demonstrated and are seen as the next‐generation alternative to replace the current generation electronic devices based on silicon MOS technology. Their limitations, however, are related to their instability in ambient conditions and technical challenges in scaling up production of individual CNT devices. Herein, a simple technique to convert ambipolar (both n‐ and p‐carrier) individual CNT‐based transistors into unipolar (p‐type carrier) transistors that carry large currents ≈±7 mA before saturation is demonstrated. Such large current‐carrying capability from an individual or single‐bundle CNTs will be ideal for applications that require high currents such as output stages of radio frequency (RF) and audio amplifiers. This work highlights the ability to tune CNT‐based transistor devices to suit specific applications, which is essential for the development of next generation of nanoelectronics. [ABSTRACT FROM AUTHOR]

A detailed review of sub‐5 nm 2D semiconductor monolayer (ML) field‐effect transistors (FETs) is presented. A brief introduction to the fundamentals of 2D materials and their properties is provided followed by a critical review to propose an appropriate channel material from the available 2D materials. Various device simulation techniques incorporating density functional theory (DFT) and nonequilibrium Green's function (NEGF) are discussed in order to comprehend the distinctive features of 2D materials and the ballistic performance of sub‐5 nm ML 2D FETs. Relevant, recent experimental progress is also discussed. The review suggests that sub‐5 nm monolayer FETs based on 2D semiconductors like black phosphorene, WSe2N4, silicene, tellurene, arsenene, WSe2, MoTe2, MoS2, InSe, α‐CS, MoSi2N4, WS2, Bi2O2Se, GeSe, SnSe2, SnS2, AsP, GeS, MoSi2N4, BiH, SnSe2 and MoTe2 show excellent device performance meeting the International Technology Roadmap for Semiconductor (ITRS) requirements (2013 Version) for both high‐performance (HP) and low‐power (LP) applications in terms of on‐state current, subthreshold swing (SS), delay time, and power delay product (PDP). [ABSTRACT FROM AUTHOR]

A new functionalization method to modify capacitive electrolyte–insulator–semiconductor (EIS) structures with nanofilms is presented. Layers of polyallylamine hydrochloride (PAH) and graphene oxide (GO) with the compound polyaniline:poly(2‐acrylamido‐2‐methyl‐1‐propanesulfonic acid) (PANI:PAAMPSA) are deposited onto a p‐Si/SiO2 chip using the layer‐by‐layer technique (LbL). Two different enzymes (urease and penicillinase) are separately immobilized on top of a five‐bilayer stack of the PAH:GO/PANI:PAAMPSA‐modified EIS chip, forming a biosensor for detection of urea and penicillin, respectively. Electrochemical characterization is performed by constant capacitance (ConCap) measurements, and the film morphology is characterized by atomic force microscopy (AFM) and scanning electron microscopy (SEM). An increase in the average sensitivity of the modified biosensors (EIS–nanofilm–enzyme) of around 15% is found in relation to sensors, only carrying the enzyme but without the nanofilm (EIS–enzyme). In this sense, the nanofilm acts as a stable bioreceptor onto the EIS chip improving the output signal in terms of sensitivity and stability. [ABSTRACT FROM AUTHOR]

Nanostructured materials have exhibited great potential applications in the field of (bio)sensing. In particular, the capacitive electrolyte-insulator-semiconductor (EIS) sensor is a suitable field-effect device for integration of film-based nanostructures as sensing units. In this study, the fabrication of a hybrid nanostructured film using the layer-by-layer (LbL) technique combining cobalt ferrite (CoFe2O4) nanocrystals complexed with poly(vinylpyrrolidone) (PVP) and embedded with a poly(amido- amine) (PAMAM) dendrimer is investigated. LbL films containing a PAMAM/PVP- CoFe2O4 architecture with different bilayers are fabricated onto EIS chips of Al/p- Si/SiO2. The morphology of the films is characterized by atomic force microscopy (AFM) and the sensing properties toward H2O2 detection are evaluated by capacitance-voltage (C/V) and constant capacitance (ConCap) measurements. By correlating the electrochemical and morphological properties of the films, the findings lead to an optimized system, in which the best performance is observed for a 3-bilayer EIS-(PAMAM/PVP-CoFe2O4) sensor, exhibiting a sensitivity of ca. 26.5 mV decade 1 and limit of detection of ca. 157×10-6 M toward H2O2. The set-up presents for the first time a field-effect sensor for H2O2 detection as an alternative to conventional amperometric H2O2 sensors. [ABSTRACT FROM AUTHOR]

Mg‐doped AlGaN layers are needed for deep‐ultraviolet light emitting diodes (DUV‐LEDs). However because of the high activation energy of Mg in such layers, the ionization level of the Mg‐dopants is very low. In this paper a new design is proposed with a view to improve the wall plug efficiency (WPE) of DUV‐LEDs. The method consists in using a geometry combining a UV‐μLED and a gate covering the edges of the mesa. This approach is intended to by‐pass the problem of low ionization level of the dopants in p‐AlGaN. The simulated structures include a DUV‐LED mesa structure with Al0.5Ga0.5N/Al0.7Ga0.3N multiple quantum well (MQW) active region emitting around 265 nm. It also comprises a gate deposited on the sidewalls of the mesa. Simulations performed with Silvaco atlas will be presented. In particular we will show that by applying an appropriate voltage to the gate, holes can be efficiently injected into the active region. They reach the active region via an accumulation channel below the gate around the mesa, and then diffuse along the length of wells and easily recombine with electrons. Finally simulations show that the calculated WPE can be increased by a factor of 3 for an optimized structure geometry. [ABSTRACT FROM AUTHOR]

The device concept and simulated characteristics of III-nitride nanowire tunneling field-effect transistors (NW TFETs) are presented. These devices employ polarization engineering in GaN/InN/GaN heterojunctions to achieve appreciable interband tunneling current densities, combined with a nanowire cylindrical gate-all-around geometry to achieve a high degree of gate electrostatic control. Simulations indicate that III-nitride nanowire TFETs can be expected to achieve on-off current ratios of 1011, IOFF of 10−10 µA µm−1, sub-threshold slopes as low as 25 mV dec−1 over 4 decades of current, and an ION of 50 µA µm−1 at a supply voltage of 0.5 V. A parametric evaluation of the geometry dependence of the device performance is performed, and the optimal device design parameter ranges for III-nitride NW TFETs are identified. [ABSTRACT FROM AUTHOR]

In this study we describe how we were able to use an equivalent-electrical circuit for the cell-transistor contact to optimize a future chip design for better performance in cell-substrate adhesion experiments. From our simulations we found that higher capacitances of the source and drain contact lines are able to shift the cell adhesion effects to more moderate frequencies in the range of up to 200 kHz. For larger cell-substrate adhesion effects, the transconductance value of the FET devices needs to be increased as well. We used these simulation results to design a new generation of FET devices. These devices were successfully fabricated in our clean room facilities. In electronic cell-substrate adhesion experiments this new generation of devices showed superior performance compared to an earlier version. Most importantly, our new devices have now an almost flat topology enabling future single-cell migration experiments. HEK293 cells adhered with a flat morphology to a newly fabricated FET sensor device (scale bar 50 µm) [ABSTRACT FROM AUTHOR]

Field‐effect transistor devices with exfoliated 2D materials are potent in various optical and electronics applications including photodetectors, valleytronics, spintronic, circuits, memory, and optical modulators. However, these devices endure limited gate control, low carrier mobility, and high operating voltage. This study introduces a new asymmetric graphene–rhenium disulfide heterojunction Schottky barrier metal–oxide–semiconductor field‐effect transistor engineered with high graphene carrier mobility and high rhenium disulfide Ion–off ratio in a 10 nm channel‐length device. The proposed device has better gate control ability, Ion–off ratio of 106, high carrier mobility (87.44 cm2 V−1 s−1), and low subthreshold swing of 43.12 mV dec−1 in the subthreshold region at 0.05 V applied drain voltage. The significant reduction in subthreshold swing at low voltage opens a suite of high‐switching‐speed low‐powered nanologic applications for the upcoming Internet‐of‐Things era. The material properties of graphene–rhenium disulfide heterojunctions are derived using an ab initio quantum transport simulation tool. [ABSTRACT FROM AUTHOR]