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Herein, the reliability of commercial ultraviolet‐C (UV‐C) light‐emitting diodes (LEDs) subjected to constant current stress is reported. Electrical, optical, and spectral analyses are carried out on UV‐C LEDs with an emission peak of 275 nm and a nominal optical power of 12 mW at 100 mA. Degradation tests are carried out at the maximum rated current, the double and at three times the maximum. The LED lifetime is found to be inversely proportional to the third power of the stress current density, indicating that the degradation mechanism might be activated by high‐energy electrons arising from Auger–Meitner recombination. Electrical characterization indicates an increase in defect‐related leakage, whereas the spectral analysis identifies a variation in two emission peaks which can be ascribed to a defect density increase in the active region and the p‐gallium nitride (GaN) layer of the LEDs. A final remark comes from the strong dependence of lifetime on operating current: increasing current to lower the number of LEDs in a system is not an optimized strategy. In fact, this has a substantial impact on system lifetime, thus lowering the total number of permitted disinfections. [ABSTRACT FROM AUTHOR]

Herein, the results are reviewed concerning reliability of high‐electron mobility transistors (HEMTs) based on GaN, which currently represent the technology of choice for high‐efficiency microwave and millimeter‐wave power amplifiers. Several failure mechanisms of these devices are extensively studied, including converse piezoelectric effects, formation of conductive percolation paths at the edge of gate toward the drain, surface oxidation of GaN, time‐dependent breakdown of GaN buffer, and of field‐plate dielectric. For GaN HEMTs with scaled gate length, the simultaneous control of short‐channel effects, deep‐level dispersion, and hot‐electron‐induced degradation requires a careful optimization of epitaxial material quality and device design. [ABSTRACT FROM AUTHOR]

Herein, the main factors and mechanisms that limit the reliability of gallium nitride (GaN)‐based light‐emitting diodes (LEDs) are reviewed. An overview of the defects characterization techniques most relevant for wide‐bandgap diodes is provided first. Then, by introducing a catalogue of traps and deep levels in GaN and computer‐aided simulations, it is shown which types of defects are more detrimental for the radiative efficiency of the devices. Gradual degradation mechanisms are analyzed in terms of their specific driving force: a separate analysis of recombination‐enhanced processes, driven by nonradiative recombination and/or temperature‐assisted processes, such as defects or impurity diffusion, is presented. The most common lifetime estimation methods and standards adopted for solid‐state luminaires are also reported on. Finally, the paper concludes by examining which are the typical degradation and failure mechanisms exhibited by LEDs submitted to electrical overstress. [ABSTRACT FROM AUTHOR]

This article reviews most recent results on the reliability of vertical GaN‐based devices, by presenting a few case studies focused on the stability and degradation of high‐voltage GaN‐on‐GaN diodes and of GaN‐based field‐effect transistors (FETs). With regard to diodes, two relevant stress conditions are investigated. The first is operation at high forward current that can induce a degradation of the electrical properties of the devices, mostly consisting in an increase in the operating voltage, well correlated to a decrease in the electroluminescence signal emitted by the diodes. This degradation process is ascribed to the diffusion of hydrogen from the highly p‐type doped regions toward the junction, with consequent compensation of the acceptor (Mg) dopant. The second stress regime investigated on diodes is avalanche: specifically, it is shown that polarization‐doped GaN devices may show avalanche capability, and the stability of diodes in avalanche regime is investigated in detail. With regard to transistors, the analysis is focused on GaN‐on‐GaN vertical Fin‐FETs. First, the stability of the threshold voltage under positive gate stress is analyzed, and the role of interface/oxide traps is discussed by experimental characterization. Then, the degradation under positive gate or high‐drain stress is investigated, to provide information on the dominant degradation processes. [ABSTRACT FROM AUTHOR]

Herein, the development of gallium nitride on silicon (GaN‐on‐Si) heterostructures targeting 1200 V power applications is reported. In particular, it is shown that the insertion of superlattices (SLs) into the buffer layers allows pushing the vertical breakdown voltage above 1200 V without generating additional trapping effects as compared with a more standard optimized step‐graded AlGaN‐based epistructure using a similar total buffer thickness. DC characterizations of fabricated transistors by means of back‐gating measurements reflect both the enhancement of the breakdown voltage and the low trapping effects up to 1200 V. These results show that a proper buffer optimization and the insertion of SL pave the way to GaN‐on‐Si lateral power transistors operating at 1200 V with low on‐resistance and low trapping effects. [ABSTRACT FROM AUTHOR]

In a combined experimental and numerical investigation, we present the effects of trap-assisted tunneling on the sub-threshold forward bias characteristics of a blue InGaN/GaN single-quantum-well LED test structure grown on a SiC substrate. The different role of donor- and acceptor-like traps has been studied, for the information it can provide on the role played by point defects. Using the energy Et and trap density Nt as the only tunneling-related fitting parameters, the behavior of the measured I( V) curves is well reproduced by our model over a wide current and temperature range. The very good agreement between simulations and experiments suggests that trap-assisted forward tunneling is one of the most relevant contributions to the current flow below the optical turn-on of the diode. [ABSTRACT FROM AUTHOR]

In this work we report on the three dominant trapping mechanisms affecting the dynamic performance of a double-heterostructure GaN-based MIS-HEMT grown on silicon substrate. In the OFF-state, with high drain voltage and pinched-off 2DEG, the dominant mechanism is the charge-trapping in the gate-drain access region caused by the transversal drain-to-substrate potential. This effect causes the dynamic increase of the ON-resistance, and is positively temperature-dependent, thus of great concern for high-temperature operation. In the SEMI-ON-state, due to the presence of high VDS and relatively high IDS, an additional trapping mechanism emerges, involving the injection of hot electrons from the 2DEG into trap states located in the GaN-buffer or in the AlGaN barrier. This mechanism, critical in hard-switching operations, affects both the ON-resistance and the VTH. Finally, when the gate is positively biased (gate overdrive state) trapping of electrons happens in the gate dielectric layer(s), leading to strong metastable VTH instabilities. [ABSTRACT FROM AUTHOR]