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Security and testability are the most important factors affecting designing for testability. Scan chain based testing is a standard DfT (Design for Testability) due to its simple design and low cost. But this method can act as back door, through which the hacker can retrieve the sensitive information through side channel attack. Therefore we developed an efficient and inexpensive LFSR (linear feedback shift register) based secured architecture through which it provides predominant security without effecting testability. The experimental result leads to a low area and power overhead with a secure methodology.