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High-temperature compatible passivating contacts based on phosphorus doped polysilicon (poly-Si(n)) on a thin silicon oxide, employed on the rear side of bifacial n-PERT like solar cells provide an efficiency increase while being compatible with current photovoltaic manufacturing processes, including the metallization process. However, a simple and cost-effective method for poly-Si(n) deposition is still elusive. Herein, we demonstrate DC-sputtering as a scalable and single side technique for poly-Si(n) manufacturing. First, it is demonstrated how DC-sputtered poly-Si(n) can provide high passivation (iV oc > 730 mV) and low contact resistivity (ρ c < 20 mΩ cm2) when metallized by means of screen printing and firing through of Ag paste. Then, M2-sized bifacial n-PERT solar cells featuring the developed DC sputtered poly-Si(n) at the rear side and a homogenous front side B-emitter reaching a certified efficiency of 22.8% are demonstrated. Quokka simulations based on the developed DC sputtered poly-Si(n) indicate a potential up to 24.8% with an upward potential upon optimization of the front side emitter. This work highlights the feasibility of sputtered poly-Si(n) as an enabler for high-efficiency n-type solar cells. • Ex-situ P-doped PVD sputtered poly-Si passivating contacts integrated in M2 sized bifacial n-PERT solar cells. • M2 bifacial n-PERT devices with 22.8% certified efficiency demonstrated. • Integration of 100 nm of ex-situ doped sputtered poly-Si with screen printing and firing through of Ag paste. • Roadmap toward 25% efficiency presented. [ABSTRACT FROM AUTHOR]

We present a detailed optimization of a hole selective rear contact for p –type crystalline silicon solar cells which relies on full-area processes and provides full-area passivation. The passivating hole-contact is based on a layer stack comprising a chemically grown thin silicon oxide, an intrinsic silicon interlayer, and an in-situ boron-doped non-stoichiometric silicon-rich silicon-carbide layer on top. After deposition, the structure is annealed at 775–900 °C to diffuse dopant impurities to the c-Si wafer and a hydrogenation step is carried out. It is shown that hydrogenation is essential to obtain high quality surface passivation. In particular, we compare the effect of annealing in forming gas and annealing with a silicon-nitride overlayer as hydrogen source. We present a systematic optimization of the hole-selective contact, for which we varied the doping concentration, annealing parameters and report the implied open circuit voltage ( iV oc ) and combined specific contact resistivity ( ρ c ). It is observed that for highly doped layers the optimum annealing temperature for high quality surface passivation is 800 °C while for lowly doped layers the optimum annealing condition shifts to 850 °C. Excellent surface passivation and efficient current transport is evidenced by an iV oc value of 718 mV which corresponds to a saturation current density ( J 0 ) of 11.5 fA/cm 2 and a ρ c of 17 mΩcm 2 on p −type wafers. Moreover, the evolution of the boron diffusion profiles with different annealing conditions is investigated. Finally, we demonstrate proof-of-concept p −type hybrid solar cells employing the full-area hole-selective rear contact presented here and standard heterojunction front electron contact. The excellent efficiency potential of our passivating rear contact is highlighted by conversion efficiencies up to of 21.9%, enabling V oc of 708 mV, FF of 79.9% and J sc of 38.7 mA/cm 2 . [ABSTRACT FROM AUTHOR]

We present a novel passivating contact structure based on a nanostructured silicon-based layer. Traditional poly-Si junctions feature excellent junction characteristics but their optical absorption induces current losses when applied to the solar cell front side. Targeting enhanced transparency, the poly-Si layer is replaced with a mixed-phase silicon oxide/silicon layer. This mixed-phase layer consists of an amorphous SiO x matrix with incorporated Si filaments connecting one side of the layer to the other, and is referred to as nanocrystalline silicon oxide (nc-SiO x ) layer. We investigate passivation quality, measured as saturation current density, and nanostructural changes, characterized by Raman spectroscopy and transmission electron microscopy, carefully studying the influence of annealing dwell temperature. Excellent surface passivation on n-type and also p-type wafers is shown. An optimum annealing temperature of 950 °C is found, resulting in a saturation current density of 8.8 fA cm −2 and 11.0 fA cm −2 for n-type and p-type wafers, respectively. Even before forming gas annealing, emitter saturation current densities of 27.9 fA cm −2 (n+/n junction) and 32.0 fA cm −2 (n+/p junction) are reached. Efficient current extraction is presented with specific contact resistivities of 86 mΩ cm 2 on n-type wafer and 19 mΩ cm 2 on p-type wafers, respectively. High-resolution transmission electron microscopy reveals that the layer stack consists of intermixed SiO x and Si phases with the Si phases being partly crystalline already in the as-deposited state. Thermal annealing at temperatures ≥850 °C further promotes crystallization of the Si-rich regions. The addition of the SiO x phase enhances the thermal stability of the contact and should allow to tune the refractive index and improve transparency, while still providing efficient electrical transport through the crystalline Si phase, which extends throughout almost the entire contact. [ABSTRACT FROM AUTHOR]

In this work, we present the development of passivating contacts based on thin interfacial oxide/doped poly-silicon for two side contacted c-Si solar cells. In the first part, we discuss our layer optimization towards direct metallisation, using firing through of Ag-paste screen printed on a silicon nitride (SiN x :H). By optimising the poly-silicon thickness, we obtain solar cells with open circuit voltage (V OC) up to 700 mV and fill factor (FF) up to 78%. However, such results were obtained by using layers with a thickness of 95 nm, strongly limiting the short circuit current density. To overcome this limitation, we present in the second part an approach for localization of the front side passivating contact by means of deposition through a shadow mask. Finally, in the third part, we demonstrate high-efficiency c-Si solar cells with promising efficiency above 21.7% with a V OC of ∼711 mV, a high FF of 79.7% and a potential for efficiency >22%. • Thin and transparent front side passivating contacts with thicker regions of metallisation. • One single firing step for paste contacting and hydrogenation of front passivating contact. • Low degradation in locally thickened front metallized area with high V OC >710 mV. • Excellent electrical transport with FF >79.5%. [ABSTRACT FROM AUTHOR]

In this contribution, we present an electron selective passivating contact metallised with a low temperature process to target front side applications in crystalline silicon (c-Si) solar cells. In addition to an interfacial silicon oxide (SiO x) and an in-situ phosphorous doped micro-crystalline silicon (μc-Si(n)) layer, it comprises an ultra-thin indium tin oxide (ITO) layer of 15 nm for lateral conductivity and a hydrogen rich silicon nitride (SiN x :H) layer which serves as hydrogen (H) reservoir and as anti-reflection coating. We use one single thermal treatment for 30 min at 350 °C to sinter the screen-printed paste, to recover sputtering damage induced during ITO deposition, and to diffuse hydrogen from the SiN x :H layer towards the c-Si/SiO x interface where it passivates interfacial defects. Applied to symmetrically processed textured samples, we find implied open-circuit voltage (iV OC) > 728 mV for optimal ITO thickness of 15 nm and annealing temperatures of 350 °C. The developed stack was applied on the front textured side of co-annealed (800 °C) p-type c-Si solar cells in combination with a tunnel oxide hole selective passivating contact on the rear side. We demonstrate solar cells with fill factor (FF) up to 81.9% and an open-circuit voltage (V OC) up to 719 mV. With a short-circuit current density (J SC) of 38.6 mA/cm2, we obtain a final cell efficiency to 22.8%. We find that the annealing of the SiN x :H/ITO stack strongly increases the ITO free carrier density penalizing the solar cell spectral response at high wavelengths. • Full-area highly transparent passivating front contact for p-type solar cells. • Ultra-thin ITO layer of 15 nm yields excellent current extraction with FF of almost 82%. • One single annealing step for hydrogenation and curing of sputtering damage. • SiN x :H no longer sacrificial layer but part of the ARC. [ABSTRACT FROM AUTHOR]

Passivating contacts are key enablers for high efficiency c-Si solar cells. Here, we present our latest advancement in terms of implementation and understanding in fired passivating contacts (FPC) used as rear p + passivating contact in p-type solar cells. We study three different layer configurations and show that the microstructural layer properties play a major role on the surface passivation and charge carrier transport. Upon optimization we demonstrate implied open circuit voltage of 722 mV corresponding to saturation current density of ~7 fA/cm2 and contact resistances below 10 mΩ cm2, when metallized with ITO/Ag. P-type c-Si solar cells employing a screen-printed P-diffused emitter co-fired with the FPC on the rear side with conversion efficiency up to 22.5% are demonstrated. Temperature-dependent measurements on test structures and solar cells reveal that tunneling is the main transport mechanism for FPC layers that crystallize during the firing process, whereas for more amorphous FPC layers, an additional component due to thermionic emission is also present. Finally, we present the efficiency potential of solar cells employing the developed FPC layer as hole selective rear side passivating contact. Image 1 • Latest advances on the understanding and integration of fired passivating contact (FPC) as hole selective contact. • Dependence of the passivation and contact resistance of the FPC as a function of the microstructural layer properties. • Temperature-dependent IV measurements suggests that tunneling dominates holes extraction for highly-crystalline FPCs. • P-type c-Si solar cells employing with a P-diffused emitter and the rear FPC with conversion efficiency up to 22.5%. • Efficiency potential of FPC in p-type c-Si solar cells. [ABSTRACT FROM AUTHOR]