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In mixed critical systems, applications with different security and time criticality share computing resources. Suffered from kinds of uncertainties in the system, designers need a design method with tight timing that can satisfy multiple design constraints such as function behavior certainty, timing behavior predictability and high computing performance at the same time, which challenges the theories and methods of existing computer architectures and programming languages. A real-time machine model, RTM, and a time triggered instruction set, TTI, which support time semantics, are proposed as the important foundation in constructing a Multi-tier Tight Timing design method, MTTT. A helicopter flight control program is used as an example to illustrate the effectiveness of RTM and TTI instruction set. [ABSTRACT FROM AUTHOR]

High Performance Computing (HPC) delivers huge processing performance, and plays a key role in the national welfare and the people s livelihood. As the source of computation power, high performance processors mostly determine the overall performance of a HPC system, and are being intensively studied in many countries nowadays to maintain a competitive edge in the HPC domain. This paper provides a review of the state-of-the-art processor architectures from mainstream processor designers like NVIDIA，Intel, and AMD. We carry out the review in terms of computation resource organization, memory subsystem design, and the connection technology among multi-cores. Based on the analysis, we summarize the mainstream trends in high performance processor design. We believe that this paper can serve as a reference for future research on HPC oriented processor designs. [ABSTRACT FROM AUTHOR]

Lattice QCD is a frontier scientific field for studying elementary particles by numerical simulation methods, which has become one of the major scientific research applications of supercomputers.With the rapid development of Chinese supercomputers, the LQCD softwares need to be refactored due to the limitation of its traditional programming model.The characteristics of scientific applications on super computers from the perspective of lattice QCD were reviewed.A novel programming model targeted to Chinese super computers was proposed to adapt large-scale scientific applications with big data processing, which is a promising development direction for the basic softwares of Chinese supercomputing ecosystem.

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The application of big data and artificial intelligence is promoted by data mining and intelligent analysis of a large number of static data using big data computing platform.In the face of the growing demand for real-time dynamic data processing generated by the Internet of things,dataflow computing has been gradually introduced into some big data processing platforms.Aiming at the programming model of data flow,the traditional software engineering design method for dataflow analysis and the structure definition and model reference provided by the current dataflow programming model for big data processing platform was compared,the differences and shortcomings were analyzed,and the main features and key elements of the dataflow programming model were summarized.The main methods of dataflow programming and the combination with the mainstream programming tools were analyzed,and the basic framework and programming mode of visual dataflow programming tools were presented according to the dataflow computing business requirements of big data processing.

In accordance with the new characteristics of physical,internet and intelligence of CPS,a hybrid scheduling system was designed for CPS node operating system with real-time performance,flexibility,and adaptability.Based on the in-depth study of the intrinsic differences between event-driven scheduling mechanism and multithreaded one,a hybrid programming model was designed that combines collaborative multithread and hybrid stack management using adapter mechanism.A hybrid scheduling model was also designed that supports both event and thread task types.Reasonable real-time algorithms were implemented for verification.Experimental results show that the real-time per-formance of the scheduling system is obviously better than that of TinyOS,thus it is better suited for CPS than TinyOS does.

Programming model has become one of the handicaps in multi-core era. To counter to this bottleneck, a novel multi-core architecture, namely Metric (Method centric) , is proposed in this paper, which attempts to bring the concept of procedure in programming model into computer architecture design. Basing on Metric multi-core, a slice partitioning compilation pass which tries to divide procedures into finer grains of similar size, namely slice, is investigated in details. Preliminary experiment results validate its effectiveness, and the algorithm is of great importance to Metric compiler tool chain and simulator setup. [ABSTRACT FROM AUTHOR]

To realize the interpration and integration in CNC, a CNC programming model is illustrated. A cording to CNC function, CNC system data structures are studied and ruction models based on XML Schema are established. The CNC network programming technology is studied, and the CNC software system includes three layers: Web Services requester, Web Services provider and Web Services monitor, thus a CNC programming model based on XML Web Services is established. Web Services in CNC application and equipments are studied. By experiments, the programming model based on XML Web Services is proved to be effective in trans-platform and trans-regional seamless integration and collaborative, operation of numerical control equipments. [ABSTRACT FROM AUTHOR]