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The Three-Dimensional (3D) chip structure is becoming one of the most popular academic research fields in VLSI owing to its advantages such as high integration density, high frequency, lower power, and so on. TSV is the key technology for vertical interconnections in 3D chips. However, TSVs may have some faults during the TSV fabrication or the process of wafer thinning and bonding, which causes that the modules related TSV lose efficacy, even the entire chip doesn, t work normally. A singleredundancy and dual-redundancy repair circuit based on TSV chain is proposed. The signals produced by chip testing are used to control repair circuit for the purpose of repairing the TSV defects and transferring the signals of fault TSV to the neighboring good TSV. The experimental results show that the function of this circuit structure is correct and the overall repair ratio can reach more than 91. 9 7 %, meanwhile the area overhead is lower. [ABSTRACT FROM AUTHOR]

The problem of impulsive synchronous control of unified chaotic systems with parameter uncertainty and variable delays is studied. On the case that the master system's delay is different from that of the slave system, sufficient conditions for their uniform asymptotical synchronization are developed by employing the Lyapunov stability theory and matrix inquality techniques, and the impulsive controllers with respect to delays and initial value of systems are designed. Finally, the validity of the obtained results is shown by a numerical example and its simulation. [ABSTRACT FROM AUTHOR]

In order to enhance the feature classification performance of localy linear embedding (LLE) algorithm for face recognition, the paper introduced minimum spanning tree algorithm and proposed a new local linear embedding algorithm with the dynamically determining neighborhood parameter. The new algorithm could automatically determine the neighborhood of the data point by using the single-chain clustering and further optimization algorithm, improved the insufficient of local linear embedding algorithm fixed neighborhood, as well as deal with the reality of non-uniform failures of source datasets. It used the improved algorithm and support vector machine (SVM) classifier for face recognition to get a higher upgrade of the average recognition rate on the ORL and YALB face database. And the simulation result shows the effectiveness of the algorithm. [ABSTRACT FROM AUTHOR]

Based on the traditional rock pressure theory, the fiber Bragg grating sensors were used to study the internal stiain caused by the overburden key strata movement. This study was conducted for the fully mechanized working face 30101 of a coal mine in China. The deformation of the overburden key strata during mining was simulated in the laboratory with 3 m plane stress physical model. The model size was 3 000 mmx1 340 mmx200 mm with a geometric similarity ratio of 1 : 100. Four fiber Bragg grating sensors and two total station survey lines were installed in the model for the oveiburden strata movement monitoring. The results of the study show that the fiber Bragg grating sensors successfully detect the initial weighting and the periodic weighting of the key strata. A sharp peaked wavelength shift curve of fiber Bragg grating sensor indicates the initial weighting of the key strata, and the wavelength shift curve with a peak that is maintained for a short time indicated the periodic weightings. The initial weighting and the periodic weighting distance of the roof strata of the fully mechanized working face 30101 are 48. 5-51.7 m and 10. 4 -20.7 m,respectively. The experimental results agreed well with the in-situ measurements. This study, successfully monitored the load on the overburden key strata in real time,which are proved to Ire in accord with exponential cosine function. [ABSTRACT FROM AUTHOR]

In order to achieve the optimal throughput by extracting parallelism in matrix during high-level synthesis, this paper proposed a matrix partitioning compile optimization algorithm to handle matrix applications, especially in multiplications. This algorithm divided data-intensive arrays into disjoint memory banks within LLVM compile framework, then merged relative iteration space, and at last, modified the data access between the iteration space and the data space. Compared with the AutoESL unfolding algorithm, experimental results show that this approach achieves 46% improvement in circuit delay and 39% reduction in resource averagely with the optimized block number. In conclusion, this high-level synthesis compile optimization algorithm based on matrix partitioning can reduce circuit delay and save resource. [ABSTRACT FROM AUTHOR]