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In order to meet the requirements of heterogeneous protocol integration and interconnection in software-defined interconnection systems, a two-stage multi-protocol switching circuit was proposed. This circuit accommodated the forwarding needs of various heterogeneous protocols by integrating shared memory and Crossbar architectures. In addition, a multi-stage arbitrary scheduling scheme based on time slot was introduced to decouple time and space during the scheduling. Simulation results demonstrate that this switching circuit can dynamically adapt to changes in switching scale, port memory, and port bandwidth requirements resulting from binding mode changes. Compared to traditional combined input and output queued (CIOQ) architecture, the utilization of memory is increased by up to 87.5%, and the forwarding delay is as low as tens of nanoseconds, making it suitable for RapidIO, fibre channel (FC), Ethernet, peripheral component interconnect express (PCIe) single protocol switching as well as hybrid protocol switching combining these protocols.