Search

Biased-Temperature-Instability (BTI) aging mechanism reduces Static-Noise-Margin (SNM) of SRAM cells. This leads to a higher Soft-Error-Rate (SER), lower reliability, and lower SRAMs’ stability in FPGAs. SNM partially improves by leveraging the recovery phase of BTI through flipping SRAM content. We propose STABLE, a three-step post-synthesis stress-aware technique, in order to reduce the impact of BTI-induced SNM reduction in FPGA Look-up-Tables (LUTs) using the SAT-based Boolean Matching (BM) algorithm. STABLE partitions Data-Flow-Graph (DFG) of the implemented design into different cones. First, the SAT-based BM algorithm finds a new configuration for each cone while their functionalities are preserved and all SRAMs are flipped. Second, cones that did not pass the first step can benefit from unused SRAMs in their partially-used LUTs for storing the flipped configurations of such LUTs. Finally, flipped configurations of fully-used LUTs are stored in the closest unused LUTs. The main configuration of the implemented FPGA design is swapped by the new flipped configuration, periodically. Our extensive experimental analysis demonstrates 69 and 70 percent on average improvements in the SNM reduction () and the SER increase ( $\Delta SER$), respectively. Since the proposed methodology is deployed after the FPGA placement and routing of the application, the overhead is negligible. [ABSTRACT FROM PUBLISHER]

This paper proposes a highly scalable sensor design for late transition detection in FPGA based platforms. Transition delays occur because of aging mechanisms such as Biased Temperature Instability (BTI) and Hot Carrier Injection (HCI). We propose a sensor clock (SCLK) that is a function of minimum slack time of a set of paths selected for age monitoring. There will be one such clock for many sensors as are needed in an entire FPGA. Our proposed sensor architecture makes it possible for a single SCLK to be shared by all sensors. Additionally, the proposed sensor occupies one slice (basic FPGA logic block), which leads to low area, power, and performance overhead. Using Artix-7-based board, experimental results demonstrate that the proposed aging sensor detects aging earlier than existing sensors and provides less power and performance overheads. [ABSTRACT FROM AUTHOR]