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In this paper, a common grounded Z-source dc–dc converter with high voltage gain is proposed for photovoltaic (PV) applications, which require a relatively high output–input voltage conversion ratio. Compared with the traditional Z-source dc–dc converter, the proposed converter, which employs a conventional Z-source network, can obtain higher voltage gain and provide the common ground for the input and output without any additional components, which results in low cost and small size. Moreover, the proposed converter features low voltage stresses of the switch and diodes. Therefore, the efficiency and reliability of the proposed converter can be improved. The operating principle, parameters design, and comparison with other converters are analyzed. Simulation and experimental results are given to verify the aforementioned characteristics and theoretical analysis of the proposed converter. [ABSTRACT FROM PUBLISHER]

A capacitor voltage-balancing method for a nested neutral point clamped (NNPC) inverter is proposed in this paper. The NNPC inverter is a newly developed four-level voltage-source inverter for medium-voltage applications with properties such as operating over a wide range of voltages (2.4–7.2 kV) without the need for connecting power semiconductor in series and high-quality output voltage. The NNPC topology has two flying capacitors in each leg. In order to ensure that the inverter can operate normally and all switching devices share identical voltage stress, the voltage across each capacitor should be controlled and maintained at one-third of dc bus voltage. The proposed capacitor voltage-balancing method takes advantage of redundancy in phase switching states to control and balance flying capacitor voltages. Simple and effective logic tables are developed for the balancing control. The proposed method is easy to implement and needs very few computations. Moreover, the method is suitable for and easy to integrate with different pulse width modulation schemes. The effectiveness and feasibility of the proposed method is verified by simulation and experiment. [ABSTRACT FROM PUBLISHER]

This paper proposes a bidirectional three-level LLC resonant converter with a new pulse width and amplitude modulation control method. With different control signals, it has three different operation modes with different voltage gains. Therefore, it can achieve wide voltage gain range by switching among these three modes, which is attractive for energy storage system applications needing wide voltage variation. The proposed topology operates with constant switching frequency, which is easy to implement with digital control, and it can achieve soft switching for all the switches and diodes in the circuit as a conventional LLC resonant converter. The performance of the proposed converter is validated by the experimental results from a 1-kW prototype with 20 A maximum output current. [ABSTRACT FROM PUBLISHER]

In this paper, a modified half-bridge (HB) resonant inverter topology with a dc-link neutral-point-clamped cell is proposed. A pseudo asymmetrical voltage-cancellation PWM method and a control strategy are introduced. The proposed topology can maximize the inverter output power factor, and minimize variations in the switching frequency. In addition, most switches are clamped to half of the dc input voltage at turn-off, increasing the overall efficiency of the system for a wide load range. The efficiency of the proposed inverter is improved up to 7% at light-load conditions compared with that of the conventional HB inverter. Informative expressions for performance comparison between the proposed inverter and its counterpart are provided. In addition, the losses in the inverter primary components are analytically analyzed in detail. For validation, a 120-W prototype is implemented, and experimental results are presented. [ABSTRACT FROM PUBLISHER]

This paper proposes a simplified space vector modulation (SVM) scheme for multilevel converters. Compared with earlier SVM methods, the proposed scheme simplifies the detection of the nearest three vectors and the generation of switching sequences, and therefore is computationally more efficient. Particularly, for the first time, the proposed scheme achieves the same easy implementation as phase-voltage modulation techniques. Another superior characteristic of the proposed scheme over earlier methods is its potential for multiphase multilevel applications. The proposed scheme also offers the following significant advantages: 1) independence of the level number of the converter; 2) more degrees of freedom, i.e., redundant switching sequences and adjustable duty cycles, to optimize the switching patterns; and 3) no need for lookup tables or coordinate transformations. These advantages make the proposed scheme well suited to large level-number applications, such as modular multilevel converters and high voltage direct current systems. Simulation and experimental results verify this new concept. [ABSTRACT FROM PUBLISHER]

This paper proposes a new topology for an enhanced-boost Z-source inverter (ZSI) with combined two Z-impedance networks. By two Z-impedance networks and low shoot-through duty cycle, the proposed inverter produces high output voltage gain. In traditional ZSIs for high boosting voltage, a low modulation index is required; hence, under these conditions, the output voltage will have low quality with high total harmonic distortion. Compared with the conventional high-boost ZSI topologies, the proposed inverter uses shorter shoot-through duration and a larger modulation index to improve the output waveform quality. Comparison between the proposed topology and previously proposed schemes, in terms of inductor numbers, voltage and current stresses on elements, sizes of inductors and capacitors, efficiency, and switching device product (SDP) factors of diodes, is made, and the results verify the priority of the proposed topology. The operating principle of the proposed topology is analyzed in detail. Both simulation and experimental results verify the high performance of the proposed inverter. [ABSTRACT FROM PUBLISHER]

Based on the hybrid operation of interleaved flyback micro-inverter in discontinuous and boundary conduction modes (DCM and BCM), a novel adaptive snubber is proposed in this paper. The proposed snubber limits the drain-to-source voltage overshoot of the flyback's main switch during the turn-off process, enabling the use of lower voltage MOSFETs. It also recovers the stored energy in the leakage inductance of the flyback transformer and provides soft switching for the main flyback switch by limiting the rising slope of the MOSFET voltage during the turn-off process resulting in higher efficiency. Exploiting the natural resonant of the flyback converter in BCM, the adopted controller provides ZVS and ZCS for the main switch during the BCM operation. The operation of the flyback micro-inverter with associated controllers is analytically studied, and considerations for an optimum design aiming to higher efficiency are presented. Performance of the flyback micro-inverter with the proposed adaptive snubber and the corresponding controllers is experimentally verified based on a 250W interleaved flyback micro-inverter hardware setup. [ABSTRACT FROM AUTHOR]

Conventional dual-active bridge topologies provide galvanic isolation and soft-switching over a reasonable operating range without dedicated resonant circuits. However, scaling the two-level dual-active bridge to higher dc voltage levels is impeded by several challenges among which the high dv/dt stress on the coupling transformer insulation. Gating and thermal characteristics of series switch arrays add to the limitations. To avoid the use of standard bulky modular multilevel bridges, this paper analyzes an alternative modulation technique, where staircase approximated trapezoidal voltage waveforms are produced; thus, alleviating developed dv/dt stresses. Modular design is realized by the utilization of half-bridge chopper cells. This way the analyzed dc-dc transformer employs modular multilevel converters operated in a new mode with minimal common-mode arm currents, as well as reduced capacitor size, hence reduced cell footprint. Suitable switching patterns are developed and various design and operation aspects are studied. Soft-switching characteristics will be shown to be comparable to those of the two-level dual-active bridge. Experimental results from a scaled test rig validate the presented concept. [ABSTRACT FROM AUTHOR]

This paper introduces a novel pulse width modulation (PWM) technique to eliminate common-mode voltage in odd-multilevel inverters using the three zero common-mode vectors principles. Similarly, as in conventional PWM for multilevel inverters, this PWM can be properly depicted in an active two-level voltage inverter. With the help of two standardized PWM patterns, the characteristics of the PWM process can be fully explored in that active inverter as a switching time diagram and switching state sequence. Due to an unequal number of commutations of three phases in each sampling period, the switching loss is optimized by a proposed current-based mapping algorithm. The switching loss reduction can be up to 25% compared to the same PWM technique with nonoptimized algorithms. The PWM method has been then generalized as an equipotential PWM control, which is valid to both odd- and even-multilevel inverters . The theoretical analysis is verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

Nonlinear, voltage-dependent capacitances of power semiconductor devices are capable of having significant impact on the operation of switched-mode power converters. Particularly at high switching frequency, these nonlinearities play a significant role in determining switching times, losses, and converter dynamics during switching transitions. In order to accommodate the well-established design and analysis techniques commonly used for linear circuits, this paper examines the nonlinear voltage-dependence of switching device capacitances and proposes a circuit-oriented analysis technique that allows the parasitic capacitances to be replaced with linear equivalents. The multitude of developed equivalents are verified through full nonlinear simulation in both MATLAB/Simulink and SPICE, as well as through experimental results. [ABSTRACT FROM AUTHOR]

This paper presents a high step-up converter for fuel cell energy source applications. The proposed high step-up dc-dc converter is devised for boosting the voltage generated from fuel cell to be a 400-V dc-bus voltage. Through the three-winding coupled inductor and voltage doubler circuit, the proposed converter achieve high step-up voltage gain without large duty cycle. The passive lossless clamped technology not only recycles leakage energy to improve efficiency but also alleviates large voltage spike to limit the voltage stress. Finally, the fuel cell as input voltage source 60-90 V integrated into a 2-kW prototype converter was implemented for performance verification. Under output voltage 400-V operation, the highest efficiency is up to 96.81%, and the full-load efficiency is 91.32%. [ABSTRACT FROM AUTHOR]

A systematic method for derivation of a multiport converter (MPC) based on the dc-link inductor (DLI) concept is proposed in this paper. The MPC is generated by interconnecting multiple pulsating voltage cells (PVCs) through the DLIs. The PVCs can be input type, output type, and bidirectional type, and bidirectional MPC topologies can be harvested if all the PVCs are bidirectional type. As a result, a family of novel MPCs, including multiinput converters, multioutput converters, and bidirectional MPCs, are derived. With the proposed MPCs, step-up and step-down voltage conversion between any two of the ports can be implemented. As an example, the three-port bidirectional buck-boost (TP-B 3) converter is analyzed and applied to a stand-alone renewable power system for interconnection of three dc subsystems. The operation principles, pulse width modulation, and feed-back control strategies are presented and analyzed in depth. The analysis indicates that, compared to the traditional common dc-bus-based solution, bulky dc-link capacitor is eliminated and single-stage conversion between any two of the three dc-buses are achieved with the TP-B 3 converter, which is beneficial for higher efficiency, power density, and reliability. Experimental results are given to verify the feasibility and effectiveness of the developed TP-B 3 converter. [ABSTRACT FROM AUTHOR]

This paper presents a new hysteresis current regulation strategy for the neutral point clamped and flying capacitor (FC) three-level inverters. The strategy uses the measured average of the switched phase leg output voltage to adjust the controller hysteresis band as the load back EMF varies to maintain a near constant phase leg switching frequency. The phase leg switchings are then fine tuned to a fixed frequency clock to further improve frequency regulation. Next, the zero-crossings of the measured phase leg average voltages are used to select between positive and negative switched output voltage levels, so that only one hysteresis current regulator is required for the full inverter switched output voltage range. For the FC inverter, a state machine is then added to select between redundant switching states to maintain balanced capacitor voltages. Finally, the controller is extended to a three-phase system by subtracting the common mode interacting current from the total phase leg current error before making any switching decision. The resulting controller achieves a line-to-line harmonic performance that is very close to open-loop phase disposition pulse width modulation, while retaining all of the dynamic benefits of hysteresis current regulation. [ABSTRACT FROM AUTHOR]

This paper investigates the different control objectives, such as loss reduction, neutral point (NP) balance and noise reduction of the space vector modulation (SVM), for the three-level neutral point clamped (NPC) converter. A detailed loss model and simulation model is built for quantitative loss and NP voltage ripple analysis. An improved SVM method is proposed to reduce NP imbalance and switching loss/noise simultaneously. The coordinately selected small vectors consider both the NP charge and the pulse sequence so that the minimized NP ripple and switching events are guaranteed in one switching cycle. In addition, the switching events between switching cycles are also considered to reduce the total switching loss. This method ensures an evenly distributed device loss in each phase leg and also a constant system efficiency under different power factors. The control result for NP balance and loss reduction is verified by using both a simulation model and an experimental prototype on a 200-kVA three-level NPC converter hardware. [ABSTRACT FROM AUTHOR]

This paper presents a buck-boost dc-dc converter for LED drivers capable of delivering an output current ranging from 0.1 to 2 A and a variable output voltage ranging between 2 and 5 V, starting from an input voltage spanning from 2.7 to 5.5 V. The dc-dc converter, realized in a 0.18-μm CMOS technology with 5-V option, occupies an area of 4 mm2 including pads. The circuit features automatic mode switching and dynamic sizing of the power transistors to achieve a peak efficiency of 91%. With a switching frequency of 2.5 MHz, the achieved line regulation is lower than 0.1% V-1 and the output voltage ripple is less than 10 mV. The obtained turn-on and load transient settling time are lower than 40 μs, thus allowing pulsed operation of the LEDs, as well as switching among LEDs of different colors. [ABSTRACT FROM AUTHOR]

This paper discusses about the voltage output ripple reduction and error minimization for the direct-drive, linear switched reluctance generator (LSRG)-based wave power generation system. First, the concept of the LSRG-based wave power generation system is studied. According to the characteristics of the LSRG, the suitable drive circuit dedicated to proper current excitation and generation is established. Second, the reasons that cause voltage output ripples are investigated. To reduce the remarkable ripples from phase current commutations, a current distribution function (CDF) is proposed based on the minimized copper loss principle. Third, the dual-loop control strategy with current and voltage as the inner and outer loop is constructed, implemented with the proposed CDF. Theoretical bases of the control strategy are derived. The simulation results prove that the proposed control algorithm is capable of voltage ripple suppression and error reduction within the range of ±0.5 V over the entire operation speed for wave energy extraction, validated by experimental verification. [ABSTRACT FROM AUTHOR]

In this paper, a predictive direct power control (DPC) method without sector information and voltage vector selection is proposed for three-phase grid-connected converters. Different from conventional predictive direct power controllers, the proposed strategy always adopts fixed voltage vectors, instead of selecting voltage vectors according to the angular information of the grid-voltage vector or the virtual-flux vector. The converter switching time is obtained by minimizing the squared errors of the instantaneous active and reactive power. Switch duty cycles are then calculated and equivalently reconstructed. The proposed strategy not only presents rapid dynamic response due to the use of the predictive controller, but also possesses excellent steady-state performance as a result of duty cycle reconstruction. The main advantage of the proposed control scheme, compared with the classical DPC strategies, is that it is unnecessary to use sector information of the grid-voltage vector, and selection of active voltage vectors is also not required here. Therefore, incorrect selection of voltage vectors and the resulting performance deterioration are surely avoided, without the need of any additional compensation measures. An in-depth comparison and experimental assessment are given to validate the effectiveness of the proposed strategy. [ABSTRACT FROM AUTHOR]

This paper presents a new gate drive circuit for driving a series string of insulated-gate bipolar transistors (IGBTs). The proposed quasi-active gate control (QAGC) circuit is simple to implement as it consists of only a few passive components in addition to a standard gate driver. No separate isolation power supply is required for the upper devices in the stack. The proposed QAGC circuit provides an effective way to drive the power devices and control static and dynamic voltage sharing to the devices at the same time. The theoretical switching operation and the oscillation stability analysis allow criteria for component selection to be established. Limitations of the QAGC circuit are also identified. The modification of the circuit to support more power devices in the series stack is discussed with the aid of the simulation results. The switching operation of the circuit is validated from the experimental results using two IGBTs connected in series. The circuit shows an excellent switching operation with well-controlled dynamic and static voltage sharing and comparable gate voltage between the coupled devices. [ABSTRACT FROM AUTHOR]

The objective of this paper is to investigate an impact of the inrush current on the prestrike and restrike characteristics of vacuum interrupters (VIs) during capacitive current switching duty. Eleven 7.2 kV VIs are used. Their contact parameters are contact gap 4 mm and contact material CuCr25 (25%weight of Cr). A series of 80 CO operations are executed for each test VI. The amplitude of inrush current Iinrush (3800 Hz) is set to 0 kA, 2 kA, 5 kA and 10 kA, respectively. The switching current is less than 1 A rms. The (1-cosωt) shape of the recovery voltage with a peak of 15 kV is applied to the test VI. The experimental results show that the prestrike and restrike phenomena are significantly influenced by the contact surface conditions damaged by the inrush current. The cumulative probability of the prestrike gap dpre follows a 3- parameter Weibull distribution. When Iinrush increases from 2 kA to 5 kA, the prestrike gap increases accordingly. The 10% dpre increases from 0.5 mm to 0.7 mm. The 50% dpre increases from 0.7 mm to 1.0 mm. The 90% dpre increases from 1.0 mm to 1.5 mm. The scale in the Weibull distribution, which can describe the scattering of dpre, is 0.2 mm and 0.6 mm in the case of Iinrush = 2 kA and Iinrush = 5 kA, respectively. It is found that the occurrence frequency of the inrush current interruption increases from 37.9% to 68.3% with the increase of Iinrush from 2 kA to 5 kA. Moreover, the inrush current also has an impact on the restrike types, which are classified into three types according to the waveform features. The average restrike probability increases from 4.6% to 17.9% and further to 30.4% with the increase of the inrush current from 0 kA to 2 kA and 5 kA, respectively. In addition, the higher the inrush current, the restrike tends to occur earlier during the recovery voltage period. [ABSTRACT FROM AUTHOR]

The common-mode voltage (CMV) produced from a converter system is a source of many problems, e.g., in the motor drive system, CMV might appear at the neutral point of the motor stator windings with respect to the ground and induce destructive bearing current. Reduced CMV space-vector modulation (RCMV SVM) methods have been proposed in both voltage-source converter (VSC) and current-source converter (CSC) systems. The available RCMV SVMs reduce the CMV by avoiding using zero-state vectors. However, this will lead to some negative effects, such as shrink of modulation index range, increase of switching frequencies, bipolar line-to-line voltage pulse patterns in VSCs, and power quality performance deterioration. In this paper, a RCMV SVM method for CSCs is proposed. By allowing the use of zero-state vectors, the proposed RCMV SVM still produces much lower CMV. However, its other performance indices, such as switching frequency and harmonic performance, are unaffected and comparable to the conventional SVMs. The effectiveness of the proposed RCMV SVM for CSCs is verified in the simulations and experiments. [ABSTRACT FROM AUTHOR]

A lot of large-scale industrial critical loads suffer from voltage interruptions and sags which can cause a significant financial loss. The thyristor-based solid-state transfer switch (STS) and mechanical-based automatic transfer switch (ATS) are used to protect loads against these power quality problems. However, the STS has a great deal of loss consumption because of the forward voltage drop of the thyristors, and ATS can hardly satisfy the voltage-sensitive load due to the long transfer time. This paper proposes a 400 V/1000 kVA hybrid ATS (thyristor switch in parallel with mechanical switch) (HATS) to realize low power consumption under normal situation and transfer fast when required. The proposed HATS has four transfer strategies which can be chosen according to different applications, it realizes the overlapping transfer of the neutral wire, and it can make a decision to transfer or not according to the different fault locations (transfer on the source side and not transfer on the load side). The design details of the prototype are presented, and laboratory tests and field experiments show the prototype good performance. [ABSTRACT FROM PUBLISHER]

This paper presents analytical expressions for the class-E power amplifier with MOSFET linear gate-to-drain and nonlinear drain-to-source parasitic capacitances at any duty ratio. The maximum operating frequency, output power capability, and element values as functions of the duty ratio are obtained. The element values are directly dependent upon the selection of duty ratio and require a careful duty ratio selection to minimize component power losses and to maximize the total efficiency. Two design examples at 25 and 9 W output power at 4-MHz operating frequency along with the PSpice-simulation and experimental waveforms are presented. It is shown from the derived expressions that the slope of the voltage across the MOSFET gate-to-drain parasitic capacitance during the switch-off state as a function of the duty ratio affects the switch-voltage waveform. Therefore, it is possible to achieve the required peak switch voltage and the class-E ZVS/ZVDS conditions simultaneously by adjusting the duty ratio. The theoretical results and PSpice simulations agreed with experimental results quantitatively, which shows the validity of the presented analysis. [ABSTRACT FROM AUTHOR]

In this paper, a soft-switching dc/dc converter with secondary-side phase-shift control strategy is proposed to improve the conversion efficiency and minimize the primary switch voltage stress in the high input voltage applications. Zero-voltage-switching performance is achieved for both the primary- and secondary-side power devices in a wide load range to reduce the switching losses due to the secondary-side phase-shift control scheme. Furthermore, compared with the conventional phase-shift control mechanism, the circulating current at the freewheeling stage is effectively suppressed as well to minimize the conduction losses. Moreover, the voltage stress of the primary switches is only half of the input voltage by employing the improved three-level structure, which makes the low-voltage rated power devices available to improve the circuit performance. In addition, the converter can work in the buck, balance, and boost modes to achieve a relatively wide input voltage range, which is an expected advantage for the communication power system to minimize the electrolytic capacitors with an acceptable hold-up time. The operation principle is analyzed and experimental results of a 1-kW 100-kHz prototype are provided to verify the effectiveness and the advantages of the proposed converter. [ABSTRACT FROM AUTHOR]

This paper provides a perspective on progress toward realization of efficient, fully integrated dc–dc conversion and regulation functionality in CMOS platforms. In providing a comparative assessment between the inductor-based and switched-capacitor approaches, the presentation reviews the salient features in effectiveness in utilization of switch technology and in use and implementation of passives. The analytical conclusions point toward the strong advantages of the switched-capacitor (SC) approach with respect to both switch utilization and much higher energy densities of capacitors versus inductors. The analysis is substantiated with a review of recently developed and published integrated dc–dc converters of both the inductor-based and SC types. [ABSTRACT FROM AUTHOR]

An auxiliary capacitor-based balancing approach is adopted in this paper to equalize the dc-link capacitor voltages of a diode-clamped multilevel converter (DCMC). Four balancing circuits, including the generalized, one-level-capacitor, one-capacitor, and simplified one-capacitor-based configurations are discussed for a five-level DCMC system. These configurations are different in connection of the auxiliary circuits and numbers of the capacitors and switches, but they work on the same principle called ping-pong operation by utilizing the auxiliary capacitor as an equalizer between the capacitors of different voltages. The unbalance phenomenon, ping-pong principle, circuit configurations, and their switching schemes are analyzed, respectively. The superiorities of the proposed approach include balancing operation regardless of load power factor and modulation index, control simplicity, and independence from main circuits when compared to the traditional approaches. Simulations and experimental results verified the performances using the proposed balancing circuits and control strategies. [ABSTRACT FROM AUTHOR]

Single-phase three-level neutral point clamped (NPC) converters are widely applied in high-speed railway electrical traction drive systems. A significant problem related to the single-phase three-level NPC converters is the fluctuation of the neutral-point voltage. In this paper, a capacitor voltage balancing technique is proposed that injects an offset voltage into the sinusoidal modulating signals of the conventional carrier-based pulsewidth modulation (CBPWM) method. Furthermore, when the injected offset voltage is maximized, it cannot only balance the dc-link capacitors voltages, but also reduce switching losses. Theoretical analysis has shown that both methods can control the neutral point voltage effectively, but the neutral point voltage controller in the CBPWM with maximum offset voltage injection (CBPWM-MOVI) has a faster dynamic response. It was observed that the high-order harmonics frequencies of the line current are centered around the twice switching frequency in the CBPWM with the offset voltage injection (CBPWM-OVI) but are centered around the switching frequency in the CBPWM-MOVI. And also, the CBPWM-MOVI has switching commutations number at least 25% below that of the CBPWM-OVI in one modulating signal period. The performances of the two strategies were verified by simulation and experimental tests. [ABSTRACT FROM AUTHOR]

This paper presents a novel modulation strategy for a seven-phase three-level inverter, aimed at variable-speed drive applications. Developed space vector pulsewidth modulation (SVPWM) strategy is based on vector space decomposition (VSD) approach and an analysis of multidimensional space vector projections in mutually orthogonal planes. The algorithm represents an extension of a recently developed five-phase three-level SVPWM algorithm and is considerably more complex, due to the existence of three mutually orthogonal planes in a seven-phase system. The difficulties of generalization of space vector strategies, which stem from the nature of the multiphase systems, are highlighted. Increasing the number of phases from five to seven increases the number of switching states from 3 ^5 = 243 to 3^7 = 2187 and the number of orthogonal planes from two to three. This considerably affects the complexity of the offline calculations. However, the final implementation of the algorithm is simple. Developed SVPWM algorithm is compared to an equivalent carrier-based strategy and it is shown that they yield identical performance. The complexity of the algorithms for real-time implementation is compared. Simulation and experimental results, obtained using neutral-point clamped inverter, verify the theoretical developments. [ABSTRACT FROM AUTHOR]

Common-mode voltages (CMVs) can lead to premature failure of the motor insulation system in medium-voltage current-source-fed drives. By analyzing the CMV values at all switching states under different operating conditions of a current-source-inverter (CSI)-based motor drive, this paper first indicates that the CMV peaks are produced by the zero states in most of the cases. The nonzero-state (NZS) modulation techniques employed in voltage-source converters are adapted for use in a space-vector-modulated current-source converter (CSC) to reduce the CMV magnitude. For NZS modulation in CSCs, the nearest three-state (NTS) modulation sequences are designed with good low-order harmonic performances in their linear modulation region of m _a ≥ 0.67 and with no increase in the device switching frequency. A combined active-zero-state (AZS) modulation technique is also proposed as compensation, for a lower modulation index in the range of 0.4–0.67, when a compromise is made between the dc-link current minimization and high input power factor control. The simulation and experimental results are provided to validate the CMV reduction effects and harmonic performances of the NTS and combined AZS modulation methods in CSI-fed drives. [ABSTRACT FROM AUTHOR]

A new system for switching electrical power using microelectromechanical systems (MEMS) is presented. The heart of the system utilizes custom-designed MEMS switching device arrays that are able to conduct current more efficiently and can open orders of magnitude faster than traditional macroscopic mechanical relays. Up to now, MEMS switches have been recognized for their ability to switch very quickly due to their low mass but have only been used to carry and switch very low currents at extremely low voltage. However, recent developments have enabled suppression of the arc that normally occurs when the MEMS switch is opened while current is flowing. The combination of the arc suppression with the MEMS switch arrays designed for this purpose enables a breakthrough increase in current and voltage handling capability. The resultant technology has been scaled to handle many amperes of current and switch hundreds of volts. Such current and voltage handling capability deliver improved energy efficiency and the capacity to handle fault current levels that are encountered in typical ac or dc power systems. Fault current interruption takes place in less than 10 \mu\s, almost regardless of the prospective fault current magnitude. The properties of the MEMS switch arrays allow the switching mechanism to operate at temperatures in excess of 200 ^\circ\C. The switches also have a vibration tolerance in excess of 1000 G. The combination of fast MEMS switching speed, optimized current and voltage handling capacity of the switch arrays, the arc suppression circuitry, and optimized sensing and control enables a single sensing, control, and switching system to operate in a small fraction of a millisecond. This paper will present the basic physics of the MEMS switches together with recent advances that enable the technology. Some illustrative examples of the ways that the devices may be used to provide protection and control within electrical systems will also be presented. [ABSTRACT FROM AUTHOR]

Flying-capacitor converters (FCCs), like most multilevel converter topologies, require a balancing mechanism of the capacitor voltages. FCCs feature natural voltage balancing when a special modulation technique is used. The classic methods, such as phase-shifted pulse width modulation (PS-PWM), result in very slow balancing for some duty-ratio ranges. Previous work has shown that for a single-leg five-level FCC, one time constant is infinite for a zero desired output voltage. In this paper, a modified PS-PWM scheme for a single-leg five-level FCC is presented, which results in faster balancing over the total duty-ratio range. The modified PS-PWM scheme is studied, resulting in an averaged voltage-balancing model. This model is verified using simulations and experiments. The modified PS-PWM scheme solves the slow-balancing problems of the normal PS-PWM method for odd-level FCCs, while maintaining the passive control property, and it provides a self-precharge capability. [ABSTRACT FROM AUTHOR]

Due to the increasing chip temperature and the strong dependency of leakage power on temperature, thermal aware power management has received a considerable amount of attention recently in energy efficient system design. In this paper, we propose a temperature-aware intra-task scheduling algorithm to minimize leakage energy in real-time systems. The basic idea of our algorithm is to run tasks at full speed when the chip temperature is low or the work urgency is high, and switch the processor to a low-power state when the chip temperature is high or the workload is light. Our offline algorithm can achieve the optimal leakage reduction for a given task with the worst-case execution time, while the online algorithm has a very low runtime complexity. The simulation results show that the online algorithm is able to reduce 34% of total leakage energy on average in both real-world and artificial benchmarks. Finally, we demonstrate how to combine our algorithm with existing dynamic voltage scaling technique to optimize the overall energy consumption. [ABSTRACT FROM AUTHOR]

The novel multilevel circuit topologies are proposed in this paper. They are called multilevel circuit topologies based on switched-capacitor and diode-clamped converters (MCT-BSD). The topology structure and the operation principle, including the working states’ transitions of the diode-clamped part, the voltages balancing mechanism of the dc link capacitors, and the pulse width modulated carrier control strategy are given. The switched-capacitor circuits contribute not only to balancing the voltages of capacitors but also to boosting the output voltage with a certain input dc voltage. The validity of the MCT-BSD is verified by simulations and experiments. The results show that balancing the voltages of capacitors, boosting the output voltages, and operating under the three-phase condition are all realized effectively in the MCT-BSD. The simulations also show the generalization of the MCT-BSD for n-level topologies. [ABSTRACT FROM AUTHOR]

The design and characterization in high-voltage (HV)-CMOS technology of an innovative intelligent power switch (IPS) for harsh automotive applications is proposed in this paper. To safely handle the ordinary and extraordinary automotive electrical and environmental conditions, a systematic design flow is followed: several design solutions are presented at the architectural and circuital level, integrating on-chip self-diagnostic capabilities and full protection against the high voltage and reverse polarity, the effects of wiring parasitics, and the over-current and over-temperature phenomena. Moreover, the current slope and soft start integrated techniques ensure a low electromagnetic interference, and the IPS is also configurable to efficiently drive different interchangeable loads. The innovative IPS has been implemented in a 0.35-\mu\m HV-CMOS technology and has been embedded in mechatronic third generation brush-holder regulator system-on-chip for an automotive alternator. The electrical simulations and experimental characterization and the testing at component and on-board system levels prove that the proposed design allows a compact and smart power switch realization facing the harshest automotive conditions. [ABSTRACT FROM AUTHOR]

When small currents are interrupted by a vacuum switch, it is well known that the chopping current and the associated overvoltage are observed. Many investigations on the current-chopping phenomena in alternating-current (ac) circuits have been carried out, but there are no data available on inverter circuits in spite of their recent wide application to synchronous motor systems. In this paper, chopping-current levels and the overvoltages in an inverter circuit under a simple three-level pulsewidth-modulated control are investigated. As a result, the mean chopping-current level is three to four times higher than that in an ac circuit. In particular, high chopping currents occur only when the timing of the current interruption by the vacuum switch synchronizes with that of the inverter's switching, which we call “double chopping.” High chopping current due to double chopping might be harmful since the high overvoltage proportional to the chopping-current level could damage the insulation of electric equipment. However, we experimentally confirmed that a typical surge suppressor could reduce overvoltage. [ABSTRACT FROM AUTHOR]

In this paper, a novel three-phase soft-switching inverter is presented. The inverter-switch turn on and turn off are performed under zero-voltage switching condition. This inverter has only one auxiliary switch, which is also soft switched. Having one auxiliary switch simplifies the control circuit considerably. The proposed inverter is analyzed, and its operating modes are explained in details. The design considerations of the proposed inverter are presented. The experimental results of the prototype inverter confirm the theoretical analysis. [ABSTRACT FROM AUTHOR]

A novel zero-voltage-transition high-efficiency bridgeless power-factor-correction (PFC) circuit with a zero-current-switching auxiliary switch was proposed, analyzed, and experimentally verified. An assist circuit, consisting of a resonant inductor, two blocking diodes, a clamping circuit, an autotransformer, and an auxiliary MOSFET switch, was used to reduce the turn-on switching loss of the two main switches of the bridgeless PFC circuit and the turn-off switching loss of the auxiliary switch. The soft commutation of the main switches is achieved without imposing an additional voltage stress on the main switches. Feedback gate-drive signals can be obtained by using an existing converter IC controller modified to fit the purpose. In this paper, a detailed description of the circuit operation will be given. Based on the analysis, the guidelines for the component selection are presented. A prototype of 100-kHz 600-W universal-line PFC bridgeless circuit was built to verify the proposed scheme. In addition, based on the same concept, a family of bridgeless PFC configuration was proposed. [ABSTRACT FROM AUTHOR]

Many static synchronous compensators (STATCOMs) utilize multilevel converters due to the following: 1) lower harmonic injection into the power system; 2) decreased stress on the electronic components due to decreased voltages; and 3) lower switching losses. One disadvantage, however, is the increased likelihood of a switch failure due to the increased number of switches in a multilevel converter. A single switch failure, however, does not necessarily force an (2n + 1)-level STATCOM offline. Even with a reduced number of switches, a STATCOM can still provide a significant range of control by removing the module of the faulted switch and continuing with (2n - 1) levels. This paper introduces an approach to detect the existence of the faulted switch, identify which switch is faulty, and reconfigure the STATCOM. This approach is illustrated on an eleven-level STATCOM and the effect on the dynamic performance and the total harmonic distortion (THD) is analyzed. [ABSTRACT FROM AUTHOR]

A novel high step-up dc–dc converter for a distributed generation system is proposed in this paper. The concept is composed of two capacitors, two diodes, and one coupled inductor. Two capacitors are charged in parallel, and are discharged in series by the coupled inductor. Thus, high step-up voltage gain can be achieved with an appropriate duty ratio. The voltage stresses on the main switch and output diode are reduced by a passive clamp circuit. Therefore, low resistance R DS(ON) for the main switch can be adopted to reduce conduction loss. In addition, the reverse-recovery problem of the diode is alleviated, and thus, the efficiency can be further improved. The operating principle and steady-state analyses of the voltage gain are also discussed in detail. Finally, a 24-V input voltage, 400-V output voltage, and 400-W output power prototype circuit of the proposed converter are implemented in the laboratory to verify the performance. [ABSTRACT FROM AUTHOR]

It is difficult to design a standard gate driver for optimal switching control of a static induction thyristor (SI-Thy) because of its unique internal structure and the direct commutation switching characteristic between the gate and cathode terminals during the transient turn-on and turn-off switching phases. Therefore, it is important to develop a simple and effective gate driver for achieving optimal fast turn-on and stable switching operations in an SI-Thy under hard-switching conditions. To achieve faster turn-on switching time with shorter gate delay time, impedance matching between the SI-Thy and the turn-on driving circuit component in the gate driver can be realized with additional circuit modification through this paper. To ensure higher stabilities in the turn-off switching phase, forced commutation techniques and additional auxiliary circuits in the gate driver have been devised to suppress the latchup and to eliminate potential ringing possibility. We have demonstrated that our designed and tested gate driver for realizing optimal switching characteristics of an SI-Thy is effective, particularly in the gate driving circuits for various pulsed-power switching applications. [ABSTRACT FROM PUBLISHER]

This paper describes two new approaches for the determination of the direction of switched capacitor banks as well as an efficient technique for estimating the distance of switched capacitors from the monitoring location in distribution systems. At first, two new indices based on branch voltage and current changes immediately after the capacitor switching instant are proposed for determining the direction of switched capacitor banks. The wavelet transform is used to detect the exact instant of switching. Then, a new technique based on linear circuit theory is proposed to estimate the distance of the switched capacitor bank from the monitoring location using capacitor switching transient data. Simulation results show that the error of the estimated distance is acceptable. A combination of the approaches for direction finding and the technique for distance estimation provide a novel method for determining the location of switched capacitor banks in real distribution systems. The method is valid in all normal, back-to-back, and abnormal switching of wye- and delta-configured capacitor banks. Also, the size of the capacitor bank has no effect on method accuracy. The efficacy of the proposed method is validated by using the IEEE 13-bus and 34-bus distribution systems. [ABSTRACT FROM AUTHOR]

AC voltage and phase regulators based on tap changers implemented with silicon-controlled rectifiers and triacs are widely used due to their robustness. Tap changing is achieved under natural commutation of semiconductors during the zero crossing of current, so that the response time exceeds the half cycle of the mains. High-power transistors and gate turn-off thyristor switches make new and faster tap commutation techniques possible to achieve several tap changes in one half cycle. This paper analyzes and synthesizes a dual-tap chopping stabilizer with a compensating transformer, with a pulsewidth-modulation frequency of about 5 kHz and a new soft-switching technique achieved by two auxiliary small-power branches. Unlike other supercyclic ac soft-switching solutions, the new commutating method allows zero current turn-off, several times in a half cycle, for any sign combination of voltage and current, thus reducing the electrical stress in the switches and the electromagnetic emission. Zero-crossing current detection is not needed. A technical study and an evaluation of the power of the required components are done on the commutation techniques that extend the application field of tap changers to the reduction of the fast perturbations of the mains as flicker, voltage harmonics, voltage oscillations, etc. Experimental results with insulated-gate bipolar transistor switches are obtained in a 1 kVA prototype. [ABSTRACT FROM AUTHOR]

This paper describes the construction and experimental tests of a 12-kV high-voltage high-action generator based on reverse-switching dynistor (RSD) assembly. The main RSD unit consists of seven 76-mm-diameter dynistor pieces connected in series with a blocking voltage of about 2.4 kV, a magnetic switch based on a 1K101 amorphous alloy core, the trigger system based on a saturable transformer, and a 16-mm RSD assembly; the trigger current could reach 2 kA in amplitude with 1-\mu\s duration under 10 kV. The working voltage rate of this RSD unit is about 8–12 kV. Experiment on a 2.2-mF capacitor test bed under 12 kV working voltage, the switch current amplitude reached 150 kA with 300-\mu\s duration; the transferred charge is about 26.5 C and the action is 2.94 \MA^2\s, respectively. [ABSTRACT FROM AUTHOR]

This paper describes the operation of a solid-state series stacked topology used as a serial and parallel switch in pulsed power applications. The proposed circuit, developed from the Marx generator concept, balances the voltage stress on each series stacked semiconductor, distributing the total voltage evenly. Experimental results from a 10 kV laboratory series stacked switch, using 1200 V semiconductors in a ten stages solid-state series stacked circuit, are reported and discussed, considering resistive, capacitive and inductive type loads for high and low duty factor voltage pulse operation. [ABSTRACT FROM AUTHOR]

Energy conversion enhancement of piezoelectric materials has been subject to intensive research over the last decade. Among the proposed solutions (for instance, single crystal), it has been shown that applying a simple and low-cost nonlinear treatment to the voltage output can significantly increase the conversion abilities of such materials. However, such an approach also adds significant electrical losses, dramatically reducing the available electric energy generated from the mechanical excitation. Such an observation is even more important when the energy in the system is limited, for example when the structure is submitted to a pulsed excitation. The purpose of this paper is to describe an efficient approach for reducing such losses, based on the transfer of the electrostatic energy when it starts to decrease. It is shown that such an approach allows increasing the converted energy by a gain up to a factor of 3, especially for weakly coupled electromechanical systems. [ABSTRACT FROM AUTHOR]