Search

Highlights • Relational event models can capture real-time social network dynamics. • A moving window approach can show how the drivers of network interaction evolve over time. • Bayes Factors can be used to quantify evidence for competing models in real-time. • Dynamic relational event modeling can show and explain criticality in event networks. Abstract There has been an increasing interest in understanding how social networks evolve over time. The study of network dynamics is often based on modeling the transition of a (small) number of snapshots of the network observations. The approach however is not suitable for analyzing networks of event streams where edges are constantly changing in frequency, strength, sentiment, or type in real time. In this paper, we present a relational event model that directly models interaction rates as a function of endogenous and exogenous variables. The effects of these variables are likely to be dynamic over time themselves. To properly capture the dynamic nature of the network drivers, we develop a moving window approach that can accomodate arbitrarily long memory lengths. We show how Bayes factors and posterior model probabilities can be used to quantify the statistical evidence in the data for the existence, direction, and relative strength of the network drivers, over time. We illustrate the approach by analyzing streams of email messages about innovation activities between employees in a consultancy firm. We allow the drivers of these email exchanges to vary over time and consider two different memory lengths (60 days versus 150 days). The proposed methodology can be used to uncover new insights about interaction dynamics in real time event networks. For instance, the illustrative analyses reveal how similarity (in terms of expertise, tenure, or geographic location) affects email network dynamics and how this gradually changes over a year. [ABSTRACT FROM AUTHOR]

Acoustic echo cancellation (AEC) is critical for telecommunication applications involving two or more locations such as teleconferencing. It is also challenging because of loud- speaker's nonlinearity, real-time implementation requirement, and multipath effects of indoor environments. This paper addresses the nonlinear AEC problem. We use a Hammerstein model to describe the memoryless nonlinearity of loudspeaker concatenated with a linear room impulse response. We propose a method using a pseudo magnitude squared coherence (MSC) function to identify the nonlinearity in the Hammerstein system and develop an on-line AEC algorithm. Our method identifies nonlinearity without knowing the linear block in the Hammerstein system, which guarantees the stability of the algorithm and leads to a faster convergence rate. Moreover, several alternative criteria based on the MSC function are also proposed for nonlinearity identification. Effectiveness of the proposed algorithms is demonstrated through computer simulations. [ABSTRACT FROM AUTHOR]

Many benefits come with the real-time simulation of electric machinery and drives. HYPERSIM, a fully digital real-time power system simulator, originally based on large parallel supercomputer, is now adapted to a new hardware platform, in order to increase its flexibility and accessibility. This paper presents a new hardware architecture, called PC-cluster, for real-time simulation of complex power system networks, including power electronics.A PC-cluster consists of several commodity PC interconnected with high-speed network. This new hardware platform for the HYPERSIM simulator is completely based on components-off-the-shelf (COTS), such as commercial motherboard, PCI input/output (I/O) board and communication board.The general implementation of the real-time parallel simulator is introduced in this paper. All aspects of the simulation, such as communication, calculation, synchronization, I/O access and acquisition, are presented in detail. To evaluate the performance of the new hardware platform in a real simulation, a complete application of electric machine drive is presented.This new hardware technology is bringing interesting benefits to power system engineers. It is now easier to have access to powerful simulation tools, in order to perform precise and complete power system studies. [Copyright &y& Elsevier]

Hydro-NEXRAD-2 (HNX2) is a prototype system that allows hydrologic users real-time access to NEXRAD radar data in support of a wide range of research. The system processes basic radar data (Level II) and delivers radar-rainfall products based on the user's custom selection of features such as spatial domain, rainfall product space and time resolution, and rainfall estimation algorithms. HNX2 collects real-time, unprocessed data from multiple NEXRAD radars as they become available, processes them through a user-configurable pipeline of data-processing modules, and publishes the processed data-products at regular intervals. Modules in the data-processing pipeline encapsulate algorithms such as non-meteorological echo detection, radar range correction, radar-reflectivity-rain rate (Z-R) conversion, echo advection correction, mosaicking of products from multiple radars, and grid projections and transformations. This paper describes the challenges involved in HNX2's development and implementation, which include real-time error-handling, time-synchronization of data from multiple asynchronous sources, generation of multiple-radar metadata products, and distribution of products to a user base with diverse needs and constraints. HNX2 publishes products through automation and allows multiple users access to published products. Currently, HNX2 is serving near real-time rain-rate maps for Iowa in the USA using data from seven radars covering the state. Hydrologic models operated by The University of Iowa's Iowa Flood Center use these products. [ABSTRACT FROM AUTHOR]

This work presents a SOC-based (system-on-chip) architecture for ultrasonic imaging systems in airborne transmission which uses macro-sequences derived from complementary sets of sequences (CSS) to achieve simultaneous beam steering in several directions. By means of CSS concatenation and zero padding, a new macro-sequence can be obtained which achieves zero auto- and cross-correlation zones (ZCZ). These zones can be adjusted to provide interference-free CDMA (code division multiple access) within the scanning area. The correlation results with the proposed macro-sequences provide the A-scan lines for a final B-scan image. In contrast to other encoding schemes with similar sizes of ZCZ, the one proposed here allows an architecture design that further minimizes the computational load to make real-time processing feasible. The implementation of the proposed architecture in a FPGA (field-programmable gate array) device, including all the stages from the emission and reception modules of the imaging ultrasonic system, is presented. The ultrasonic phased array has 8 elements and permits the simultaneous analysis of 32 different angular sectors, for a maximum range of 1.5 m and an angular aperture of \pm \64^\circ. [ABSTRACT FROM AUTHOR]

This paper deals with the process of optimizing embedded digital signal processor (DSP) systems. Although efficiency goals differ in every system, optimization normally focuses on program execution speed, memory usage, and power consumption. DSP are a specialized type of microprocessor that handles certain types of algorithms extremely efficient for real-time signal processing. Compilers perform optimization techniques that are both machine dependent and independent. A particularly important generic optimization technique is loop unrolling. The trade-off in loop unrolling is that it requires more instruction code, and more registers and cache space for data. Because DSP are number crunchers by nature, their assembly instruction sets may include some instructions for mathematical operations used often in algorithms. Assembly operations require different lengths of time due to memory-access delays and differences in parallel function units. When the compiler predicts these conditions, it can force the processor to wait by inserting no operation cycles into the instruction stream. Software pipelining inherently improves execution speed, but it may not be possible if unnecessary dependencies exist. Direct memory access control is essential to the operation of high-performance DSP, allowing data transfers to proceed with little or no intervention from the processor core.

We investigate a class of finite-dimensional time decoding algorithms that: 1) is insensitive with respect to the time-encoding parameters; 2) is highly efficient and stable; and 3) can be implemented in real time. These algorithms are based on the observation that the recovery of time encoded signals given a finite number of observations has the property that the quality of signal recovery is very high in a reduced time range. We show how to obtain a local representation of the time encoded signal in an efficient and stable manner using a Vandermonde formulation of the recovery algorithm. Once the signal values are obtained from a finite number of possibly overlapping observations, the reduced-range segments are stitched together. The signal obtained by segment stitching is subsequently filtered for improved performance in recovery. Finally, we evaluate the complexity of the algorithms and their computational requirements for real-time implementation. [ABSTRACT FROM AUTHOR]