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Flyback/forward derived power converters offer operational simplicity, but require active clamping circuits to reduce switch voltage stress and improve the converter efficiency. This paper presents an active clamping circuit technique, which additionally ensures enhancement in the converter voltage gain. This is enabled by the proposed auxiliary circuit, which introduces a charged capacitor in series with the primary source during the energizing interval. Two circuits are designed on this principle, and design and operation of both are presented for discontinuous conduction modes. It is shown that the voltage gain of these circuits increases with increase in the leakage inductance, which is an improvement over existing converters. Also, in one circuit primary (secondary) winding, rms current is similar to (lower than) that in a typical ideal flyback converter, leading to improvement in power density. Operation and analyses of this variant are experimentally verified with a 400-V laboratory prototype. [ABSTRACT FROM AUTHOR]

Inductive power transfer (IPT) is widely discussed as an alternative to contact charger for plug-in hybrid and electric vehicles. This paper analyzes a contactless battery charger back-end power factor correction (PFC) concept, reducing the primary-side circuit complexity and physical size. For that purpose, the main volume and loss factors of a contactless battery charger are identified, discussing the partitioning of tasks to perform a unity power factor operation. An analysis of the most commonly used front-end PFC and the proposed back-end PFC configuration is performed, with the aim of highlighting benefits and limitations of each variant. Moreover, performance of silicon (Si) and gallium nitride (GaN) devices has also been evaluated, defining the main advantages and drawbacks of both semiconductor technologies in different IPT scenarios. The study is verified experimentally on a 3.2 kW contactless battery charger. [ABSTRACT FROM AUTHOR]

This paper presents a nine-level transformer-based inverter requiring only eight switches. The envisaged structure consists of two standard H-bridges fed from a single dc source. Besides, a single-phase transformer is employed to aid the process of intermediate voltage level generation. An ad-hoc pulsewidth modulation scheme based on boolean logic form equations is developed to derive the gating pulses. An effortless extension of the proposed inverter to a higher number of voltage levels is also achieved by generalizing the switching functions. Furthermore, the superior performance of the proposed topology is demonstrated through a comprehensive cost-based analysis. Finally, the validation of the proposed topology is accomplished through experiments on a down-scale prototype, and the measurement results are included. [ABSTRACT FROM AUTHOR]

Pollution problems caused by fossil fuels have led to more investigations on renewable energy systems. Photovoltaic cells and fuel cells output low-level voltage than required; therefore, high gain dc–dc converters are used to boost this low voltage. The Z-source converter can be employed as dc–dc converter to boost the photovoltaic panel voltages. It also offers other advantages, such as clamped switched voltage, high voltage gain, isolation of energy source from the load, and positive polarity for output voltage; therefore, this is a good choice for high step-up applications. This paper presents analysis of a novel high step-up Z-source based dc–dc converter that has higher voltage gain than the Z-source converter. Furthermore, high efficiency, low device voltage stress, and wide voltage gain range make it a good candidate for photovoltaic and high voltage step-up applications. The proposed dc–dc converter is evaluated experimentally for converting 24-V dc input to 300-V dc output at 100 W and to validate the simulation results. [ABSTRACT FROM AUTHOR]

This paper proposes new angles constraint for selective harmonic elimination-pulsewidth modulation (SHE)-PWM utilized in single-phase inverter applications. The proposed angles constraint naturally eliminates all triplen harmonics, whereas they conventionally appeared in all single-phase output voltages. The harmonic amplitude formula is developed based on the obtained angles constraint, and then modified single-phase SHE equations are defined to eliminate only specified low nontriplen harmonics. Therefore, more harmonics would be eliminated with the same switching frequency in modified SHE-PWM. Five-level voltage waveform has been opted to implement the introduced method, but it can be applied on all multilevel voltage waveforms such as seven-level with even number of angles. Unlike the conventional SHE technique, THD is analyzable in modified SHE to find optimum values for switching angles in order to control noneliminated harmonic amplitudes and minimize THD. Moreover, the cancellation of triplen harmonics empowers a single-phase inverter to supply nonlinear loads beside linear ones. Some experimental tests are accomplished using a single-phase five-level modified packed U-cell (MPUC) inverter. Results are discussed to prove the excellent performance of a single-phase MPUC inverter under both normal and harmonic loads and accurate elimination of determined triplen and nontriplen harmonics by applying the presented angles constraint. [ABSTRACT FROM AUTHOR]

This paper proposes a new single-phase single-stage switched-boost inverter with four switches. Like the quasi-Z-source inverter and quasi-switched boost inverter (qSBI), the proposed inverter has the main features as continuous input current, buck/boost voltage with single-stage conversion, and shoot-through immunity. Compared to the qSBI, the proposed inverter uses one more capacitor and one less switch. This paper presents the operating principles, pulse-width modulation control strategy, parameter design guidelines, and simulation results for the proposed inverter. To verify the performance of the proposed inverter, an 800-W prototype was built with an 110 V/50 Hz output voltage in stand-alone and grid-connected modes. The simulation and experimental results matched those of the theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper presents the active capacitor voltage-balancing (ACVB) methods based on the dynamic model for a five-level nested neutral-point piloted (NNPP) converter using hybrid carrier modulation. The traditional hybrid carrier modulation provides natural voltage balancing of floating capacitors and dc-link capacitors. First, the natural voltage-balancing ability under steady-state and ideal conditions is theoretically proved. However, there are accumulated errors and deviations of capacitor voltages in practical applications, especially under dynamic conditions. In order to address the accumulated errors and deviations of capacitor voltages, the dynamic models of floating-capacitor voltages and neutral-point voltage are established. Moreover, the ACVB method based on the dynamic model of the neutral-point voltage is proposed by injecting the zero-sequence voltage. And the ACVB method based on the dynamic model of floating-capacitor voltages is proposed by introducing the adjustment variables. The proposed ACVB methods have the advantages of simple formula, definite physical meaning, and high accuracy. Furthermore, the output voltage quality and current quality are evaluated in term of total harmonic distortion and the effect of model parameter mismatch on the proposed ACVB methods is presented. Finally, the comparative simulation and experimental results verify the correctness of the proposed ACVB methods based on the dynamic model under different conditions. [ABSTRACT FROM AUTHOR]

Bipolar redox-based resistive random-access memory cells are intensively studied for new storage class memory and beyond von Neumann computing applications. However, the considerable variability of the resistance values in ON and OFF state as well as of the SET voltage remains challenging. In this paper, we discuss the physical origin of the significant reduction in the switching variability of HfO2-based devices achieved by the insertion of a thin TiOx layer between the HfO2 layer and the oxygen exchange metal layer. Typically, HfO2 single layer cells exhibit an abrupt SET process, which is difficult to control. In contrast, self-compliance effects in the HfO2/TiOx bilayer devices lead to an increased stability of SET voltages and OFF-state resistances. The SET process is gradual and the RESET becomes abrupt for higher switching currents. Comparison of the experimental data with simulation results achieved from a physics-based compact model for the full description of the switching behavior of the single layer and bilayer devices clearly reveal three major effects. The TiOx layer affects the temperature distribution during switching (by modifying the heat dissipation), forms an additional series resistance and changes the current conduction mechanism in the OFF state of the bilayer device compared to the single layer device. [ABSTRACT FROM AUTHOR]

This paper introduces a switched-capacitor dc combiner suitable for energy harvesting applications. Since the dc voltage is small, addition of the voltages from different sources can boost the final output voltage with self-startup capability. This approach is valid for any number of dc voltage sources. To prove the energy harvesting principle, three sources are selected. The design of the three-input dc combiner, with no closed-loop controller, is fabricated in 0.13-\mu\textm CMOS technology and the chip area is 1.5 × 1.5 \textmm^2. With integrated tunable thyristor-based differential oscillators, the chip can combine power from all three inputs. Manual frequency modulation is used to deliver the maximum power to the load. The system has proven to be functional even if one or two of the sources is/are weak or not available. Finally, for indoor conditions, the power from three different solar cells is combined where 70 $\mu$ W is harvested with an open-circuit voltage of 1.4 V and the short-circuit current of 160 $\mu$A. [ABSTRACT FROM PUBLISHER]

This paper proposes an improved dc transformer (NDCT hereinafter) based on switched capacitor with reduced switches for the integration of low-voltage dc energy storage systems and medium-voltage dc power distribution grid. The topology, phase-shift (PS) shoot-through and multiple PS modulations, and voltage, current, and power characterizations, as well as commutation characterization and control strategy, are proposed and analyzed comprehensively. Compared with the traditional schemes, the proposed NDCT not only can enhance reliability and flexibility but can increase voltage adjustment and power transfer capabilities as well. Moreover, the current ripple performance and soft-switching performance are improved, and the number and capacity of switches are reduced, thereby increasing the efficiency and cost of the system. Finally, an NDCT prototype is built. Experimental results verify the correctness and effectively of the proposed solution. [ABSTRACT FROM PUBLISHER]

This paper presents a hybrid pulse width modulation-based discontinuous modulation (D-HPWM) strategy with dc-link voltage balancing for a three-level neutral-point-clamped (NPC) traction inverter drive. The results are then compared with continuous-hybrid-PWM (C-HPWM) to check the performance improvement. The HPWM strategy uses both the advantages of carrier- and space-vector-based PWM strategies. The duty cycles are generated using the carrier-based strategy to reduce the computational time and complexity of the system and redundant vector states are used to keep the two dc-link capacitor voltages balanced. As discontinuous PWM (DPWM) reduces the switching losses considerably compared to the continuous PWM, the DPWM strategy is developed in this paper for the HPWM-based strategy. Detailed comparison studies are then carried out in MATLAB/Simulink and PLECS to show the conduction and switching loss distribution with change in modulation index for different power switches. A 54.0-kW surface permanent magnet synchronous machine (PMSM) is used for this simulation studies. Moreover, the total inverter loss and losses in each insulated gate bipolar transistor (IGBT) are also compared. Detailed experimental performance analysis is also carried out with a scaled down prototype of a 6.0-kW surface PMSM, NPC inverter, and real-time emulator DSpace, to show the capacitor voltage deviation with both control strategies. [ABSTRACT FROM PUBLISHER]

This paper presents a comprehensive analysis of the current-stress optimization and soft-switching operation of the isolated bidirectional dual active bridge (DAB) dc–dc converter with the unified triple-phase-shift (UTPS) control. On this basis, the current-stress-optimized modulation scheme is proposed for DAB, which leads to the minimum current stress with the required transmission power and voltage conversion ratio in the whole load range. Moreover, the full soft-switching operation is achieved for the converter simultaneously. Distinct from the previous modulation schemes, the proposed optimized modulation scheme is deduced from a unified analysis of TPS where all effective switching modes are investigated. A novel algorithm based on the Karush–Kuhn–Tucker (KKT) conditions is originally proposed to derive closed-form solutions for the global optimal control parameters. This paper also presents a typical closed-loop control strategy for DAB with TPS control and detailed descriptions about the closed-loop operation. A laboratory prototype is applied, and the experimental results validate that the current-stress optimization and efficiency improvement are realized by applying the optimized modulation scheme. The experimental results also verify the effectiveness of the closed-loop control strategy for DAB with TPS control. [ABSTRACT FROM PUBLISHER]

Proper use of phase-controlled switching technology by controlling the making or breaking of the circuit breaker (CB) at predetermined phase angles of current or voltage can improve the service life of the CB, avoid relay protection device from mal-operation, and reduce the impact on the power grid when power equipment or load is energized or taken out. This paper proposes a novel phase-controlled switching method to address the influence of residual flux for three-phase wye winding unloaded transformers with three limbs, such as large capacitor variable frequency transformer or mine explosion-proof transformer. The optimal operation phase angle for CBs is firstly obtained via theoretical analysis. A model based on the alternative transients program/the electromagnetic transients program (ATP/EMTP) is then built to simulate the transient procedure of a power transformer during breaking and making. The simulated results confirm that the proposed switching strategy can reduce the excitation inrush current effectively when the unloaded transformers are energized. The experimental results reported in this paper are used to validate the accuracy and effectiveness of the phase-controlled switching strategy. [ABSTRACT FROM PUBLISHER]

A new pulsewidth modulation (PWM) strategy which is an alternative approach of the discontinuous PWM (DPWM) for a three-level neutral-point-clamped (NPC) inverter is proposed in this paper. A three-level NPC inverter is completely mature and very well-established topology in high-power applications. However, the three-level NPC inverter has an inheritance problem of the neutral-point voltage unbalancing due to the split dc-link capacitors. This structure can cause large neutral-point voltage ripple. Furthermore, output currents of the three-level NPC inverter are distorted by the neutral-point voltage ripple. Therefore, the neutral-point voltage must be controlled. In this paper, a new DPWM method using two different offsets for the neutral-point ripple reduction is proposed and the effectiveness of the proposed DPWM method is verified by using the simulation and the experimental results. [ABSTRACT FROM PUBLISHER]

In this paper, a novel multilevel dc–ac inverter is proposed. The proposed multilevel inverter generates seven-level ac output voltage with the appropriate gate signals’ design. Also, the low-pass filter is used to reduce the total harmonic distortion of the sinusoidal output voltage. The switching losses and the voltage stress of power devices can be reduced in the proposed multilevel inverter. The operating principles of the proposed inverter and the voltage balancing method of input capacitors are discussed. Finally, a laboratory prototype multilevel inverter with 400-V input voltage and output 220\ \textV\text{rms}/2\,{\text{kW}} is implemented. The multilevel inverter is controlled with sinusoidal pulse-width modulation (SPWM) by TMS320LF2407 digital signal processor (DSP). Experimental results show that the maximum efficiency is 96.9% and the full load efficiency is 94.6%. [ABSTRACT FROM AUTHOR]

This paper presents a new application of power and voltage balance control schemes for the cascaded H-bridge multilevel inverter (CHMI)-based solid-state transformer (SST) topology. To reduce load on the controller and simplify modulation algorithm, a master–slave control (MSC) strategy is designed for the dual active bridge (DAB) stage. The master controller executes all control and modulation calculations, and the slave controllers manage only device switching and protection. Due to the inherent power and dc-link voltage unbalance in cascaded H-bridge-based SST, this paper presents a compensation strategy based on three-phase dq decoupled current controller. An optimum zero-sequence component is injected in the modulation scheme so that the three-phase grid currents are balanced. Furthermore, to tightly regulate the output voltage of all the DAB modules to target value, a dynamic reference voltage method is also implemented. With this proposed control method, the three-phase grid currents and dc-link voltage in each module can be simultaneously balanced. Finally, simulation and experimental results are presented to validate the performance of the controller and its application to microgrid SST. [ABSTRACT FROM PUBLISHER]

In this paper, a new modulation method is proposed for a Z-source three-level T-type inverter (3\mbox{LT}^2{I}). The Z-source 3\mboxLT^2I combines the merits of the Z-source two-level inverter and the advantages of the Z-source neutral-point-clamped inverter. Although the previous literature has proved that the space vector modulation (SVM) technique for Z-source 3\mboxLT^2I produces the desired voltage transfer gain with minimized switching loss, it cannot deal with the neutral-point (NP) potential balance issue. Therefore, an improved SVM method addressing this problem for Z-source 3\mbox{LT}^2{I} is proposed. The method simplifies the space-vector diagram of a Z-source 3\mbox{LT}^2{I} into that of a Z$-source two-level inverter. In order to obtain NP potential balance, the pattern of the conventional symmetric SVM is changed by properly adding or subtracting a percentage of the minimum gate-on time. The upper and lower shoot-through states can be inserted into the improved symmetric SVM, thus offering av few advantages, including boosting ability, NP potential balance, and low switching loss. The considerate stable NP voltage and the boosting gain have been experimentally proven by results from a prototype inverter. [ABSTRACT FROM AUTHOR]

This paper proposes a novel bridge-type solid-state fault current limiter (BSSFCL) based on one series reactor which operates in ac and dc modes. The proposed BSSFCL includes a rectifier bridge with a reactor. This reactor is used as a dc reactor in normal operation mode and as an ac reactor in fault conditions. The advantages of the proposed BSSFCL over the existing dc reactor-type FCLs are its negligible impedance in normal operation mode and its high impedance during a fault interval using simple and novel switching. In other words, during the normal operation mode, the proposed BSSFCL operates in dc mode and in the fault interval, its topology is changed to the ac mode. This switching decreases the switching transient recovery voltage and introduces considerable impedance during the fault period. MATLAB/Simulink software is used for simulations and a prototype is designed and tested for results verification, and to show the performance of the proposed BSSFCL. [ABSTRACT FROM PUBLISHER]

The large number of voltage levels in a modular multilevel converter (MMC) make staircase modulation a feasible alternative, particularly in high-power applications. However, staircase waveforms do not necessarily mean operation of the MMC submodules (SMs) at the fundamental frequency. This paper presents an analysis of SM switching frequencies in staircase-modulated MMCs and their correlation to the modulation index and load phase angle. A carrier-based pulsewidth-modulation (CB-PWM) equivalent technique is also developed. This analysis demonstrates that CB-PWM techniques provide a similar switching frequency with superior harmonic performance and improved voltage balancing characteristics at all modulation indices compared to staircase modulation. The theoretical analysis is verified with extensive simulation results for MMCs with different SMs and experimental results from a laboratory prototype. [ABSTRACT FROM PUBLISHER]

The traditional space-vector pulsewidth modulation (SVPWM) maximum voltage transfer ratio (VTR, i.e., the ratio of the output voltage fundamental amplitude to the input voltage fundamental amplitude) is 0.866 in a linear modulation region. In this paper, the output voltage fundamental amplitude and total harmonic distortion (THD) affected by a basic vector and a hexagon vector in traditional indirect SVPWM overmodulation are analyzed. The traditional indirect SVPWM overmodulation usually focuses on the inverter stage to improve the VTR, and there are few methods considering both of the inverter and rectifier stages to improve the overmodulation performance of a matrix converter (MC), including output voltage error, and output and input current THDs. In this paper, a new overmodulation method based on indirect SVPWM is presented. Both the output performance and input performance of the MC with the proposed and traditional overmodulation methods are emulated and tested. Simulation results indicate that the output voltage error and the input current THD are smaller and lower, respectively, with the proposed method. Experimental results verify that theoretical analysis is right, and the proposed overmodulation method is feasible. [ABSTRACT FROM PUBLISHER]

A virtual space vector modulation technique reducing both magnitude and third-order harmonic component of the common-mode voltage (CMV) in a two-level voltage-source inverter (VSI) is proposed in this paper. The presented method employs a set of virtual space vectors constructed from original stationary space vectors to conduct modulation. Since the created virtual vectors have the lowest instantaneous and zero average CMVs, both the magnitude and third-order harmonic component of the generated CMV are reduced, contributing to better overall CMV performance and common-mode filter design in VSI applications. Three variants of the proposed modulation method using different virtual space vector combinations are presented. The concept of the virtual space vector modulation technique demonstrated with two-level inverter in this paper can also be extended to multilevel inverters. Simulation and experimental results, as well as comparisons with existing methods are provided to verify the proposed technique. [ABSTRACT FROM AUTHOR]

Smart grid technologies are expected to increase system efficiency and reliability using advancement in automation, communication, computation, and optimization. Several control algorithms have been developed or enhanced for operation and control of smart distribution grid. In recent years, volt/var control (VVC) algorithms have been proposed for energy saving in distribution systems due to advancement provided by smart grid automation and control. VVC helps to lower distribution feeder voltage to decrease energy consumption. However, quantification of this impact is hard due to several external factors such as weather and end users' behavior. On the other hand, existing evaluation methods of VVC algorithms are either not suitable for long-term study or intrusive. This paper addresses these issues by proposing a new technique to estimate “distribution system demand without smart grid implementation” utilizing “data measured from system with smart grid implementation.” Interdependence of voltage and load is considered based on estimated load characteristic. Our key contribution is developing a method for quantifying the real-time energy saving of smart grid automation and control focused on VVC and implementing in an electric utility in eastern Washington, USA. The algorithm is developed using both commercial and open-source software. [ABSTRACT FROM AUTHOR]

A four-level five-phase open-end winding (OeW) drive topology is introduced in this paper. The drive comprises a five-phase induction machine with open-end stator windings, supplied using two two-level voltage-source inverters with isolated and unequal dc-link voltages, in the ratio 2 : 1. The topology offers the advantages of a modular structure with fewer semiconductor components and has a greater potential for fault tolerance, as compared with an equivalent single-sided four-level drive. Due to the large number of switching states, development of a suitable space vector pulsewidth-modulation (PWM) method can be challenging. Hence, this paper examines the implementation of two-level-shifted carrier-based PWM methods. The effect of dead time on the drive performance is discussed, and it is shown that simultaneous PWM switching of both inverters can lead to degraded output phase voltage waveforms. Detailed analysis of this phenomenon is presented, a solution is proposed, and the modified modulation techniques are incorporated in an experimental setup, at first in conjunction with $V/f$ control. Once the proof of concept has been provided, full field-oriented control is implemented in this OeW drive topology for the first time; detailed experimental testing is conducted, and results are reported. [ABSTRACT FROM AUTHOR]

This paper introduces the periodic carrier frequency modulation (PCFM) for permanent magnet synchronous motor (PMSM) drive systems so as to reduce the low-frequency electromagnetic interference (EMI). PMSMs are widely used in many applications and they are usually fed by pulsewidth modulation (PWM) inverters. The EMI of PMSM, which results from the switch of power device, generates undesirable effects on the control system. Therefore, it is of importance to reduce the EMI of PMSM. The common mode (CM) conducted EMI model of the PMSM drive system is constructed to investigate the CM voltage. The simulations and experiments of PMSM fed by the fixed frequency PWM (FFPWM) and PCFM are implemented to analyze the CM conducted EMI. The CM EMI spectra of PMSM fed by the FFPWM and PCFM with different spreading frequency widths are compared to explore the influence of PCFM on the CM conducted EMI. The regular patterns on PCFM in reducing the CM conducted EMI of PMSM drive systems are revealed. [ABSTRACT FROM AUTHOR]

In this paper, a new cascaded multilevel inverter is proposed. For the proposed inverter, two different algorithms to determine the magnitude of the dc voltage sources are proposed. Then, in order to generate maximum numbers of output voltage levels by using a constant number of power switches and/or dc voltage sources, several optimum structures of the proposed inverter are obtained. In comparison with the conventional cascaded multilevel inverters, the proposed inverter is able to generate a high number of output voltage levels by using a lower number of power electronic devices such as power switches, driver circuits, power diodes, and dc voltage sources. In addition, the low amount of blocked voltage by switches is another advantage of the proposed inverter. The accuracy performance of the proposed inverter in generating the positive and negative voltage levels is verified through the experimental results on a 61-level inverter. [ABSTRACT FROM PUBLISHER]

Pulse width modulation schemes are aimed at adjusting the fundamental component while reducing the harmonic content of an inverter output voltage or current. This paper addresses the topic of optimal inverter operation in reference to a given objective function. The objective function could embody either a single performance criterion, such as voltage or current total harmonic distortion (THD), or a weighted sum of multiple criteria. The proposed method ensures primacy of the chosen solution while imposing no restriction over its modulation index. In particular, operating the inverter by the chosen solution would result in performances superior to any other modulation scheme commutating in an equal number of switching angles per fundamental cycle. The proposed method allows for the consideration of practical inverter constraints and prevents the possibility of impractical switching sequence. A detailed investigation of the method is given, accompanied by two practical cases minimizing, respectively, phase-voltage THD and line-current THD of a three-level inverter. Selected simulation and experimental results are presented to validate the theoretical part. [ABSTRACT FROM AUTHOR]

This paper is the continuation of Part I in which an online reference limitation strategy for shunt-connected converters is presented. This limitation strategy is successfully validated in this Part II of the paper by means of experimental results obtained in a laboratory setup. Two different experiment sets are carried out in order to check the two application scenarios described in Part I. On the one hand, the limitation strategy is implemented in the STATCOM application reducing the reactive power reference. On the other hand, the grid balancer functionality is implemented together with the new limitation strategy reducing the current references. In this last scenario, two different experiments are shown: 1) a switching-on of the converter; and 2) a voltage variation at the point of common coupling. In both functionalities, the corresponding reference limitations are activated due to overcurrent and overvoltage cases and the limitation due to the dc bus voltage oscillations is validated in the grid balancer functionality. [ABSTRACT FROM AUTHOR]

This paper introduces a new data-driven bottom-up monitoring approach for distribution systems. In this approach, local estimations of the subsections into which the system is split are performed independently, thus leading to a scalable architecture. The monitoring approach is focused only on the estimation of voltage magnitude rather than the complete state of the system. This reduces the measurement requirements significantly, thus addressing economical and technical concerns for existing systems, while staying open to accommodating further incremental improvements in the available data and data quality. The estimation of each section is realized via an artificial neural network (ANN), for which a set of parameterizations is available to cope with different operating conditions. The estimation convergence is achieved even with relatively few measurements, although accuracy varies depending on the available measurements. At the Medium Voltage (MV) level, where reconfiguration is common, a configuration identification unit chooses the right ANN, the one trained for the actual network configuration. The estimation process is computationally simple and can be executed on low-cost hardware, as demonstrated in this paper by the implementation on a BeagleBone Black board. To demonstrate the concept, a prototype and a laboratory setup have been developed. The experimental test results are presented both for an Low Voltage distribution system and an MV distribution system. [ABSTRACT FROM PUBLISHER]

Wide-bandgap semiconductors such as silicon carbide (SiC) and gallium nitride (GaN) are promising materials for next-generation power devices. We have fabricated a normally on GaN-based high-electron-mobility transistor (GaN HEMT) for power electronic converters. In this paper, the current collapse phenomena, which are distinctive characteristics of GaN devices, are evaluated in detail for several voltages with two switching frequencies. We also evaluate a gate drive circuit that we previously proposed for the normally on GaN HEMT with a single positive voltage source. We construct and test prototype circuits for a boost-type dc–dc converter and a single-phase full-bridge inverter with a gate drive circuit. The problems to be solved for the normally on GaN HEMT, which has a (static) voltage rating of over 600 V, are clarified on the basis of the experimental results. [ABSTRACT FROM AUTHOR]

This paper presents a capacitor voltage balancing control applicable to any multilevel dc–ac converter formed by a single set of series-connected capacitors implementing the dc link and semiconductor devices, such as the diode-clamped topology. The control is defined for any number of dc-link voltage levels and converter legs (for single-phase and multiphase systems), guaranteeing the capacitor voltage control for any modulation index value and load (from idle mode to full power). The associated control loop small-signal transfer function is presented, from which optimum compensator design guidelines are derived. The improvement in control performance is verified through simulation and experiments comparing with a previous balancing control strategy in a four-level three-phase dc–ac conversion system. The satisfactory control performance is also verified through simulation in a four-level five-phase dc–ac conversion system. [ABSTRACT FROM PUBLISHER]

The objective of this paper is to investigate the effect of a high-frequency high-voltage impulse conditioning technique on the inrush current interruption phenomena. In this paper, the inrush current interruption phenomena referred to the actual interruption and the currentless period following interruption. First, Six 7.2 kV vacuum interrupters (VIs) were conditioned by 400 batches of voltage impulses. The duration of each batch were set to 0.1 s. The peak value of each impulse could reach up to 100 kV. The repetition frequency of the impulse was set to 1000 Hz. The contact gap was 0.8 mm. The VIs were tested for the inrush current interruption performance with inrush current set to 2 kA and 5 kA, with a frequency of about 3800 Hz. The experimental results showed that there were two different types of inrush current interruption depending on high-frequency high-voltage impulse conditioning. The inrush current interruption type I referred to the inrush current interruption during the prestrike process before the contacts touched. This type inrush current interruption could be caused by the erosion of prestrike arc. Moreover, the high frequency voltage impulse conditioning influenced the occurrence frequency, the number of interruptions and the duration of the inrush current interruption type I. The inrush current interruption type II referred to the inrush current interruption during the contact bouncing process after the contacts touched. The inrush current interruption type II occurred only in the case of the VIs after conditioning. Furthermore, the occurrence frequency of the inrush current type II decreased with increasing inrush current. [ABSTRACT FROM AUTHOR]

This paper describes a high-speed protection circuit for insulated-gate bipolar transistors (IGBTs) subjected to hard-switching faults (HSFs). The reverse transfer capacitance depends on the collector–emitter voltage, and it produces a significant effect on the switching behavior not only under normal conditions but also under HSF conditions. A gate charge characteristic under HSF conditions differs from that under normal turn-on conditions. Hence, an HSF can be detected by monitoring both the gate–emitter voltage and the amount of gate charge during the turn-on transient period. IGBTs can be rapidly protected from destruction by using this method because a blanking time is unnecessary. Simulation and experiment verify the validity of the proposed high-speed protection circuit. [ABSTRACT FROM PUBLISHER]

This paper proposes a method to reduce the low-frequency neutral-point voltage oscillations. The neutral-point voltage oscillations are considerably reduced by adding a time offset to the three-phase turn-on times. The proper time offset is simply calculated considering the phase currents and dwell time of small- and medium-voltage vectors. However, if the power factor is lower, there is a limitation to eliminate neutral-point oscillations. In this case, the proposed method can be improved by changing the switching sequence properly. Additionally, a method for neutral-point voltage balancing is also proposed. The change in switching frequency by the proposed method and its effects on the outputs are negligible. Simulation and experimental results verify the validity and feasibility of the proposed strategy. [ABSTRACT FROM PUBLISHER]

This paper proposes a novel modulation technique and a new balancing control strategy for a single-phase five-level flying-capacitor (FC)-based active-neutral-point-clamped (ANPC) converter. The proposed modulator can control the FC voltage to follow the requested reference value and simultaneously generate the required ac output voltage regardless of the values of the dc capacitor voltages of the converter. By implementing this method, smaller values of the dc-link capacitor and FC can be used even in applications that could experience ripple or transient in the capacitor voltage. In a single-phase five-level ANPC converter applications, where the capacitors can experience pulsation power and dc-link balancing issues, such as grid-connected photovoltaic system, the selection of the reference voltage value for the FC can play an important role to balance the average values of the dc-link capacitor voltage. The proposed new control strategy uses a new reference voltage for the FC to be applied by the new modulator to have an average balanced dc-link voltages as well as an ac output voltage with good power quality. Simulation studies and experimental results demonstrate the effectiveness of the proposed modulation technique and control strategy even with relatively small dc capacitors to produce high-quality output voltage and current waveforms while maintaining an average balanced dc-link voltages. [ABSTRACT FROM PUBLISHER]

Various kinds of differential power processing converters and voltage equalizers have been proposed for series-connected photovoltaic (PV) modules to prevent negative influences of partial shading, such as significant reduction in power generation and the occurrence of multiple maximum power points (MPPs), including local and global MPPs, that hinders and confuses MPP tracking algorithms to operate properly. However, since conventional topologies are based on multiple individual dc–dc converters, the required switch count increases proportionally to the number of modules connected in series, increasing the complexity. A two-switch voltage equalizer using an LLC resonant inverter and voltage multiplier is proposed in this paper. The circuitry can be dramatically simplified compared with conventional topologies due to the two-switch configuration. Detailed operation analyses for the LLC resonant inverter and voltage multiplier are separately performed. Experimental equalization tests emulating partially shaded conditions were performed for four PV modules connected in series. With the proposed voltage equalizer, local MPPs successfully disappeared, and extractable maximum power increased compared with those without equalization, demonstrating the effectiveness and performance of the proposed voltage equalizer. [ABSTRACT FROM PUBLISHER]

In this paper, a new post-fault modulation strategy is proposed to operate the direct matrix converter as close as possible to its desired normal operation under an open-switch fault condition. The proposed strategy determines appropriate switching states associated with eight, out of the nine, remaining healthy switches of the converter, to synthesize the reference voltages. The corresponding duty cycles of the determined switching states are calculated by formulating a nonlinear optimization problem that aims at minimization of the error between the desired reference voltages and the voltages generated by the switching states. The solution to the nonlinear optimization problem is obtained based on the Karush–Kuhn–Tucker conditions. The performance of the proposed modulation strategy is evaluated based on time-domain simulation studies in the MATLAB/Simulink software environment and also experimentally verified. [ABSTRACT FROM PUBLISHER]

This paper presents a novel dc–dc converter configuration, which successfully integrates two technologies, including a switched capacitor and a switched coupled inductor, into one converter. By adopting a coupled inductor to charge a switched capacitor, the voltage gain can be effectively increased, and the turns ratio of the coupled inductor can be also reduced. Not only lower conduction losses but also higher power conversion efficiency is benefited from a lower part count and lower turns ratios. The proposed converter is simply composed of six components, which can be further derived to varied converters for different purposes, such as a bidirectional converter. The operating principle and steady-state analysis are discussed in this paper. A 250-W laboratory hardware prototype is completed and verified. The voltage gain is up to 11. The highest efficiency is 97.2%, and the full-load efficiency is kept at 93.6%. [ABSTRACT FROM AUTHOR]

This paper presents a new multilevel selective harmonic elimination pulse-width modulation (MSHE-PWM) technique for transformerless static synchronous compensator (STATCOM) system employing cascaded H-bridge inverter (CHI) configuration. The proposed MSHE-PWM method optimizes both the dc-voltage levels and the switching angles, enabling more harmonics to be eliminated without affecting the structure of the inverter circuit. The method provides constant switching angles and linear pattern of dc-voltage levels over the modulation index range. This in turns eliminates the tedious steps required for manipulating the offline calculated switching angles and therefore, easing the implementation of the MSHE-PWM for dynamic systems. Although the method relies on the availability of the variable dc-voltage levels which can be obtained by various topologies, however, the rapid growth and development in the field of power semiconductor devices led to produce high-efficiency dc-dc converters with a relatively high-voltage capacity and for simplicity, a buck dc-dc converter is considered in this paper. Current and voltage closed loop controllers are implemented for both the STATCOM and the buck converter to meet the reactive power demand at different loading conditions. The technique is further compared with an equivalent conventional carrier-based pulse-width modulation to illustrate its enhanced characteristics. The effectiveness and the theoretical analysis of the proposed approach are verified through both simulation and experimental studies. [ABSTRACT FROM AUTHOR]

In the applications for high-power dc/dc conversion, the power devices usually suffer high voltage and current stress in traditional single-phase dc/dc topologies such as forward, half-bridge, and full-bridge converters, which limits the power level of converter to reach higher. As a superior alternative solution, a three-phase three-level (TPTL) dc/dc converter was investigated in this paper, which has the advantages of lower voltage and current stress on switches, as well as fewer power devices. Adopting a symmetrical control strategy, the input current and output current frequency can be increased by a factor of six compared to the switching frequency, resulting in a reduced filter requirement. However, all the switches are hard-switching, leading to a considerable switching loss. In this paper, an asymmetrical duty cycle control strategy was proposed to the TPTL dc/dc converter. The modified converter remains all the advantages of original control strategy; meanwhile, soft-switching can be achieved using the energy stored in output filter inductance and leakage inductances of transformers (or resonant inductances). The theoretical analysis was presented in details, along with the characteristics and soft-switching condition of the converter. Experimental results from 540 to 600 V input and 48 V/20 A output were presented to verify the theoretical analysis and the performance of the modified converter. [ABSTRACT FROM AUTHOR]

In this paper, a dynamic stack-controlled CMOS FET RF power amplifier (PA) is developed to enhance the efficiency of the envelope tracking power amplifier (ET PA) system for low-voltage operation. The power cell used in the two-stage PA is a quadruple-stacked FET structure with dynamic stacking controller to reconfigure the power cell into the quasi-triple or quasi-double stacks according to the magnitude of the input envelope signal. The proposed power cell boosts the peak efficiency in the low VDD region by bypassing the stack entering the triode region and reoptimizing the load impedance so that all the FETs operate under the saturation and the optimum load conditions. A detailed analysis is presented to understand the gain and phase step discontinuities at the stack switching points, and the circuit techniques to equalize the gain and phase between the adjacent stack configurations are developed. The proposed two-stage stack-controlled PA is fabricated with a 0.32-\mu\ m silicon-on-insulator (SOI) CMOS process together with the envelope amplifier (EA). Full long-term evolution (LTE) characterization is performed using LTE signals with a peak-to-average power ratio (PAPR) of 6.7 dB and signal bandwidths (BW) of 10 and 20 MHz. With 10-MHz signals, dynamic stacking provides 3.5% power added efficiency (PAE) improvement over the static stack at 25.7 dBm, resulting in 47.5% PAE with 26.6-dB gain. A 20-MHz LTE test shows an overall PAE of 45.9% with an evolved universal terrestrial radio access (E-UTRA) adjacent channel leakage ratio (ACLR) of -33 dBc with memoryless digital predistortion. Even with the lower efficiency of the EA compared with the state-of-the-art results, the measured overall system efficiency with 3.4 V maximum voltage is comparable with those reported using GaAs HBT's with 5 V supplies, which clearly demonstrates the advantages of the proposed dynamic stack control. [ABSTRACT FROM AUTHOR]

Filters for switching ripple attenuation are essential at the input, and sometimes at the output for certain applications, for the deployment of matrix converters (MCs). Due to the absence of inertial elements in the MC structure and the consequent tight input–output coupling, the filter parameters significantly affect its dynamic behavior. This paper presents an exhaustive filter design method for synchronous applications of the MC in power systems. Apart from the usual considerations of ripple attenuation, voltage regulation, reactive current loading, and internal losses, this paper also addresses additional constraints which may be imposed by requirements of dynamic performance and reliable commutation. Rigorous analytical justification of each design step is provided and the sequential design process is summarized. Relevant experimental results are presented to validate the proposed design tool. [ABSTRACT FROM PUBLISHER]

Leakage current minimization is one of the most important considerations in transformerless photovoltaic (PV) inverters. In the past, various transformerless PV inverter topologies have been introduced, with leakage current minimized by the means of galvanic isolation and common-mode voltage (CMV) clamping. The galvanic isolation can be achieved via dc-decoupling or ac-decoupling, for isolation on the dc- or ac-side of the inverter, respectively. It has been shown that the latter provides lower losses due to the reduced switch count in conduction path. Nevertheless, leakage current cannot be simply eliminated by galvanic isolation and modulation techniques, due to the presence of switches' junction capacitances and resonant circuit effects. Hence, CMV clamping is used in some topologies to completely eliminate the leakage current. In this paper, several recently proposed transformerless PV inverters with different galvanic isolation methods and CMV clamping technique are analyzed and compared. A simple modified H-bridge zero-voltage state rectifier is also proposed, to combine the benefits of the low-loss ac-decoupling method and the complete leakage current elimination of the CMV clamping method. The performances of different topologies, in terms of CMV, leakage current, total harmonic distortion, losses and efficiencies are compared. The analyses are done theoretically and via simulation studies, and further validated with experimental results. This paper is helpful for the researchers to choose the appropriate topology for transformerless PV applications and to provide the design principles in terms of common-mode behavior and efficiency. [ABSTRACT FROM AUTHOR]

This paper presents a generalized multilevel direct power control (ML-DPC) scheme for grid-connected multilevel power converters. The proposed method extends the original DPC operating principle by considering only the closest subset of two-level voltage vectors to the present switching state. The implementation of this principle requires the power derivatives for feedback, which can present numerical problems when applied experimentally, mainly due to high measurement noise sensitivity. Therefore, a derivative estimator is proposed based on the converter-grid model in the synchronous reference frame. In addition, a virtual flux observer is developed to achieve synchronization and improve robustness in the presence of grid voltage harmonics. The proposed method is applicable to any multilevel converter topology of any number of levels. In this paper, simulations and experimental results are presented for a seven-level cascaded H-bridge converter. [ABSTRACT FROM AUTHOR]

This paper presents an analysis of the Class-E ZVS rectifier using a common-grounded multistep controlled Shunt Capacitor (CSC). The Class-E ZVS rectifier using a common-grounded multistep CSC can regulate the output voltage by changing the shunt capacitance. The voltage over the diode and shunt capacitor in the conventional Class-E ZVS rectifier is shared by the series connected capacitors. In this paper, the Class-E ZVS rectifier using a common-grounded multistep CSC is analyzed, simulated, and experimented. Especially, the power conversion efficiency is discussed in detail. [ABSTRACT FROM AUTHOR]

In this paper, analytical expressions for waveforms and design relationships are derived for the class-E power amplifier with the MOSFET nonlinear drain-to-source parasitic capacitance under the subnominal operation, i.e., only zero-voltage switching (ZVS) condition, for any grading coefficient m of the MOSFET body junction diode and 50% duty ratio. Only the MOSFET nonlinear drain-to-source parasitic capacitance is used for the analysis of the class-E ZVS power amplifier, and its nonlinearity is determined by the grading coefficient m. The switch voltage waveform does not satisfy the class-E ZVS switching condition when only the linear shunt capacitance is considered. The grading coefficient m is used as an adjustment parameter that provides accurate design to satisfy the given output power and peak switch voltage simultaneously. Therefore, the grading coefficient m is the important parameter to satisfy the class-E ZVS condition and given design specifications, which is the most important result in this paper. Additionally, the output power capability and maximum operating frequency are affected by the grading coefficient m. The analytical expressions are obtained by considering the grading coefficient m as an adjustment parameter, which is validated by PSpice simulations and laboratory experiments. The measurement and PSpice simulation results agreed with the analytical expressions quantitatively, which denotes the usefulness and effectiveness of our obtained analytical expressions. [ABSTRACT FROM AUTHOR]

Insertion of dead time, transfer links between micro control unit (MCU) and voltage source inverter (VSI), VSI's nonideal characteristics all lead to deviation that cannot be ignored between the actual output voltage and the command voltage, which seriously affects the performance of the ac induction motor (ACIM) control system. Among many dead-time effect compensation methods, VSI usually operates under an open-loop condition, thus making complete compensation hard to achieve. This paper studies methods to obtain the two key elements of compensation voltage amplitude and current polarity and a novel phase voltage compensation method is proposed. In this method, a simple hardware circuit is applied to obtain the actual output of the VSI as feedback with which precise compensation amplitude can be calculated. And judgment of current polarity is accurately realized by reconstructing phase current from filtered current components under M-T coordinate with a Kalman filter. The compensation in a zero-crossing region is also closely discussed in this paper. To verify the validity of the method, simulations and experiments are carried out. The experiments emphasize on the efficacy of feedback, steady-state, and transient performance of current reconstruction; and the performance of a conventional method to that of the proposed method are also compared. Results show that the proposed method proves to be effective. [ABSTRACT FROM AUTHOR]

Switch fault diagnosis is an important design aspect for pulse width modulation (PWM) dc-dc power converters. It can prevent power converters from further damage, and also make preparations for remedial actions. In this paper, a fast switch fault diagnostic method is proposed for PWM dc-dc converters operating in continuous conduction mode. The proposed method utilizes the magnetic component (inductor or transformer) voltage for fault diagnosis. Based on the real-time voltage measurement and switch gate-driver signals, characteristics of switch open-circuit faults and short-circuit faults are rapidly extracted, and thus, switch faults can be quickly detected. The magnetic component voltage can be measured by an auxiliary winding in the magnetic core, and gate-driver signals can be easily got from the control circuit. Moreover, the fault detection can be implemented by a low-cost logical hardware circuit, and this circuit can be integrated into the control circuit. The fault diagnosis principle, design considerations, and implementation are discussed in this paper. Experiments are conducted to verify the theoretical analysis. [ABSTRACT FROM AUTHOR]

In this paper, a new structure of nonisolated boost dc–dc converters based on voltage-lift technique is proposed. In comparison with conventional nonisolated boost dc–dc converters, the proposed converter generates higher voltage gain. In this paper, the relations between voltage and current of all elements in continuous conduction mode and discontinuous conduction mode are calculated as well as voltage gain in each mode. Then, the critical inductance and stress of switch current are extracted. Finally, the validity of given theories is examined by using the experimental results. [ABSTRACT FROM PUBLISHER]