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In this work, a high performance GaN-on-Si quasi vertical PiN diode was demonstrated by the combination of a beveled sidewall and self-aligned fluorine plasma treatment. The didoes achieved a remarkable breakdown voltage ($\text{V}_{\text {BR}}{)}$ of 930 V and an ultra-low reverse leakage current. Meanwhile the didoes showed a low specific on-resistance ($\text{R}_{ \mathrm{\scriptscriptstyle ON},\textit {sp}}$) of 0.43 $\text{m}\Omega \cdot $ cm2, a high on/off current ratio ($\text{I}_{ \mathrm{\scriptscriptstyle ON}}/\text{I}_{ \mathrm{\scriptscriptstyle OFF}}$) of $10^{{11}}$ , and an excellent Baliga’s figure of merit (BFOM) of 2.01 GW/cm2. The measurement results of X-ray spectroscopy (XPS) and Kelvin Probe Force Microscopy (KPFM) proved the presence of F ions and the decrease of surface potential, which reduced the electric field peak and suppressed the leakage current. These results show a great potential of GaN on Si PiN diode for power applications. [ABSTRACT FROM AUTHOR]

A hybrid Schottky–ohmic drain technology for millimeter-wave (mmW) AlGaN/GaN high-electron-mobility transistors (HEMTs) is proposed. The Schottky metal extension in the ohmic region of drain reduces the actual source–drain spacing, resulting in a smaller ON-resistance and a higher maximum current. Extended Schottky metal in the drain region modulates the electric-field distribution, thereby leading to an improved breakdown voltage, suppressed current collapse, and high reliability. Compared with the ohmic drain, the current gain cutoff frequency (${f}_{T}$) was improved from 64 to 76 GHz, and the maximum oscillation frequency (${f}_{\text {max}}$) was improved from 125 to 157 GHz, resulting from the decreased parasitic drain resistance (${R}_{d}$). Moreover, large-signal measurements in continuous wave (CW) at 30 GHz demonstrated a peak power-added efficiency (PAE) of 45.5% and a saturated output power density (${P}_{\text {sat}}$) of 8.5 W/mm at ${V}_{\text {ds}}= {30}$ V. In addition, the direct current (DC) and radio frequency (RF) characteristics showed a negligible degradation after large-signal measurements at 30 GHz. [ABSTRACT FROM AUTHOR]

AlGaN/GaN high-electron-mobility transistors (HEMTs) with Si-rich SiN/Si3N4 bilayer passivation were studied in this article. The use of a Si-rich SiN interlayer leads to improved channel transport property, current collapse, power performance, and temperature-dependent stability. Devices without Si-rich SiN interlayer passivation exhibit an increase in the gate leakage current by over three orders of magnitudes with temperature increasing from 300 to 420 K, leading to an increase in a current collapse from 9.7% to 24.7%, while the devices with Si-rich SiN passivation exhibit a weak temperature dependence of leakage current and a constant current collapse about 5%. Small signal characterization shows that Si-rich SiN passivation results in a remarkable decrease in the effective gate length by ~15% with temperature up to 420 K. At 17 GHz, devices with Si-rich SiN interlayer passivation exhibit an output power density of 7 W/mm and a peak power-added efficiency (PAE) of 56%. The improved power performance of devices using Si-rich SiN interlayer passivation is attributed to the suppressed current collapse and superior device stability under high channel temperature. [ABSTRACT FROM AUTHOR]

To realize the complementary circuit on the GaN-on-Si platform, an investigation of p-channel heterostructure field-effect transistors (p-HFETs) is necessary. In this study, an analytical model for the estimation of the threshold voltage (${V}_{\text {TH}}$) for GaN-based p-HFETs was developed. In this model, the impact of polarization charges at different interfaces, the influence of interface charges at oxide/GaN interface, as well as the out-diffusion effect of Mg dopant in the p-GaN layer were all taken into consideration for systematic exploration. Herein, GaN-based p-HFETs were fabricated to verify the relationship between the ${V}_{\text {TH}}$ and the thickness of the GaN channel layer by using the proposed model. The ${V}_{\text {TH}}$ model was further confirmed through TCAD simulations. The influences of the thickness of oxide layer, Mg doping concentration in p-GaN layer, and the Al mole fraction of AlxGa $_{{1}-{x}}\text{N}$ layer on ${V}_{\text {TH}}$ were also discussed in detail. The model serves as more accurate guidance for the optimization of such p-HFETs design and complementary circuits. [ABSTRACT FROM AUTHOR]

In this work, the performance of AlGaN/ gallium nitride (GaN) high-electron mobility transistors (HEMTs) with different Fe doping tails was systematically investigated and compared. It is illustrated that the combination of the unintentionally doped (UID) GaN layer and a thinner Fe doping buffer layer would result in a faster slope rate of Fe concentration in the UID GaN layer. The devices with the fastest slope rate of Fe concentration in the UID GaN layer exhibited excellent large signal performance, including the saturated power density (${P}_{sat}$) of 9 W/mm and the power-added efficiency (PAE) of 65.6%. In addition, the ${P}_{sat}$ and the PAE of the device with the fastest slope rate of Fe concentration in UID GaN layer are 27.7% and 14.7%, which are higher than that of the device with the slowest slope rate of Fe concentration under the class AB operation conditions. Pulse ${I}$ ,– ${V}$ measurement results demonstrated that the buffer-related current collapse was more effectively suppressed in the 0.5- $\mu \text{m}$ Fe doping buffer layer because of faster slope rate of Fe concentration in UID GaN layer. Moreover, the frequency-dependent capacitance and conductance measurement results indicated that the current collapse was relevant to deep traps in the UID GaN layer introduced by Fe doping. By reducing the concentration of the deep traps caused by Fe doping, the device showed excellent characteristics of dc and RF. Furthermore, controlling the Fe doping tail was important for designing the GaN-based power amplifier with high ${P}_{sat}$ and PAE. [ABSTRACT FROM AUTHOR]

The submicrometer gate HEMT is fabricated with an ultrathin-barrier (UTB) AlGaN/gallium nitride (GaN) combined with in situ SiN passivation. The sheet resistance of the UTB Al0.2Ga0.8N (4 nm)/GaN heterostructure is effectively reduced by the SiNx passivation layer grown by metal organic chemical vapor deposition (MOCVD), from 6500 to $312~ \Omega $ /⬜. With the 20-nm stress-engineered in situ SiN, the device not only provides a large output current of 1.05 A/mm but also demonstrates promising potential on the RF applications, which gives AlGaN material two records high cutoff frequency ${f} _{\text {T}}/{f} _{\text {max}}$ of 157 GHz/334 GHz for 100-nm gated device and 211 GHz/379 GHz for 70-nm gated device. During the continuous wave (CW) power measurement at 30 GHz, the 70-nm devices exhibit a large output power of 4.6 W/mm associated with a peak power-added efficiency (PAE) of 48.1% and a gain of 11.6 dB (${V} _{\text {ds}} =20$ V), and a high PAE of 53.8% with an output power density of 1.9 W/mm and a gain of 10.8 dB (${V} _{\text {ds}} =10$ V), respectively. The huge potential of the UTB-AlGaN/GaN is demonstrated for high-frequency and large-output power applications when it is combined with the in situ SiN, which is necessary for future communication systems. [ABSTRACT FROM AUTHOR]

In this article, we report on the high dc and RF performance of AlGaN/GaN high electron mobility transistors that employ Ti/Au/Al/Ni/Au metallization stack with shallow trench etching ohmic contact (STEOC). An excellent ohmic contact performance including low contact resistance (${R}_{C}$) of $0.28~\Omega \cdot $ mm and smooth surface morphology have been achieved simultaneously. Atomic force microscope (AFM) reveals a highly smooth surface morphology with a root mean square (rms) roughness of 6.3 nm even after 810 °C high-temperature annealing (HTA), achieving an improvement of 79% as compared to the conventional Ti/Al/Ni/Au ohmic contact (COC). A high-resolution transmission electron microscope (HRTEM) showed a glossy morphology with a continuous and uniform TiN layer formed in the interface for the STEOC sample, while a bumpy morphology caused from the Ni-Al complexes balling up and TiN island penetrating into the AlGaN/GaN heterostructure were observed for the conventional sample. Consequently, the fabricated transistors with the STEOC process show a high output current of 1.52 A/mm and low ON-resistance (${R}_{ \mathrm{ ON}}$) of $2.09~\Omega $ mm. In addition, a high current cutoff frequency (${f}_{T}$) of 60 GHz and maximum oscillation frequency (${f}_{\text {max}}$) of 150 GHz were obtained for the STEOC HEMT with a gate length (${L}_{\text {g}}$) of 150 nm. Sub-6 GHz continuous-wave mode power sweep measurements deliver a high power-added-efficiency (PAE) of 67%. These results show the significant potential of the STEOC process to facilitate the development of GaN-based power amplifier (PA) applied for 5G. [ABSTRACT FROM AUTHOR]