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Light-emitting diodes (LEDs) are widely used in street lighting, landscape lighting, liquid crystal display (LCD) backlighting, healthcare, etc. As an important part of LED lighting products, LED driver plays a vital role in maintenance costs reduction, energy saving and lifetime prolongation. In this paper, a single-stage LED driver is proposed, which is integrated by a totem-pole bridgeless power factor correction (PFC) unit and several modular LCL-T resonant rectifiers. The totem-pole bridgeless PFC unit and the LCL-T resonant rectifiers are integrated by sharing switches, which can simplify the circuit and reduce the system cost. The output current can be regulated by applying the variable inductor control. Constant duty cycle and fixed switching frequency operation can be achieved as well. The operating principle and the performance of the proposed converter are analyzed in this paper. In addition, a precise parameter design method is proposed by considering the high-order harmonics. At last, an experimental prototype is established to validate the proposed parameter design and variable inductor control method. [ABSTRACT FROM AUTHOR]

This paper investigates the Multilevel Current Source Converter (MCSC) STATCOM. It proposes a new method of modulation. The new modulation method produces less THD and di/dt at the terminals of the MCSC STATCOM when compared to the widely used Phase-Shifted Carrier SPWM (PSC-SPWM). To ensure the inductors' currents remain balanced, a Current Balancing Algorithm (CBA) is presented. The CBA does not require any controls. It relies on assigning optimum switching states to each CSC module in real-time. In addition, two control strategies are presented in this paper. The first one assumes the STATCOM to be a SISO. Therefore, it only requires one PI controller. However, the gains for the controller must be changed if the STATCOM was to transition from capacitive mode to inductive mode, or vice versa. The second control strategy overcomes this problem by implementing a TITO integral state feedback controller. The contributions of this paper are validated via simulation and experimental results. [ABSTRACT FROM AUTHOR]

Unipolar-pulsewidth modulation (UP-PWM) inverter takes advantages of high power efficiency and small output chokes which is widely used in the industry. However, UP-PWM inverters cannot be used in parallel operation due to a current unbalance problem. This paper studies the current unbalance problem of paralleled UP-PWM inverters with common dc bus and ac bus. First, the problem of unbalanced inductor current is defined and analyzed. Second, a technique to eliminate unbalanced currents is proposed. The proposed current balancing technique only requires one more current sensor in an inverter module rather than changing converter topology or modulation method, which makes it possible to apply UP-PWM inverters in parallel-operation while keeping the advantages of unipolar switching. The proposed current balancing method is verified by both simulation and hardware experiment. Experimental verification is performed on two 1 kW, 400 V input, and 120 V/60 Hz output prototypes, which shows a good agreement to the analytical study. [ABSTRACT FROM AUTHOR]

A hybrid switched-capacitor/interleaved boost converter able to provide a high voltage gain and to cancel the input current ripple at a preselected duty cycle was recently presented in the literature. This paper extends that work by proposing an optimized switching strategy for operating conditions at other values of duty cycle. The switching strategy effect on the converter's voltage gain and input current ripple is quantified and compared against the performance under the conventional switching strategy. The approach is validated in the laboratory through hardware prototyping. [ABSTRACT FROM PUBLISHER]

This paper introduces a three-phase grid-connected inverter for commercial-scale photovoltaic systems. The circuit topology combines an ac-inductor-less active bridge with a parallel-connected pulsewidth modulation inverter acting as an instantaneous reactive power compensator. The active bridge, called a 120° conduction inverter, operates at a switching frequency equal to the grid frequency and outputs a 120° rectangular current, while the compensator eliminates the harmonic currents included in the rectangular current. The main advantage of this strategy is the reduction in size of the required ac inductor by a factor of 4, as well as the reduction of power losses in the switching devices. The theoretical analysis clearly shows that the compensator can synthesize a sinusoidal output current by controlling only instantaneous reactive power, thus eliminating the need for electrolytic capacitors. A 5-kW experimental setup validates the operating principle and the control method of the proposed inverter and exhibits an inverter efficiency as high as 99.2% with Si superjunction mosfets. [ABSTRACT FROM AUTHOR]

Single-stage power-factor-corrected (S2PFC) power supplies usually suffer from high voltage stress, due to lack of control on the intermediate bus capacitor voltage. In the past, analysis of such voltage stress was mostly based on steady-state condition without providing sufficient explanation during the transient circuit operation. This paper revisits the problem at circuit level and reports that the root cause is due to the inherent negative current feedback property of the output inductor or the transformer operating in continuous conduction mode (CCM). Based on the finding, this paper further proposes a new approach to reducing the voltage stress by adding an auxiliary circuit branch to existing S2PFC converters. The additional circuit branch limits the effect of negative current feedback by suppressing the change of output current slope due to change of load. This assists the pulsewidth modulation controller to track the change of load better such that the bus capacitor voltage range is reduced through duty cycle control. The auxiliary circuit branch also reduces reverse-recovery-related losses of the converter under CCM operation. A laboratory prototype using the popular boost PFC converter combined flyback dc/dc converter was built and tested to confirm the analysis and effectiveness of the approach. [ABSTRACT FROM AUTHOR]

Paralleled inverters are not only a suitable approach to increase the power capacity, but also have the capability of common mode voltage (CMV) reduction, or even elimination. The original zero CMV modulation scheme for paralleled inverters suffers from the current jump problem in phase-leg currents. This current jump phenomenon amplifies the peak values of differential-mode circulating current (DMCC) and zero-sequence circulating current (ZSCC), which is adverse for the design of coupled inductor and common-mode inductor. This paper introduces the modified modulation scheme, which can keep volt-seconds balance in whole fundamental period and mitigate the current jump in phase-leg currents. In addition, the reduction effect of the DMCC and ZSCC can be achieved. To verify the analysis, both the simulation and experimental results are presented, which validates the proposed methods and show that they are beneficial for DMCC and ZSCC reduction. [ABSTRACT FROM AUTHOR]

In this paper, two structures are proposed for the switched-inductor quasi-Z-source inverter. In the proposed structures to extend the voltage gain of inverter, two new switched-inductor structures are used. In the proposed structures, voltage across the capacitors in the Z-source network and in the switched-inductor is symmetric and small. The other advantage of proposed inverters is known as achieving higher voltage gain per smaller duty cycle ratio (of shoot-through). Compared with a conventional continuous input current switched-inductor quasi-Z-source inverter at the same gain voltage, there is less of a ripple of input current in the proposed inverters. In this paper, at first the both the conventional and the proposed switched-inductor Z-source inventers are thoroughly investigated to find out their governing relations. Then, the proposed Z-source inverters are compared with the conventional ones by simulating them to assess their performance efficiency. Next, applying the simple boost pulse width modulation the simulation is carried out with PSCAD/EMTDC software. After that, to evaluate the obtained results, the prototypes of the proposed inverters with 48 Vdc input voltage are used. [ABSTRACT FROM PUBLISHER]

A novel hybrid pulse width modulation (PWM) technique is proposed in this paper for two parallel interleaved, two-level, three-phase voltage source inverters (VSIs). The two parallel interleaved VSIs are analyzed as a three-level (3L) inverter. A 3L inverter provides minimum line current ripple when nearest three voltage vectors are applied. In this paper, a novel carrier-based PWM technique is developed that ensures the application of nearest voltage vectors, keeping average circulating current to zero over a switching period. For carrier-based implementation of the proposed PWM, generalized common-mode (CM) offsets are derived in terms of maximum and minimum values of reference signals. Each 3L space-vector sector is divided into seven subsectors. For each subsector, a CM offset is calculated, addition of which to reference signals ensures the minimum line current ripple and zero average circulating current. Simulation and experimental results are provided to validate the proposed technique. [ABSTRACT FROM PUBLISHER]

This paper presents a new single-phase ac–dc–ac three-level three-leg converter composed of three coupled-inductors and six active switches. The system model, operation principles, and a control strategy are presented and discussed. Additionally, a space-vector pulsewidth modulation technique is developed to double the effective frequency of the grid and load voltages and to reduce the switching losses. The proposed converter is compared to other similar converters in terms of switch count, harmonic distortion, and power losses. The results show that the proposed topology has improved power quality and uses fewer switches and gate drive circuits. These characteristics can potentially reduce the costs and the complexity of the system. In addition, the proposed converter eliminates the requirement for dead time to prevent short circuit of the dc-link. In order to validate the theoretical analysis, simulated and experimental results are presented and discussed. [ABSTRACT FROM AUTHOR]

The inductance is an important parameter impacting current ripple calculation, usually with the assumption that the designed inductance performs ideally in most of voltage source inverters (VSIs) applications. However, the initial permeability of magnetic material usually descends when the winding current reaches or goes beyond the saturation limit. In such region of saturation, the implemented inductor does not perform as expected in design stages and its value varies with the bias current. In this paper, analysis and calculation of the current ripple are presented for a three-phase VSI with powder cores-based inductors, which reveals the calculation error of current ripple caused by the soft saturation nature of powder cores. Based on the equivalent single-phase model, the influence of inductance saturation on current ripple can be quantitatively evaluated. Then, a comparison of the current ripple calculation between considering and ignoring inductance saturation of implemented inductors is drawn in detail. Furthermore, under the condition of inductance saturation, the output current ripple peak-to-peak value of three phases is used as the constraint for variable switching frequency pulsewidth modulation (VSFPWM) design. A comprehensive method is developed to compensate the effect of inductance saturation in VSFPWM. At last, the effectiveness of the proposed strategy is verified by the detailed simulation and experiment. [ABSTRACT FROM AUTHOR]

Parallel interleaved two-level (2L) three-phase voltage source inverters (VSIs) are widely used due to their distinct advantages of high power delivery, modularity, low current rating devices, etc. Along with these advantages, the parallel interleaved 2L VSIs could also be analyzed as a single three-level (3L) VSI. Conventionally parallel interleaved 2L VSIs are modulated using the 2L pulsewidth modulation (PWM) techniques. However, implementation of parallel interleaved 2L VSIs using the 2L PWM techniques may generate a higher ac side current ripple as compared to implementing the parallel interleaved 2L VSIs using 3L PWM techniques. This paper proposes a carrier-based method for implementing different 3L discontinuous PWM (DPWM) techniques for parallel interleaved 2L three-phase VSIs. Comparison of different 2L switching sequences for implementing a 3L DPWM switching sequence based on circulating current, line current ripple, and switching loss is also carried out. Simulation and experimental results are also displayed to validate the proposal. [ABSTRACT FROM AUTHOR]

The pulse-width modulated (PWM) switching rectification that can achieve a high power factor (PF) for increasing the energy transfer efficiency between an LC resonator and a rectifier and voltage step-up and -down conversion is proposed for a wireless power transfer (WPT) receiver. The proposed method can emulate the switching rectifier as a resistive load by using an inductor and integrated phase synchronizers. Additionally, similar to a switched-inductor converter that controls the duty cycle ratio (D), the proposed PWM rectifier can control the output voltage VOUT when the input is a rectified, wirelessly coupled voltage instead of a constant voltage. Thus, unlike a conventional PWM switching rectifier for ac mains, an additional voltage conditioning circuit would not be needed after the proposed rectifier for WPT. The proposed PWM switching rectification is implemented in the AMS 0.18 μm 1.8 V/5 V CMOS process. PF = 1 is measured, indicating the most efficient energy transfer, compared to only 0.55–0.65 in a peak detection rectifier. Additionally, 88.2% of peak power conversion efficiency of the switching rectifier is achieved, and the maximum output power is 80.3 mW at 500 kHz of the WPT frequency. Moreover, the measured voltage conversion ratios ranging between 0.73× and 2× are demonstrated in this paper. [ABSTRACT FROM AUTHOR]

The Z-source inverter (ZSI) employs an LC impedance network between the main inverter bridge and the power source. The unique feature of the ZSI is that it can operate either in buck or boost mode with a wide range of obtainable output voltages from a given input voltage. This topology also exhibits better electromagnetic-interference noise immunity when compared to a traditional voltage-source inverter (VSI). However, the LC impedance network of ZSI significantly increases the size and cost of the power converter and can make it unsuitable for low-power applications. This paper proposes a novel topology called switched boost inverter (SBI) which exhibits similar advantages of ZSI with lower number of passive components and more active components compared to ZSI. The steady-state and small-signal analyses of SBI, along with its pulsewidth modulation (PWM) control strategies, have been discussed in this paper. This paper also presents a comparison of SBI and ZSI with the same input and output parameters. The theoretical analysis given in this paper has been validated using a laboratory prototype of SBI, and the experimental results are presented for verification. The experimental harmonic spectrum of the inverter's output voltage with the proposed PWM technique is also plotted and compared with that of a traditional VSI. All the experimental results show good correlation between theory and experiments. [ABSTRACT FROM PUBLISHER]

This paper proposed a new half-bridge (HB) LLC resonant converter family with pulse-width modulated (PWM) auxiliary switch (sLLC converter) for hold-up mode operation. The proposed sLLC converters could operate with synchronous rectifier, which is suitable for low-output voltage applications. In the proposed converters, an auxiliary switch is added at the primary side to provide charging path for the series resonant inductor. For nominal 400-V input, sLLC achieves same performance as conventional LLC converter, and all the good features such as soft switching are naturally retained. For slight input voltage fluctuation, frequency modulation is used to regulate the output voltage. When the input voltage reduces further, HB switches will operate at constant minimum frequency, and the auxiliary switch will operate in the PWM mode to energize the resonant inductor with the bus voltage directly during hold-up period. Thus, the converter achieves higher voltage gain, and the output voltage can be maintained at desired level. To verify the effectiveness of the proposed sLLC converter, operational principle and equivalent circuits will be carefully explained and analyzed in this paper. A 300-W prototype is built for 250–400-V input 12-V output application. [ABSTRACT FROM AUTHOR]

In this paper, a new soft switching flyback dc–dc converter with a simple zero-voltage and zero-current switching (ZVZCS) cell is proposed. The auxiliary resonant cell consists of one switch, one diode, one inductor, and two capacitors. It provides ZVZCS not only for the main switch but also for the auxiliary switch at both turn-on and turn-off times. In addition, all the auxiliary diodes and body diodes of the switches operate under full ZVZCS except the output diode which turns off only with zero current switching. This soft switching technique makes the proposed converter have less switching losses which leads the converter to operate in higher frequencies and efficiency. Another outstanding feature of the proposed converter is using the auxiliary resonant cell out of the main power path to have lower voltage stress on the switches. In this paper, pulse width modulation (PWM) is employed to control the main switch. A detailed mode analysis of the proposed converter operation is presented along with design procedure. Finally, the accuracy performance of the converter is verified through a 60 W experimental prototype results. [ABSTRACT FROM AUTHOR]

In several electrical dc–ac power conversions, the ac output voltage is higher than the input voltage. If a voltage-source inverter (VSI) is used, then an additional dc–dc boosting stage is required to overcome the step-down VSI limitations. Recently, several impedance source converters are gaining higher attentions [1], [2], as they are able to provide buck-boost capability in a single conversion stage. This paper proposes the merging of the boost stage and the VSI stage in a single stage dc–ac power conversion, denoted as split-source inverter (SSI). The proposed topology requires the same number of active switches of the VSI, three additional diodes, and the same eight states of a conventional space-vector modulation. It also shows some merits compared to Z-source inverters, especially in terms of reduced switch voltage stress for voltage gains higher than 1.15. This paper presents the analysis of the SSI and compares different modulation schemes. Moreover, it presents a modified modulation scheme to eliminate the low frequency ripple in the input current and the voltage across the inverter bridge. The proposed analysis has been verified by simulation and experimental results on a 2.0-kW prototype. [ABSTRACT FROM PUBLISHER]

This paper proposes a new class of topologies of single-stage high-frequency ac-link power converters, which is capable of providing both voltage step up/down within a wide frequency and voltage ranges. The proposed family, which supports bidirectional power flow, can interface various single/multi-port dc and/or single/multi-phase ac systems to provide dc–dc, dc–ac, ac–dc, or ac–ac power conversion. In this family of converter, which offers a very modular structure, a small inductor that forms the link exchanges power entirely or partially between the source and load. The proposed family can function in buck, boost, and/or buck–boost modes of operation, and a combination of these modes of operation is also feasible. In comparison to the parallel inductive four-quadrant link converters, the proposed family features a significantly reduced link peak current, reduced switch ratings, and reduced total number of power switches. These features enhance the efficiency, reduce the total cost, and increase the power density of the system. In order to further improve the overall efficiency of the system, minimize the current/voltage stress over all utilized semiconductor devices, and lower electromagnetic interference (EMI), a small capacitor is placed in parallel with the link inductor to realize soft-switching operation for the proposed configurations. Moreover, the proposed converters have the potential to incorporate a lightweight single-phase high-frequency transformer for electrical isolation. The proposed circuit topologies prevent reverse recovery issues and eliminate losses corresponding to body diodes of power switching devices via utilizing power switches in conjunction with external fast recovery diodes. The proposed family offers a very high level of reliability owing to its immunity from short circuit of input and output terminals and open circuit of the link inductor, which may occur in other power converters due to commutation problem resulting from a short deadtime or an overlap time between switches, unwanted control command, delay in electronic circuits, or EMI noise's misgating on or off, in addition to the absence of electrolytic capacitors in the power circuit. A control approach is also developed to regulate input and output currents in one stage of power conversion. A detailed theoretical analysis, operation, design methodology, and control strategy of the proposed family are provided in this paper, and the effectiveness and performance of the proposed converter family are verified via simulation results and experimentally. [ABSTRACT FROM AUTHOR]

In this paper, a new class of bidirectional partial-resonance power converters is presented. The proposed family can be configured to interface single- or multi-port dc, single- or multi-phase ac systems at input-side and/or output-side. The proposed family offers a very modular structure, which can lead to cost reduction from a common designed module. In this converter, which accomplishes power conversion in a single stage, a small inductor placed in series with the input and output switch-bridges forms the link. This small link inductor is responsible for transferring power between different ports of the system. The proposed topologies can operate in buck, boost, and buck–boost modes of operation to step up and/or step down the voltage. In buck–boost mode of operation, the converter is controlled such that the power is entirely transferred through the link inductor; whereas, in buck or boost modes of operation only a fraction of the power is transferred through the link inductor, and the remaining power is directly transferred from input phases to the output phases. Galvanic isolation, which is typically a prominent factor contributing to power density of a converter, can be provided by means of a compact and lightweight single-phase high-frequency transformer added to the link. In comparison with earlier generations of partial-resonance inductive-link power converters, in the proposed converter, the level of link peak current and consequently power-loss, as well as voltage and current stress of switches are dramatically decreased. A very small film capacitor can be placed in parallel with the link inductor to facilitate zero-voltage-switching (ZVS) operation for all the switches/diodes. Apart from increasing the overall efficiency, minimized dv/dt stress and improvement in power density are achieved by adding the link capacitor. The proposed converter employs four-quadrant switches, i.e., bidirectional-conducting bidirectional-blocking switches, and charges the link inductor in both positive and negative directions in each cycle. In view of this, better utilization of the link inductor and lower total harmonic distortion (THD) are offered. Furthermore, two distinct switching algorithms are developed for the proposed family of converters. In this paper, the detailed behavior of the proposed family is investigated analytically, and simulation and experimental results are presented to evaluate the performance and effectiveness of the proposed converter. A low-power proof-of-concept prototype with input voltage of 59 V/161 V, load voltage of 178 V/73.5 V, maximum switching frequency of 4.9 kHz/3.65 kHz at 215 W/450 W in a step-up/step-down operation is considered for the experimental verification. [ABSTRACT FROM AUTHOR]

Two parallel interleaved two-level (2L) three-phase voltage source inverters (VSIs) can be analyzed as a single three-level (3L) VSI. A generalized carrier-based method is proposed in this paper for implementing different 3L pulsewidth modulation (PWM) techniques using two parallel interleaved 2L VSIs. The proposed method modifies the given three-phase reference signals of 3L VSI for implementation of the PWM technique using two parallel interleaved 2L VSIs. The influence of nonidealities on the equivalent 3L PWM switching sequences is also discussed. To overcome the effect of nonidealities, a new modified discontinuous PWM technique (MDPWM1) is proposed. The analysis of different performance indices is carried out for different 3L PWM techniques, and the key advantages of different PWM techniques are identified. Simulation and experimental results are also presented. [ABSTRACT FROM AUTHOR]

Inductor current is an important feedback parameter in synchronous buck converters (SBCs). It is used for overcurrent protection, current sharing among interleaved modules, and current-mode feedback regulation, among others. While implementing a digital controller, inductor current is sensed and fed into the controller through a high sampling frequency analog to digital converter (ADC). As the switching frequency of the converter becomes higher, the need for an even higher sampling frequency ADC also goes up, which is a distinct disadvantage in terms of the overall cost. This paper discusses a simple current estimation technique that avoids use of any expensive current sensor and high sampling frequency ADCs. The paper shows that in a buck converter, inductor current can be estimated by tracking the width of the switch node voltage. Implementation and limitations of the proposed current estimation scheme are discussed in detail. The proposed method is validated using a 3.3 V–15 A SBC prototype and results show the estimation technique is accurate within 5% with a converter switching frequency of 800 kHz. In order to prove the effectiveness of the technique in feedback regulation, the current estimation technique is used to implement average current mode and hysteretic current mode control on a SBC. To prove the effectiveness of the proposed current estimation scheme, it is used in closed-loop control of the SBC to verify the dynamic responses, such as start-up transient, step change in load, and reference. [ABSTRACT FROM AUTHOR]

In this paper, a new structure for a nonisolated boost dc–dc converter is proposed. The proposed converter generates higher voltage gain than some conventional nonisolated boost dc–dc converters. In this paper, the voltage and current equations of the elements and voltage gain in continuous conduction mode and discontinuous conduction mode are extracted. Then, the critical inductance converter is extracted and the current stresses in the switches are calculated. To achieve high voltage gain, a generalized structure based on the proposed structure generates for dc–dc converters. Meanwhile, the root mean square current relations of devices are obtained for an extended structure. Finally, the results of PSCAD/EMTDC software and laboratory prototype are used to reconfirm theoretical concept. [ABSTRACT FROM AUTHOR]

It is known that the ripple-based control of a switching dc–dc converter benefits from a faster transient response than a conventional pulse width modulation (PWM) control switching dc–dc converter. However, ripple-based control switching dc–dc converters may suffer from fast-scale oscillation. In order to achieve fast transient response and ensure the stable operation of a switching dc–dc converter over a wide load range, based on a conventional pulse train (PT) control technique, a peak capacitor current PT (PCC-PT) control technique is proposed in this paper. With a buck converter as an example, the operating modes, steady-state performance, and transient respond performance of a PCC-PT controlled buck converter are presented and assessed. To eliminate fast-scale oscillation, circuit and control parameter design considerations are given. An accurate discrete iteration model of a PCC-PT controlled buck converter is established, based on which the effects of circuit parameters on the stability of the converter operating in a discontinuous current mode (DCM), mixed DCM-continuous conduction mode (CCM), and CCM are studied. Simulation and experimental results are presented to verify the analysis results. [ABSTRACT FROM PUBLISHER]

By combining the conventional switched-mode power converters with advanced switched capacitor (SC) techniques, a plurality of single-switch current-balancing circuits is developed to drive multiple light-emitting diode (LED) strings in this paper. Compared with the existing current-balancing LED drivers, the proposed drive circuits exhibit their attractive advantages in size and cost efficiency because just one active switch and one magnetic device are required. LED strings' current can be regulated by controlling the duty ratio of the switch in pulsewidth-modulation mode. Both advanced resonant and nonresonant SC methods are introduced to optimize the performance of the proposed LED drivers. The feasibility and theoretical analysis are verified with a 9-W dual-channel nonisolated prototype and a 25-W four-channel isolated prototype. [ABSTRACT FROM PUBLISHER]

In this paper, a simplified pulsewidth modulation with switching constraint control scheme is proposed to eliminate the circulating currents for bidirectional paralleled ac/dc converters in grid-tied system. The proposed control scheme can reduce the circulating currents and does not need additional current sensors and communication device among paralleled converters compared with conventional methods. Therefore, the paralleled system cost can be reduced. In addition, the current shaping and sharing between the paralleled converters can be well accomplished so that the overall performance of the paralleled converter system can be raised. Furthermore, the dc, ac, and self-generated circulating currents are clearly analyzed by graphics, and the synchronous circulating currents are first explored. Finally, a prototype system is constructed, and the proposed control scheme is implemented using a Spartan-3E XC3S250E FPGA. Both simulation and experimental results verify the validity of the proposed theory and control scheme. [ABSTRACT FROM PUBLISHER]

In order to incorporate the advantage of the $V^{2}$ control scheme and the benefits of digital implementation, this paper proposes a digital $V^{2}$ control with hybrid capacitor current ramp compensation, which includes the estimated output capacitor current ramp and the external ramp. Since capacitor current responds to the load change immediately, the proposed method has faster transient response than either digital inductor current compensation or external ramp compensation. The proposed estimator does not require high sampling rate and avoids the current ramp distortion due to the parasitic resistance and inductance. The small-signal model is derived by describing function to understand the dynamic characteristics of the proposed control scheme. The model provides design criteria of the current feedback gain and the external ramp slope. The effectiveness of the proposed control architecture and the current ramp estimator is verified by simulation and experimental results. Compared with the benchmark, the proposed control has 70% reduction on settling time and 20% reduction on undershoot deviation. [ABSTRACT FROM AUTHOR]

This paper proposes a new single-phase single-stage switched-boost inverter with four switches. Like the quasi-Z-source inverter and quasi-switched boost inverter (qSBI), the proposed inverter has the main features as continuous input current, buck/boost voltage with single-stage conversion, and shoot-through immunity. Compared to the qSBI, the proposed inverter uses one more capacitor and one less switch. This paper presents the operating principles, pulse-width modulation control strategy, parameter design guidelines, and simulation results for the proposed inverter. To verify the performance of the proposed inverter, an 800-W prototype was built with an 110 V/50 Hz output voltage in stand-alone and grid-connected modes. The simulation and experimental results matched those of the theoretical analysis. [ABSTRACT FROM AUTHOR]

Conventional zero-voltage and zero-current-switching (ZVZCS) full-bridge converters are widely used because they can realize zero-voltage switching (ZVS) for the leading leg and zero-current switching (ZCS) for the lagging leg. However, the large turn-off loss of the leading leg is still unacceptable in high-voltage high-power applications where insulated-gate bipolar transistors (IGBTs) with current tailing are employed. Hence, it is preferable to achieve ZCS for all IGBTs of full-bridge converters. This paper analyzes the ZCS conditions for pulsewidth modulated (PWM) full-bridge converters and proposes a general strategy for achieving ZCS for main switches, including the control strategy and design method of the topology. Based on this theory, a novel ZCS PWM full-bridge converter with simple auxiliary circuit is derived and tested. It can achieve ZCS not only for the main switches of full-bridge converter, but for the auxiliary switch as well, and obtain high efficiency. The operation principle of the proposed ZCS PWM full-bridge converter and the design procedure are presented. The experimental results of a 600 V/2.5 kW prototype are also included to verify the theoretical analysis. [ABSTRACT FROM PUBLISHER]

This paper introduces series work of common-mode (CM) voltage reduction for the paralleled inverters. The paralleled inverters’ phase-legs are connected through coupling inductors and the combined three-phase currents are provided to the load. Interleaving is an approach to reduce the CM voltage for the paralleled inverters but it cannot eliminate CM voltage. A novel pulse-width-modulation (PWM) method for paralleled inverters which can theoretically achieve zero CM voltage is developed. Considering the basic voltage vectors in each inverter, novel paralleled voltage vectors which have zero CM voltage are proposed to combine the reference voltage vector. The action time's distribution and voltage vectors’ sending sequence for each inverter are also introduced. The proposed PWM method can make sure the voltage of the two inverters are balanced in each switching cycle and limits the circulating current through small coupling inductors. Similar to interleaving space vector PWM, the proposed zero CM PWM also has the ability to reduce the output current ripple and electromagnetic interference (EMI). Simulation and experimental results are provided to show the advantage of paralleled inverters in CM voltage reduction and validate the proposed method has good performance to reduce CM current and CM EMI noise. [ABSTRACT FROM PUBLISHER]

A dual-buck inverter (DBI) possesses no shoot-through worries and can boost efficiency by using power mosfet s. The main drawback of a DBI is the use of more inductors than in a traditional full-bridge inverter. This greater number of inductors decreases the power density and increases system cost. In this paper, a modified cascaded full-bridge DBI is proposed. It retains all the advantages of the conventional cascaded full-bridge DBI, possesses no shoot-through issues, and can be operated with no pulse-width-modulation dead-times. It can be implemented with power mosfet without reverse recovery issues of a body diode to boost efficiency. The cascaded modules in the proposed inverter share current limiting inductors. Therefore, the number of inductors and inductor footprints, the complexity of the circuit layout, required inductance, and magnetic volume can all be decreased. To show the advantages of the proposed inverter, detailed theoretical analysis and experimental results are provided. [ABSTRACT FROM PUBLISHER]

Paralleling power converters is a common practice in industries to enhance total power rating, reliability, and availability of the system. In case of fault occurring in systems with parallel converters, the faulty power converter can be isolated and the system can still be operated at reduced power level. In this paper, a grid-connected power converter consisting of two parallel H-bridge converters with low ground leakage current is considered. Two contingency configurations, that are also of low ground leakage current, are proposed to enhance the availability of the system. This is done by reconfiguring the power circuit to a single H-bridge in the case of failure in one of the bridges. The power converter is experimentally tested with the proposed configurations for experimental validation. The results show that the second configuration has better performance in terms of power loss and current total harmonic distortion when operating at lower power level. [ABSTRACT FROM AUTHOR]

Switch fault diagnosis is an important design aspect for pulse width modulation (PWM) dc-dc power converters. It can prevent power converters from further damage, and also make preparations for remedial actions. In this paper, a fast switch fault diagnostic method is proposed for PWM dc-dc converters operating in continuous conduction mode. The proposed method utilizes the magnetic component (inductor or transformer) voltage for fault diagnosis. Based on the real-time voltage measurement and switch gate-driver signals, characteristics of switch open-circuit faults and short-circuit faults are rapidly extracted, and thus, switch faults can be quickly detected. The magnetic component voltage can be measured by an auxiliary winding in the magnetic core, and gate-driver signals can be easily got from the control circuit. Moreover, the fault detection can be implemented by a low-cost logical hardware circuit, and this circuit can be integrated into the control circuit. The fault diagnosis principle, design considerations, and implementation are discussed in this paper. Experiments are conducted to verify the theoretical analysis. [ABSTRACT FROM AUTHOR]

The positive output elementary superlift-Luo converter (POESLLC) is a type of dc/dc converter. This dc/dc converter has an attractive advantage of a high voltage transfer gain as compared with other conventional dc/dc converters. Because of the voltage and load variations and also switching operation, the dynamic and static performances of the POESLLC are nonlinear and time varying. In order to achieve an excellent performance, a nonlinear controller is required. In this paper, a robust and fast response controller for voltage regulation of a POESLLC is presented. A proportional integral and pulse width modulation sliding mode controller are combined to control a third-order POESLLC. The proposed controller can be applied in the continuous conduction mode. Some simulations and experimental results are presented to show the effectiveness of the developed controller in different operating conditions. Furthermore, it will be shown that the developed controller is successful in suppressing the steady-state error of the output voltage of the POESLLC as well as the number of reduction of sensors. [ABSTRACT FROM PUBLISHER]

This paper proposes a current-fed isolated bidirectional dc–dc converter (CF-IBDC) that has the advantages of wide input voltage range, low input current ripple, low conduction losses, and soft switching over the full operating range. Compared with conventional CF-IBDCs, the voltage spikes of the low-voltage (LV) side switches in the proposed converter can be eliminated without additional clamp circuits. The converter adopts the pulse width modulation plus hybrid phase-shift control scheme such that the bus voltage can match the output voltage by means of the transformer. Thus, the current stresses and conduction losses of the converter become lower. In addition, the practical zero voltage switching (ZVS) of the secondary-side switches can be realized by adjusting the phase-shift angle within the secondary side when in light load or no load condition. The operating principles and characteristics including the power transfer, root-mean-square (RMS) current, and soft switching are investigated in detail. Then the design guidelines of inductors are also given. Finally an experimental prototype with 30–60 V input and 400 V/2.5 An output is built to verify the correctness of theoretical analyses. [ABSTRACT FROM PUBLISHER]

This paper presents a single-inductor multiple-output (SIMO) LED driver with precise dimming and full dimming range. Based on the coordination of a string-level scheme and a system-level dimming scheme, the proposed SIMO LED driver can overcome practical constraints of existing SIMO LED drivers such as limited dimming range and needs for high-current switches. The proposal can achieve dimming precision up to an accuracy of 0.8% and also full dimming range. It has the flexibility of using either phase-shift or synchronous pulsewidth-modulated (PWM) switching for dimming control. The proposed circuit and control operations have been practically verified with a 25-W off-line SIMO-driven LED system. Practical evaluations of its power quality and energy efficiency are also provided. [ABSTRACT FROM AUTHOR]

Primary-side controlled universal-line flyback converters have been widely used in low-power applications due to their simplicity, low standby power, and low cost. However, conventional OCP schemes normally cause too large a variation in output current when the input voltage varies. This paper proposes a self-compensating OCP circuit to achieve a high-precision constant current at different input voltages which can be used in flyback converters working in discontinues conduction mode. It consists of a CS S/H circuit and a dynamic OCP voltage reference circuit. Compared with conventional OCP circuits, it does not need an extra compensation circuit. To verify the feasibility and performance of the proposed circuit, an IC controller that uses the proposed OCP circuit has been designed and fabricated in 0.35 μm 5-V/40-V high-voltage CMOS technology. Experimental results show that the constant output current precision of the prototype is within ±1% when the input line voltage changes from 85 to 265 Vac. In the common line voltage range (\rm110-220\ Vac ), the output current regulation accuracy can reach a level as high as ± 0.3%. [ABSTRACT FROM AUTHOR]

For high-power applications, paralleling converters is a popular approach to increase the power capacity of the system. Circulating current has been a major concern for the implementation of paralleled converters. This paper proposes a three-level space vector modulation (SVM) scheme for a system with two paralleled voltage-source converters (VSCs) with common-mode inductor (CMI) or single-phase inductors. The proposed scheme aims to reduce the zero-sequence circulating current (ZSCC) and the magnitude of common-mode voltage (CMV) of the system simultaneously. The ZSCC patterns with respect to modulation schemes are first analyzed to provide a clear understanding of the generation of ZSCC. Based on the analysis, the proposed three-level modulation scheme is introduced. Furthermore, performance regarding the ZSCC peak value, impact on the common-mode current (CMC), CMI scaling analysis, and switching losses are analyzed and compared with the existing methods. The proposed method has been verified in both simulation and experiment. [ABSTRACT FROM AUTHOR]

This paper introduces a combination of two proposed efficiency improvement techniques for a microinverter with current mode control zero-voltage switching output stages. The first technique is dynamic dead-time optimization wherein pulse width modulation dead times are dynamically adjusted as a function of load current. The second method is advanced phase skipping control which maximizes inverter efficiency by controlling power on individual phases depending on the available input power from the photovoltaic source. Neither of the techniques requires any additional circuit components and both can be easily implemented in digital controller firmware. The two techniques were designed and implemented in a 400-W three-phase microinverter prototype. The experimental results validate the theoretical analysis of these techniques and demonstrate that a significant efficiency improvement can be achieved by combining the two proposed control techniques. [ABSTRACT FROM AUTHOR]

A new single-phase \uppi-\texttype 5-level inverter using 3-terminal switch-network (3TSN) is proposed in this paper. The topology is considered as a variant of T-type 3-level structure or dual-buck inverter with coupled inductors. This new inverter is suitable for multilevel power inversion with low dc-bus voltage. The merit of the proposed topology is to apply only four active power switches to achieve 5-level operation. Other benefits include double frequency operation of output inductor and equal division of the current that flows through power switches and filter inductor. Hence, it leads to high efficiency and low harmonics. These characteristics allow improvement of losses distribution and volume reduction of output filter inductor. The operation scenario with sinusoidal pulsewidth modulation (SPWM) is described in details. Meanwhile, the magnetic analysis and design are studied and discussed. Finally, a prototype is built to verify the theoretical analysis and demonstrate the benefits of the proposed topology. [ABSTRACT FROM AUTHOR]

The main objective of this paper is to examine the operation of a fundamental buck-based three-phase single-stage ac–dc full-bridge converter. In this paper, the operation of this fundamental converter is explained and analyzed, and a procedure for the design of its key components is derived and demonstrated with an example. The performance and characteristics of the converter are shown with experimental results that have been obtained from a prototype, and general concluding remarks comparing buck-based and boost-based three-phase single-stage ac–dc full-bridge converters are made. [ABSTRACT FROM PUBLISHER]

This paper focuses on the common dc-link voltage between a three-phase diode rectifier and a modular multilevel cascade inverter based on double-star chopper cells (MMCI-DSCC) for a medium-voltage motor drive. This motor drive can be operated even when no capacitor exists on the dc link. However, a nonnegligible, but predictable, amount of switching-ripple voltage occurs on the dc link. This paper achieves modeling and analysis of the switching-ripple voltage, thus making it possible to design a small-sized dc passive filter consisting of series connection of a film capacitor and a damping resistor. A 400-V, 15-kW down scaled system is used to confirm the effectiveness of the analysis and the dc filter. Experimental results show that the switching-ripple voltage can be attenuated satisfactorily by the dc filter, and that the power loss dissipated in the damping resistor is negligible, compared to the rated power of 15 kW. [ABSTRACT FROM AUTHOR]

This paper proposes a pulse-width modulation three-level converter with reduced filter size using two transformers. The proposed converter has many advantages. All switches sustain only the half of the input voltage and since the secondary rectified voltage is a three-level waveform, the output filter inductor can be reduced. Also, because of the power sharing of transformer and reduced output inductor, high efficiency can be obtained. The operational principle, analysis, and design considerations of the proposed converter are presented in this paper. The validity of this study is confirmed by the experimental results from a prototype with 600 W, 500-600 V input, and 60 V output. [ABSTRACT FROM AUTHOR]

This paper suggests a pedagogical approach to teaching the subject of average modeling of PWM switch-mode power electronics systems through simulation by general-purpose electronic circuit simulators. The paper discusses the derivation of PSPICE/ORCAD-compatible average models of the switch-mode power stages, their software implementation, and fast time-domain, frequency-domain, and stability analysis simulation techniques suitable for virtual study of complex switch-mode feedback systems. The proposed approach is demonstrated by a simulation example. The methodology is oriented toward Electrical Engineering students at the undergraduate level, enrolled in courses such as “Power Electronics,” “Industrial Electronics,” or the like. The paper can be helpful to instructors of a “Virtual Power Electronics Laboratory” course wanting to conduct a software experiment on dynamics of switch-mode power converter systems. Engineers and scientists approaching the task of simulation of switch-mode systems can also find the suggested technique useful. [ABSTRACT FROM AUTHOR]

A new zero-voltage-switched bidirectional dc–dc converter with coupled inductors is proposed in the paper. The proposed converter can operate with a steep conversion ratio, soft switching, a continuous inductor current, and fixed switching frequency. It can also operate with the switch stresses of a conventional pulsewidth-modulation-tapped/coupled-inductor converter regardless of the direction of power flow and without any voltage spikes across the switches during turn-OFF. These features are due to a very simple auxiliary circuit that is operational regardless of the direction of power flow and absorbs energy from the leakage inductance of the coupled inductors during switch turn-OFF. In the paper, the operation and design of the converter are discussed and its feasibility is confirmed with experimental results obtained from a prototype. [ABSTRACT FROM PUBLISHER]

This paper proposes the use of advanced bus clamping switching sequences to reduce the impedance network inductor current ripple of the three-phase Z-source inverter (ZSI). Proposed technique is named as ABC4_MCB. MCB denotes that the maximum constant boost control method is used for the voltage boosting. One of the conventional space vector pulsewidth modulation of ZSI, “ZSVM6,” is termed as ZSVM6_MCB under the maximum constant boost control method. The switching sequences of ABC4_MCB technique are designed in such a way that it offers around 34% reduction in the maximum instantaneous inductor current ripple as compared to the ZSVM6_MCB for the equal average switching frequency. The factor of percentage reduction in the inductor current ripple using the proposed technique is constant over the entire range of shoot through duty ratio (0–0.48). Theoretical findings have been verified using simulation and experimental results. [ABSTRACT FROM AUTHOR]

Photovoltaic (PV) systems having rechargeable batteries are prone to be complex and costly because multiple converters are necessary to individually regulate a load, PV panel, and battery. This paper proposes novel nonisolated multiport converters (MPCs) integrating a bidirectional pulsewidth modulation (PWM) converter and phase-shift-switched capacitor converter (PS-SCC) for standalone PV systems. A PWM converter and PS-SCC are integrated by reducing the total switch count, realizing the simplified system and circuit. In the proposed MPCs, two control freedoms of duty cycle and phase shift angle are manipulated to individually regulate the load, PV panel, and/or battery. The detailed operation analysis was performed to mathematically derive gain characteristics and zero voltage switching operation boundaries. For the battery discharging mode, in which the PV panel is not available and the MPC behaves as a single-input–single-output converter with two control freedoms available, the optimized control scheme achieving the lowest rms current is also proposed to maximize power conversion efficiencies. Various kinds of experimental verification tests using a 200-W prototype were performed to verify the theoretical analysis and to demonstrate the performance of the proposed MPC. [ABSTRACT FROM AUTHOR]

A novel PWM full bridge (FB) dc–dc converter for large power industrial applications is proposed in this paper. The soft switching mode of the primary switches can be varied under different input and output conditions to achieve optimum system efficiency. In the zero-voltage and zero-current switching (ZVZCS) mode, the turn-on and turn-off switching loss can be optimized because the soft switching conditions of the turn-on and turn-off instants are well decoupled. In the zero-voltage switching (ZVS) mode, the turn-off switching loss can also be optimized because there is no requirement for light load operation in this mode. Four mosfets with ultra-low on-state resistance are used, thus, the added conduction loss is small. The auxiliary mosfets with high switching frequency are turned on with zero-current and off with zero-voltage, hence, the added switching loss can also be neglected. Furthermore, some drawbacks of the conventional ZVS and ZVZCS converters, e.g., narrow ZVS load range, high primary circulating current, incomplete reset of the primary current, and unreasonable VA rating of the added components, have been well solved. The operation principles and soft switching characteristics are discussed. Experimental results from an 18-kW prototype are provided to verify the proposed converter. [ABSTRACT FROM AUTHOR]