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High-voltage (HV) pulses are used in electroporation to subject pulsed electric field (PEF) onto a sample under treatment. Pulse-waveform shape, voltage magnitude, pulse duration, and pulse repetition rate are the basic controllable variables required for particular PEF application. In practice, a custom-made pulse generator is dedicated for each PEF application with limited flexibility in changing these variables. In this paper, a universal pulse-waveform generator (UPG) is proposed, where the controller software algorithm can manipulate a basic generated multilevel pulse waveform to emulate many different PEF pulse waveforms. The commonly used PEF HV pulse waveforms can be generated as bipolar or monopolar with controllable pulse durations, repetition times, and voltage magnitudes. The UPG has the ability to generate multilevel pulses that have controllable $dv/dt$, which allows reduction of the electromagnetic interference generated by the converter. The UPG topology is based on half-bridge modular multilevel converter (HB-MMC) cells forming two transition arms in conjunction with two bistate arms, together creating an H-bridge. The HB-MMC cell capacitors provide a controllable energy source which charge from the dc input supply and discharge across the load, while the two bistate arms allow charging the HB-MMC cell capacitors. Hence, the UPG topology offers modularity, redundancy, and scalability. The HB-MMC individual cell capacitance is low and the cell voltages are balanced by employing the sorting and rotating algorithm used in conventional HB-MMC topologies for HV dc transmission applications. The viability of the proposed UPG converter is validated by MATLAB/Simulink simulation and scaled-down experimentation. [ABSTRACT FROM PUBLISHER]

This paper proposes a new nine-level inverter for medium- and high-power applications. The proposed topology comprises of a three-level (3L) active neutral-point-clamped (ANPC) inverter connected in series with a floating capacitor (FC) fed H-bridge. Besides, two additional switches operating at line frequency are appended across the dc link of the 3L ANPC structure. Compared with conventional hybrid cascaded inverters, the primary advantage of this addition is doubling of the resulting root mean square output voltage. This amelioration is achieved while preserving the standard 3L ANPC and H-bridge structures with minimum topological modification. A simple logic-gate-based voltage balancing scheme is developed to regulate the FC voltage. The proposed voltage balancing method is independent of load power factor, inverter modulation index, and can balance the voltage across FC instantaneously. The step-by-step formulation of logical expressions for the generation of gating pulses is deliberated in detail and can be generalized for any $n$-level inverter. Further, simulation results as well as the experimental measurements obtained from the laboratory prototype are presented to validate the effectiveness and practicability of the proposed configuration. Finally, the notable merits of the proposed inverter over the prior art topologies is established through a comprehensive comparative study. [ABSTRACT FROM PUBLISHER]

This paper presents a single-stage solar photovoltaic (SPV) system utilizing an adaptive control scheme. The SPV system includes SPV array, voltage source converter (VSC), ripple filter, nonlinear loads, and a distribution network. The proposed SPV system feeds the active power to the distribution system, provides an effective use of SPV array and mitigation of load harmonics currents. The SPV system with an incremental conductance based control scheme is used for obtaining the maximum power from the SPV array and an adaptive control scheme to control the switching pulses of the VSC. In addition, it utilizes a SPV feed-forward loop to improve the dynamic response and reduces the burden on the proportional-integral controller by regulating dc bus voltage. Test results are presented to validate the control, design, and response of SPV system with various states. [ABSTRACT FROM PUBLISHER]

This paper investigates the utilization of two different six-leg configurations of single-phase to three-phase converters. One of the topologies is transformerless and the other is transformer based. The studied converters allow feeding the load voltage with sinusoidal voltages with constant amplitude and frequency, and to operate with sinusoidal grid current with high power factor. The system model and pulse-width modulation techniques for one of the topologies are given. Control strategies for both topologies are provided. The studied topologies are compared with the conventional in terms of dc-link specification, voltages harmonic distortions, semiconductor losses, and other characteristics. Simulation and experimental results are provided to illustrate the operation of the systems. [ABSTRACT FROM PUBLISHER]

High-voltage (HV) pulses are used in pulsed electric field (PEF) applications to provide an effective electroporation process, a process in which harmful microorganisms are disinfected when subjected to a PEF. Depending on the PEF application, different HV pulse specifications are required such as the pulse-waveform shape, the voltage magnitude, the pulse duration, and the pulse repetition rate. In this paper, a generic pulse-waveform generator (GPG) is proposed, and the GPG topology is based on half-bridge modular multilevel converter (HB-MMC) cells. The GPG topology is formed of four identical arms of series-connected HB-MMC cells forming an H-bridge. Unlike the conventional HB-MMC-based converters in HVdc transmission, the GPG load power flow is not continuous which leads to smaller size cell capacitors utilization; hence, smaller footprint of the GPG is achieved. The GPG topology flexibility allows the controller software to generate a basic multilevel waveform which can be manipulated to generate the commonly used PEF pulse waveforms. Therefore, the proposed topology offers modularity, redundancy, and scalability. The viability of the proposed GPG converter is validated by MATLAB/Simulink simulation and experimentation. [ABSTRACT FROM PUBLISHER]

A novel hybrid five-level voltage-source converter for high-efficiency applications is investigated in this paper. Compared with traditional multilevel converters, this hybrid multilevel converter generates desired staircase voltage levels with a reduced number of power devices and isolated drivers at higher voltage levels. It has redundant switching state combinations in hybrid multilevel converter, which makes it easy to balance flying capacitor voltages and realize fault-tolerant operation. A voltage-balancing control strategy based on switching state redundancies is presented for the hybrid multilevel converter to generate desired levels and also keep voltage balance of flying capacitors at the same time. The performance of the hybrid multilevel converter under various operating conditions is investigated in MATLAB/Simulink. The effectiveness of the proposed hybrid multilevel converter is validated by experiment results. [ABSTRACT FROM AUTHOR]

A fixed-frequency pulse width modulation (PWM) controlled bidirectional current-fed series-resonant converter is proposed in this paper. The proposed bidirectional resonant converter is derived based on integration of a bidirectional boost/buck converter and a dual-active-bridge series-resonant converter. The most attractive feature of the proposed bidirectional resonant converter is that its voltage gain is only determined by the duty cycle of primary-side switches and has nothing to do with the transferred power. Therefore, the direction and amplitude of the transferred power can be easily regulated continuously and smoothly. In addition, with the help of an auxiliary inductor, zero voltage switching can be achieved for all the active switches on both primary and secondary sides within the entire operation range. Furthermore, the converter is suitable for wide voltage applications because its voltage gain can be regulated in a wide range. The operational principles and characteristics of the proposed bidirectional resonant converter are analyzed in detail. The feasibility and effectiveness of the proposed converter are fully verified by the experimental results from a 1.6 kW prototype. [ABSTRACT FROM AUTHOR]

Grid-connected power conversion systems for renewable energy sources must fulfill several requirements, e.g., the high efficiency, the reduced cost and complexity, and, quite often, the boost capabilities that is usually achieved using a front-end dc–dc boost converter before the inversion stage, leading to a two-stage architecture. Meanwhile, single-stage power conversion systems, which perform the boosting operation within the inversion one, offer some potential advantages, in terms of reducing the complexity and the volume of the whole system. Among several proposed options, the split-source inverter (SSI) has been recently proposed by Abdelhakim et al. as an alternative option with some interesting features to the commonly used Z-source inverter. Taking into account that the SSI is controlled by a single parameter, i.e., its dc and ac sides are controlled by the modulation index, it is of paramount importance to investigate its control scheme in grid-connected mode, which has never been studied yet. Hence, this paper models the SSI dc side and proposes a modified modulation scheme combined with the commonly used synchronous reference frame control technique to achieve a decoupled control scheme of the SSI in grid-connected mode, i.e., the dc and the ac sides of the SSI can be controlled independently, which is convenient for many applications. The introduced control scheme is analyzed and simulated using a MATLAB/Simulink model, where a reduced scale 1-kVA grid-connected SSI is designed and simulated for the sake of experimental validation. Finally, the designed system is implemented experimentally to validate and verify the reported analysis and simulations. [ABSTRACT FROM PUBLISHER]

The paper presents a new bridgeless power factor correction (PFC) topology, using a recently proposed controllable LCL filter, namely active virtual ground to achieve efficient power conversion, and high-frequency common mode voltage (CM) reduction. The proposed PFC circuit consists of high-frequency semiconductors for shaping inductor current and low-frequency semiconductors to form two different LCL structures for different conditions. This reduces grid differential mode current ripple or inductance. Besides, the PFC CM voltage, a main problem of bridgeless PFCs, is significantly reduced, since the capacitor in the LCL filter clamps the voltage between the grid and the converter ground. The performance of the proposed PFC is experimentally verified. The results show that the proposed PFC guarantees sinusoidal input current, low high-frequency common-mode voltage noise, and has a good agreement with the theoretical findings. [ABSTRACT FROM AUTHOR]

To solve some problems caused by the ac control method used for the existing modular multilevel dc–dc converter (MMDC), this paper has proposed a new MMDC topology with a wide range of output voltage by means of dc control. By reconstructing the submodule structure, the converter has a power branch and an auxiliary balance branch, which are used to transmit dc power and balance the capacitor voltage, respectively. Both dc analysis and control method are adopted to establish a mathematical model so as to deduce the mathematical relationships between the key electrical parameters. Moreover, what have been done include analyzing the self-balancing principle of the capacitor voltage and the mechanism of the auxiliary balance branch, calculating the related parameters of the capacitor voltage fluctuation, and presenting a dc closed-loop control strategy based on a small-signal model. The analyses of the steady and dynamic states in combination with simulation and experiment show that the proposed converter can stably operate in the mode of dc control, with a large adjustable range of output voltage, a small fluctuation in voltage of the capacitor, and the ability of the inductor to suppress the spike of the auxiliary balance current effectively so as to reduce the impact on the device. [ABSTRACT FROM AUTHOR]

Full-bridge single-stage (FBSS) ac-dc converters allow to regulate both the output voltage and the input current that achieves a near sinusoidal waveform using only the four bridge transistors. Independent of this feature, these converters still need to be optimized in order to become an interesting and attractive solution for modern switch mode power supplies with power factor corrector (PFC) function. One of the most important improvements needed is the downsizing of the dc bus capacitor C b with the inherent cost reduction. However, this action introduces complex issues in the regulation of the input current and it is also responsible for the generation of high output voltage ripple. The new contribution of this paper consists in the introduction of a set of power circuit optimizations and control techniques in a FBSS PFC converter that solves the referred issues in order to enable the reduction of the dc bus capacitor's size and cost. These procedures are based in the use of a free wheeling circuit that improves the light load operation and in the application of one shot nonlinear modulator, in order reduce the output voltage ripple even when the dc bus ripple is high. The possibility of using, in the proposed topology, a reduced ratio capacitance/watt lower than the typical values used in commercial applications (0.7-0.5 μF/W for 385-450 V, respectively), while maintaining the accurate input current regulation, is also theoretically proved. The developed concepts, solutions and design criteria are detailed described in the paper. The correspondent theoretical study is verified trough experimental results token in an optimized FBSS topology prototype. [ABSTRACT FROM AUTHOR]

This paper proposes a novel dynamic voltage restorer (DVR) topology based on reduced-order matrix converter modules. The topology utilizes two modules for selective and independent sequence voltage synthesis. As a result, the DVR proposed herein can compensate for balanced as well as unbalanced voltage sags/swells. Each module is realized using a vector-switching matrix converter. The entire topology is energy storage free, and each module is pulsewidth modulated using simple dc duty ratios. This paper provides details on the DVR modeling, equivalent circuit, and feedback controller design. Thorough computer simulations and experimental prototyping are used to validate the approach. [ABSTRACT FROM PUBLISHER]

This paper presents a modulation strategy for the modular multilevel converter (MMC) which provides the voltage balancing of the capacitors of different submodules comprising the converter. Not only is this modulation applicable to MMCs constructed with classic two level (2L) submodules, but it is also effective for arrangements with different submodule concepts, for instance, topologies like neutral point clamped (NPC), flying capacitors (FCs), neutral point piloted (NPP), etc. Therefore, firstly, the general modulation philosophy is explained applied to the two level (2L) submodule concept, and secondly, the extension to 3L-NPC and 3L-FC submodule topologies is analyzed. After that, the validation of the studied modulation strategy is carried out by means of successful simulation results, at different switching frequencies and number of submodules. The corresponding experimental results are shown in Part II of this paper after having implemented the aforementioned modulation strategy in a real test bench. In addition to this, a comparison based on thermal analysis and sizing of elements among the four studied submodule topologies is also included. [ABSTRACT FROM PUBLISHER]

Modern development of semiconductor power-switching devices has promoted the use of power electronic converters as power transformers at the distribution level. This paper presents an ac–ac dual-active-bridge (DAB) converter for a solid-state transformer. The proposed converter topology consists of two active H-bridges and one high-frequency transformer. Four-quadrant switch cells are used to allow bidirectional power flow. Because power is controlled by the phase shift between two bridges, output voltage can be regulated when input voltage changes. This paper analyzes the steady-state operation and the range of zero-voltage switching. It develops a switch commutation scheme for the ac–ac DAB converters. Experimental results from a scaled-down prototype are provided to verify the theoretical analysis. [ABSTRACT FROM PUBLISHER]

In recent years, high photovoltaic array voltage up to 1000 V and transformerless grid-tied inverter have been increasingly researched and applied to elevate the inverter and the dc power collection efficiency. With the same reasons, a three-level neutral point clamped (3L-NPC) inverter featuring low power device voltage stress and low leakage current becomes increasingly attractive. In this paper, the operation and the features of a novel grid-tied 3L-NPC are presented. The proposed topology is a derivative of the three-level stacked neutral point clamped (3L-SNPC) structure. However, compared with the conventional 3L-SNPC and its pulse width modulation (PWM) strategy, the new topology with novel PWM strategy features completely inactive intrinsic body diodes. Furthermore, only two outer power devices are working with switching frequency, while the other four Insulated Gate Bipolar Transistors (IGBTs) are actually with the grid frequency. Therefore, the relatively high switching frequency is selected to reduce the inverter output filter inductance. A hybrid CoolMosfet and IGBT power module configuration is also proposed based on the new PWM strategy. The calculation shows that the total power device losses are reduced. The experimental results are illustrated in this paper to confirm the operation of the proposed topology and controller. [ABSTRACT FROM PUBLISHER]

The boost converter with a voltage multiplier cell allows the static gain extension by means of the switching capacitor technique, reducing the duty cycle needed to achieve the same voltage gain when compared to the conventional boost converter. However, the modeling of this converter is complex and requires the use of advanced techniques due to the resonant inductor. Thus, this paper aims to present a reduced-order model of this converter without the resonant energy exchange between the capacitors, so that the state-space averaging technique can be applied assuming small ripple in the state variables. In addition, this paper presents the design of a control system for the boost converter with a voltage multiplier cell. The adopted strategy employs an inner loop to control the input current and an outer loop for the output voltage regulation. Extensive analysis based on simulations and an experimental prototype demonstrate that the proposed modeling, although simplified, is sufficient for an adequate control system design, ensuring good voltage regulation, and fast transient responses. [ABSTRACT FROM PUBLISHER]

An open-winding power conversion system with two conventional six-switch voltage-source converters (VSC) affords operation with a lower volt-ampere (VA) rating of each device for a given power rating, as well as a degree of fault tolerance. The disadvantages of such a configuration include a higher total device VA rating and increased conduction loss as compared to a single Y/Δ-connected VSC. In certain ac-dc applications, such as telecommunications, wind, and aerospace generator drives, it is desired to have regulated input currents and output voltage, but regenerative operation is either not required or prohibited. For such applications, an alternative open-winding power converter is proposed in this paper where half-controlled converter (HCC) is employed at each end of an open-winding structure. The resultant total switch count and total VA rating are reduced by half, compared to using full bridges. Besides, the basic advantages of an open-winding configuration, use of HCCs also guarantees immunity to dc-bus shootthrough and simplifies the gate drive circuit. The total VA rating of the proposed topology is found to be 42% less than a six-switch VSC. The operating principle, control method, and analysis with simulation and experimental results of the proposed topology in both a grid-tied rectifier application and a PM generator application are illustrated in this paper. [ABSTRACT FROM AUTHOR]

This paper presents a novel soft-switching galvanically isolated buck-boost dc–dc converter as a module-integrated converter for photovoltaic (PV) applications. It features three major operating modes: boost, normal, and buck mode. Their proper distribution over the input voltage range enables wide voltage regulation capabilities, i.e., close to those of nonisolated power optimizers. The proposed control algorithm requires only one buck-boost switching stage that performs voltage regulation by means of the switching stage reconfiguration with smooth transition between the modes. The design guidelines and the digital control system for PV applications are provided. The module-integrated converter was verified experimentally with a solar array simulator. The converter showed good maximum power point tracking performance and a peak efficiency of nearly 97%. [ABSTRACT FROM PUBLISHER]

Multilevel inverters are receiving more attentions nowadays as one of preferred solutions for medium- and high-power applications. As one of the most popular hybrid multilevel inverter topologies, the five-level active-neutral-point-clamped inverter (5L-ANPC) combines the features of the conventional flying-capacitor type and neutral-point-clamped (NPC) type inverter and was commercially used for industrial applications. In order to further decrease the number of active switches, this paper proposes a seven-switch 5L-ANPC (7S-5L-ANPC) topology, which employs only seven active switches and two discrete diodes. The analysis has shown a lower current rating can be selected for the seventh switch under high power factor condition, which is verified by simulation results. The modulation strategy for 7S-5L-ANPC inverter is discussed. A 1 kVA single-phase experimental prototype is built to verify the validity and flexibility of the proposed topology and modulation method. [ABSTRACT FROM AUTHOR]

In this paper, a small signal model is proposed for the new unidirectional three-phase T-type rectifier topology known as five-level T-Rectifier (5L T-RECT). The proposed model is obtained starting from the large signal analytical representation of the 5L T-RECT configuration. The derived equations have been simplified using the synchronous reference frame transformation; to this purpose, the average values over the fundamental period T0 are considered for the input phase voltages. After that, the converter steady-state and dynamic models are derived by means of the local linearization around the desired operating point. The transfer functions related to the inputs and outputs of the system are, therefore, obtained and depicted. The achieved 5L T-RECT model has been first verified using the linear analysis tool in the matlab/Simulink environment starting from the detailed switching model. Theoretical results exhibit a very good accuracy between the small-signal, the large-signal, and the switching models. Then, experimental activity is depicted to further validate the proposed small-signal model. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC or M2C) is an emerging attractive multilevel topology for medium-voltage high-power applications. The capacitor voltage balancing control and the improvement of output current rating are two challenging issues of MMC. This paper proposed a new parallel-connected diode-clamped M2C (DCM2C), in which each arm consists of two parallel-connected clusters. In this topology, the capacitor voltages can be balanced automatically without any balancing control algorithms. Theoretically, no voltage sensors are needed to measure the capacitor voltages theoretically. Thus, the control of the converter can be simplified greatly. With a simple current-sharing control, an equal current distribution can be achieved between the two clusters. Furthermore, an extended parallel-DCM2C is proposed for larger current applications, and the corresponding current-sharing control method is developed. Experimental results validated the voltage self-balancing capability of parallel-DCM2C and the effectiveness of the proposed current-sharing control. [ABSTRACT FROM PUBLISHER]

In the case of partial shading, the output power of the unshaded PV modules will be decreased by the influence of the shaded PV modules in one branch. In order to solve this problem, this paper proposes a novel topology for a PV power generation system by connecting a PV module to the capacitor in each submodule of a modular multilevel converter parallel. As partial shading occurs, the maximum power can be extracted by regulating the capacitor voltage to the maximum power point voltage. With this proposed topology, the maximum power tracking controller, the redundancy module controller, the voltage stability controller, and the grid-connected controller are studied. Simulation and experiment results show that comparing to the traditional topology, the proposed topology can greatly improve the output power of the PV system under the conditions of partial shading and features with low-voltage stress and high efficiency. [ABSTRACT FROM AUTHOR]

Ripple cancellation LED driver can achieve flicker-free LED driving while maintaining high power factor, high efficiency, and low component cost. It is a very competitive solution compared to a conventional single-stage or two-stage LED driver design. In this paper, a primary-side-controlled ripple cancellation LED driver has been proposed. The voltages of the proposed LED driver are sensed at the primary side by transformer sensing windings. The LED current is also obtained by sensing the primary-side switching current. The entire control circuit is built on the primary side. All the advantages from the existing ripple cancellation LED drivers are maintained while achieving the primary-side control. Based on the proposed circuit, a potential integrated primary-side controller can be designed, which can significantly reduce the component cost and design complexity. A 30-W, 50-V, 0.6-A experimental prototype with a universal input voltage range has been built to verify the proposed LED driver. [ABSTRACT FROM AUTHOR]

This paper proposes and investigates a new three-phase ac–dc–ac multilevel conversion system obtained from cascaded three-leg converters. Such configuration presents advantages in terms of reduced switch blocking voltages and consequently lower dc-link voltage rating. Operating principles, a pulse-width modulation (PWM) technique based on vector approach, and a control strategy are presented. The operation with different dc-link voltage values and a balancing method are discussed, and is supported by simulation and experimental results. The PWM technique is able to generate multilevel voltage waveforms, which permits reducing the switching frequency stress leading to reduced semiconductor losses. Simulation results are used to compare the proposed configuration with a conventional solution in terms of harmonic distortion and semiconductor losses. Experimental results demonstrate the feasibility of the studied converter, and were obtained by using a downscaled prototype with insulated gate bipolar transistors with dedicated drives and a digital signal processor with appropriated plug-in boards and sensors. [ABSTRACT FROM PUBLISHER]

A microconverter serves as a front-end dc–dc stage of a microinverter to convert the power from a photovoltaic module to a dc bus. These front-end microconverters require isolation, high-boost ratio, wide-input voltage regulation, and high efficiency. This paper introduces an isolated resonant converter with hybrid modes of operation to achieve wide-input regulation while still maintaining high efficiency. The proposed converter is designed as a series resonant converter with nominal-input voltage and operates under two additional modes: a boost converter with low-input voltage and a buck converter with high-input voltage. Unlike conventional resonant converters, this converter operates at discontinues conduction mode with a fixed frequency, simplifying the design and control. In addition, this converter can achieve zero-voltage switching (ZVS) and/or zero-current switching (ZCS) of the primary-side MOSFETs, ZVS and/or ZCS of the secondary-side MOSFETs, and ZCS of output diodes under all operating conditions. Experimental results using a 300-W prototype achieve a peak efficiency of 98.1% and a California Energy Commission efficiency of 97.6% including all auxiliary and control power at nominal-input voltage. [ABSTRACT FROM PUBLISHER]

This paper presents a new active capacitor voltage balancing control method for the flying capacitor multicell (FCM) converters which is fully implemented using logic-form equations. The proposed active capacitor voltage balancing control technique, measures output current and flying capacitor (FC) voltages to generate the switching states in order to produce the required output voltage level and to balance FCs’ voltages at their reference values. Output voltage of the FCM converter controlled with proposed active capacitor voltage balancing method can be modulated with any pulse width modulation (PWM) technique such as the phase-shifted-carrier PWM or level-shifted-carrier PWM. An advantage of the proposed active capacitor voltage balancing control method is its simplicity as it does not require any complex computations and tedious optimization calculations. Simulation results and experimental measurements of a three-cell four-level and four-cell five-level FCM converters are presented to verify the performance of the proposed active capacitor voltage balancing control technique. [ABSTRACT FROM AUTHOR]

This paper proposes a novel active capacitor voltage balancing technique for stacked multicell (SM) converters. The proposed active capacitor voltage balancing control method detects the direction of the load current and measures the voltage of flying capacitors (FCs) to generate a proper switching state in order to form the required output voltage level and regulate the FC voltages at their desired reference levels. The proposed active capacitor voltage balancing control technique can modulate the output voltage through any of the pulse-width-modulation (PWM) techniques such as the phase-shifted carrier PWM or the level-shifted-carrier PWM. The foremost advantage of the proposed active control technique is that it does not demand any complex computations because it is not based on the optimization of the FC voltage-deviation cost functions. A thorough set of simulation results and experimental measurements for the five-level and seven-level SM converters are provided to validate the proposed active capacitor voltage balancing control method. [ABSTRACT FROM AUTHOR]

This paper presents the high-performance quasi-Z-source series resonant dc–dc converter as a candidate topology for the photovoltaic module-level power electronics applications. The converter features a wide input voltage and load regulation range thanks to the multimode operation, i.e., when the shoot-through pulse width modulation and phase-shift modulation are combined in a single switching stage to realize the boost and buck operating modes, respectively. Our experiments confirmed that the proposed converter is capable of ensuring ripple-free 400 V output voltage within the sixfold variation of the input voltage (from 10 to 60 V). The converter prototype assembled achieved a maximum efficiency of 97.4%, which includes the auxiliary power and control system losses. [ABSTRACT FROM AUTHOR]

This paper proposes a method for calculating selective harmonic elimination (SHE) angle solutions applied to multilevel voltage waveforms (of more than three levels of voltage): Phase-shifted SHE (PS-SHE). This technique is based on the calculation of simple SHE angles, increasing the number of levels and minimized harmonics by means of phase shift application. Compared to classical calculation, continuous SHE solution can be achieved for the whole modulation index range. Added to this, dc-link voltages balancing strategy is proposed for converters based on single-phase H-bridge (HB) configurations with multilevel (more than two levels) arms, using SHE. It is based on a prediction of the neutral point current and a hysteresis band. This strategy does not increase the number of commutations and shares them equally among the arms inside the HB. The good performance of the two proposed techniques (PS-SHE and dc-link neutral point regulation strategy) are proven into a downscaled five-level HB neutral-point-clamped (5L HNPC) converter topology. The carried out tests prove the suitability of the proposed techniques. [ABSTRACT FROM AUTHOR]

Under a short-circuit fault in low-voltage dc microgrid, solid-state circuit breaker (SSCB) assumes the responsibility of the quick and effective isolation of the faulted area, while its own safety and reliability depends on the overvoltage suppression ability of its snubber. For SSCB snubber design, however, traditional method suited for converter switch snubber cannot be directly applied, because SSCB snubber stresses more on its overvoltage suppression and fault current withstanding instead of snubber loss reduction. Therefore, this paper strives to build a snubber design method specialized for SSCB overvoltage suppression at bus fault interruption. A comprehensive and target-focused set of measurements is proposed and applied to the comparison of three RCD snubber candidates: charge–discharge type, discharge-suppressing type I, and discharge-suppressing type II. The set of measurements includes six indicators with peak SSCB voltage and peak bus current as the main indexes. After parameters are determined, the indicators of the three snubbers are compared, through which discharge-suppressing type I is selected as the most appropriate SSCB snubber. Experiments of the three snubbers have also been conducted in a ±200-V/dc system to verify the correctness of comparison results and the validity of discharge-suppressing type I for SSCB overvoltage suppression at dc-bus fault. [ABSTRACT FROM AUTHOR]

The series resonant soft-switching topology is widely used in high-density DCX products due to its zero switching loss. But, the conventional series resonant converter is a dual end topology, which results in complex circuit structure and high cost. In order to simplify the resonant DCX topology and reduce the cost, a novel resonant cell named input current fed (ICF) cell is proposed in this paper, which can be applied to single-ended forward topologies. The zero-voltage-switching (ZVS) on and quasi-zero-current-switching (ZCS) off for switch are both achieved. According to the duality theory of circuit, another output current sink cell is derived. Based on the proposed ZVZCS ICF cell, two cells are interleaved to construct several dual end cells, which can be extended to push–pull, full bridge, half bridge, and other dual end topologies. Based on these cells, a new family of ZVZCS resonant DCX is derived, which are suitable for high-frequency and high-efficiency applications with various power levels. The operating principle and characteristics of the cells and topologies are verified by simulations and experimental results. [ABSTRACT FROM AUTHOR]

This paper presents a new multicell topology based on flying capacitor (FC) structure suitable for multilevel converters. The proposed topology employs the concept of phase-shifted carrier pulse width modulation (PWM) with modified modulating signals to generate appropriate PWM signals. The modulation strategy along with all possible switching states are explained. The implementation of the proposed PWM technique is shown by the help of illustrating waveforms. To show the advantages of the proposed structure, different performance criteria are compared with other FC multicell (FCM) structures. Simulation results are used to further evaluate the potential merits of the proposed topology. It is shown that the proposed structure is superior to other FCM-based structures from different standpoints. Specifically, it reduces the number of high-frequency switches, the number of FCs, and at the same time improves the quality of output voltage. A laboratory-type experimental setup is used to validate the modulation strategy and other theoretical findings. [ABSTRACT FROM AUTHOR]

This paper proposes a controlled transition full-bridge (CTFB) hybrid multilevel converter (HMC) for medium and high voltage applications. It employs a full-bridge cell chain-link (FB-CL) between the two legs in each phase to generate multilevel bipolar output voltage. The CTFB-HMC has twice dc voltage utilization or power density of conventional converters due to the bipolar capability of its full-bridge configuration. Hence, for the same power rating and same voltage level number, its total cells per phase are quarter that in modular multilevel converter (MMC), which reduces the hardware installation volume. Also, in the proposed converter, the total device number in the conduction paths is the same as in the half-bridge MMC, leading to low conduction losses. The FB-CL current of the CTFB converter has no dc component, which offers the potential to enhance the transient response. Comparative studies between the CTFB and other multilevel topologies are carried out to clarify its main features. The modulation strategies and parameter sizing of the proposed converter are investigated using a generic case. Simulation and experimental results are used to verify the effectiveness of the proposed approach. [ABSTRACT FROM AUTHOR]

The semicontrolled open-winding PMSG system has been widely investigated due to its simplified topology and easy control implementation. Nevertheless, compared with the conventional controllable converter structure, the current zero crossing phenomenon will last a longer time in the semicontrolled configuration, which is determined by the phase displacement between voltage and current. Since a long current zero crossing duration will lead to voltage pulse disturbance, serious electromagnetic interference, and output power fluctuation, it is necessary to reduce the zero crossing duration to improve the open-winding PMSG performance. This paper gives a detailed analysis on the zero crossing phenomenon of the semicontrolled open-winding PMSG system in the 3-D space vector modulation perspective. Meanwhile, a third harmonic injection method is suggested to reduce the zero crossing duration. It is also demonstrated that the torque and power pulsation are effectively improved, while the zero-sequence current amplitude does not increase. A proportional resonant controller is used to regulate the desired zero-sequence current. The proposed method is validated in a 1-kW semicontrolled open-winding PMSG experimental system with id = 0 control method. [ABSTRACT FROM AUTHOR]

In this paper, a built-in voltage gain extension cell is proposed to give a universal topology derivation on next-generation high step-up converters for large voltage gain conversion systems. Several improved single-switch high step-up converters with built-in transformer voltage multiplier cell are derived with some advantageous performance, which includes extremely large voltage conversion ratio, minimized power device voltage stress, effective diode reverse-recovery alleviation, and soft-switching operation. The turns ratio of the built-in transformer can be employed as another design freedom to extend the voltage gain, which shows great design flexibility. Compared with their active clamp counterpart, only one MOSFET is required to simplify the circuit configuration and improve the system reliability. The over resonance frequency and the below resonance frequency operation modes are studied to explore the circuit performance, and the key parameter design criterion is provided to show a valuable guidance for future industrial applications. Finally, the experimental results from a 500 W 36-380 V prototype are provided to validate the effectiveness of the main contributions in this paper. [ABSTRACT FROM AUTHOR]

A novel flying-capacitor-clamped five-level inverter based on bridge modular switched-capacitor topology is proposed in this paper. The inverter features the switched-capacitor circuit with dc–dc boosting conversion ability and the multilevel inverter circuit with flying-capacitor-clamped performance. With the special composite structure, the number of components is cut down compared to the topology of the conventional cascaded multilevel inverter. Meanwhile, part of switches can be operated under line voltage frequency, resulting in switching loss reduction. Hence, the potential of system efficiency and power density is released due to embed switched-capacitor circuit. More importantly, the optimized carrier-based phase disposition pulse width modulation method is employed as a control strategy. Under this control strategy, the capacitor voltage self-balance can be realized and quality of output waveforms can be improved significantly. After simulation, the prototype is built to validate the correctness and practicability of the analysis. [ABSTRACT FROM AUTHOR]

This paper presents a closed-loop space vector modulation (SVM)-based sliding mode controller (SMC) for a three-level grid-connected neutral point clamped (3L-NPC) inverter. The nonlinear SMC based on Gao's reaching law has been designed to control the grid current and inject desired amount of active and reactive power into the network. Due to using single dc source at the NPC inverter dc bus, neutral point voltage is controlled through redundant switching states and instantaneous dc voltage feedback integrated into SVM technique. Meanwhile, there is no external voltage controller involved, thus no associated fine tuning issues are existed. The performance of the proposed hybrid controller to inject a desired active/reactive power to the grid is investigated through external perturbations such as change in the line current amplitude/phase shift, ac voltage fluctuation, as well as dc voltage variation. Full converter state-space model was developed and simulated. Experimental results are provided to verify the fast dynamic performance, low content of line current THD%, and good voltage balancing of dc bus capacitors of the NPC inverter. [ABSTRACT FROM AUTHOR]

To enhance the power quality in the medium/high-voltage distribution power systems, a single-phase unified power quality conditioner (UPQC) based on the modular multilevel matrix converter (M3C) is presented in this paper. The M3C-UPQC is comprised of four identical multilevel converter arms and associated filtering inductors. According to the established equivalent circuit of M3C-UPQC, its operation principle and power balance of each arm are analyzed theoretically, and the parameters’ design for the arm inductance as well as submodule capacitance is studied. Then, an integrated control method for M3C-UPQC in which the dc circulating current is used to balance the instantaneous active power of each arm is proposed to prevent the capacitor voltages from divergence inter- and intra-arms, so as to achieve voltages balance of M3C-UPQC. Finally, the effectiveness of the proposed control method is verified by a prototype rated at 8 kVA. [ABSTRACT FROM AUTHOR]

Differential-mode buck-boost inverters have merits such as reduced switch number, ability to provide voltages higher or lower than the input voltage magnitude, improved efficiency, reduced cost and size, and increased power density, especially in low-power applications. There are five buck-boost inverters that can provide flexible output voltage without the need of a large electrolytic input side capacitor, which degrades the reliability of inverters. The continuous input current of these inverters is appropriate for maximum power point tracking operation in photovoltaic and fuel cells applications. Three of the five inverters can be isolated with high-frequency-link transformers where the common-mode leakage current can be mitigated. However, the performance and control of such converters have not been discussed in detail. In this paper, the five possible single-stage three-phase differential-mode buck-boost inverters with continuous input current are investigated and compared in terms of total losses, maximum ripple current, total harmonic distortion, and device and passive element ratings. In addition, the possible methods are presented for eliminating the input third-order harmonic current, resulting from the stored energy in the passive elements, as well as the output second-order harmonic currents. The ability for isolating the input and output sides of the inverters with a small–high frequency transformers is discussed. A changeable-terminal 2.5-kW bidirectional inverter is used to validate the design flexibility of the inverter topologies, when digital signal processor-controlled. [ABSTRACT FROM AUTHOR]

In this paper, a novel topology of six-level inverters for a medium-voltage high-power applications is proposed, which consists of inner flying-capacitor inverter (FCI) units and outer two-level inverter units. The proposed topology can reduce the number of devices, components, and isolated sources compared with the existing ones in the case of the same number of output voltage steps, which result in a reduction of the size and weight of the inverters. Also, the total power loss of the proposed topology is lower than that of the diode-clamped inverter (DCI) and FCI. Besides, the estimated cost of the proposed topology is about 60.5% and 81.3% compared with the DCI and FCI, respectively. In addition, the modulation technique and the control strategy for the dc-link capacitor and flying-capacitor voltages are developed for the proposed topology. The effectiveness of the proposed six-level inverter for the medium-voltage applications has been verified by simulation results. Also, the feasibility of the proposed inverter has been proved by experimental results for the prototype at the laboratory. [ABSTRACT FROM AUTHOR]

This paper presents a finite-control-set model predictive control (FCS-MPC) for grid-tied packed U cells (PUC) multilevel inverter (MLI). The system under study consists of a single-phase 3-cells PUC inverter connected to the grid through filtering inductor. The proposed competitive topology allows the generation of 7-level output voltage with reduction of passive and active components compared to the conventional MLIs. The aim of the proposed FCS-MPC technique is to achieve, under various operating conditions, grid-tied current injection with unity power factor and low total harmonic distortion while balancing the capacitor voltage. Parameters’ sensitivity analysis was also conducted. The study is conducted on a low-power case study single-phase 3-cells PUC inverter and with possible extension to higher number of cells. Theoretical analysis, simulation, and experimental results are presented and compared. [ABSTRACT FROM AUTHOR]

In this paper, a novel cascaded seven-level inverter topology with a single input source integrating switched-capacitor techniques is presented. Compared with the traditional cascade multilevel inverter, the proposed topology replaces all the separate dc sources with capacitors, leaving only one H-bridge cell with a real dc voltage source and only adds two charging switches. The capacitor charging circuit contains only power switches, so that the capacitor charging time is independent of the load. The capacitor voltage can be controlled at a desired level without complex voltage control algorithm and only use the most common carrier phase-shifted sinusoidal pulse width modulation strategy. The operation principle and the charging–discharging characteristic analysis are discussed in detail. A 1-kW experimental prototype is built and tested to verify the feasibility and effectiveness of the proposed topology. [ABSTRACT FROM AUTHOR]

This paper presents an analytical and experimental comparison of a two-phase buck converter and a two-phase, series capacitor buck converter. The limitations of a conventional buck converter in high-current (10 A or more), and high-frequency (HF, 3–30 MHz) point-of-load voltage regulators with large voltage conversion ratios (10-to-1) are highlighted. The series capacitor buck converter exhibits desirable characteristics at HF, including lower switching loss, less inductor current ripple, automatic phase current balancing, duty ratio extension, and soft charging of the energy transfer capacitor. Analysis of the topologies indicates that switching loss and inductor core loss can dominate at HF. Results from side-by-side 12 V input, 1.2 V output hardware prototypes demonstrate that the series capacitor buck converter has up to 12 percentage points higher efficiency at 3 MHz and reduces power loss by up to 33% at full load (10 A). Some guidelines for inductor selection are provided, and a switch stress comparison reveals that the maximum converter switch stress is reduced by 30%. [ABSTRACT FROM AUTHOR]

The extended commutation cell is a four-port four-switch cell that allows for bidirectional energy transport in two orthogonal directions throughout the cell. By cascading multiple cells, a multilevel converter can be constructed with a high number of levels. The voltage across each cell capacitor can be adjusted independently of the load, resulting in high flexibility in output levels. This paper presents an improved method for capacitor voltage control, based on a system model and the measured output current. The proposed method is analyzed and verified on a 4.4\text-\mathrmk\mathrmW eight-level dc–ac converter. The obtained reduction in capacitor voltage ripple is more than $75\%$. [ABSTRACT FROM AUTHOR]

This paper presents a new family of buck type power factor corrector rectifiers that operates in continuous-conduction mode (CCM) and generates a multilevel voltage waveform at the input. Due to CCM operation, commonly used ac-side capacitive filter and dc-side inductive filter are removed from the proposed modified packed U-cell rectifier structure. Dual dc output terminals are provided to have a five-level voltage waveform at the input points of the rectifier where it is supplied by a grid via a line inductor. Producing different voltage levels reduces the voltage harmonics which affects the grid current harmonic contents directly. Low switching frequency of the proposed rectifier is a distinguished characteristic among other buck type rectifiers that reduces switching losses and any high switching frequency related issues, significantly. The proposed transformerless, reduced filter, and multilevel rectifier topology has been investigated experimentally to validate the good dynamic performance in generating and regulating dual 125-V dc outputs terminals as telecommunication boards feeders or industrial battery chargers under various situation including change in the loads and change in the main grid voltage amplitude. [ABSTRACT FROM PUBLISHER]

The flying-capacitor-based multilevel converter is one of the well-known breeds of the multilevel power converters. This paper proposes a new flying-capacitor-based multilevel converter to minimize the number of flying capacitors (FCs) and power switches. The advantage of the proposed FC-based multilevel converter in comparison with the conventional flying-capacitor multicell converter is that it needs fewer FCs. Also, in comparison with the stacked multicell converter, the proposed multilevel converter requires fewer semiconductor switches. In order to balance the voltage of the FCs in proposed multilevel converter, a new active voltage balancing method which is fully implemented using logic-form equations is presented. The proposed voltage balancing method measures output current and FC voltages to generate switching states to produce the required output voltage level, as well as balance the FCs voltages at their reference values. The output voltage of the proposed multilevel converter controlled with suggested active voltage balancing method can be modulated with any pulse-width-modulation (PWM) method, such as phase-shifted-carrier PWM or level-shifted-carrier PWM. Simulation results and experimental measurements of proposed FC-based multilevel converter are presented to verify the performance of the proposed converter, and its novel switching and modulation strategy, which is based on the active voltage balancing method. [ABSTRACT FROM PUBLISHER]

Hardware-in-the-Loop tests of components for high-voltage dc transmission grids, for example circuit breakers, require converter systems capable of generating a high output current with fast transients of the output signal at different output voltages. In this paper, a three-level buck converter (N3L) employing three different supply voltages to enable a wide voltage operation range is presented. The modulation of the converter is investigated in detail with special focus on ripple cancellation, the startup of the interleaved converter and the level shifting between different converter output voltages. A prototype system is designed and constructed, optimized for pulsed power operation and compared to a two level and to a neutral point clamped converter design. The system has been simulated numerically and the design boundaries are validated by measurements on the prototype system. [ABSTRACT FROM AUTHOR]

A single-stage, bidirectional, current-source converter (CSC) topology to interface a dc microgrid with an ac grid is reported in the literature. In this topology, under a balanced grid voltage condition, the dc-link inductor current can be regulated over a wide range—from zero to rated value—while the ac-side current has low harmonic distortion. However, unbalanced grid voltages result in second-harmonic pulsation in the current and power on the dc side of the converter. In addition, the ac-side currents will be unbalanced due to the presence of a negative-sequence component. This would result in undesired tripping of the converter if one of the phase currents exceeded its rated value. Various control loop structures for the operation of voltage-source converter under unbalanced grid voltage conditions are reported in the literature. However, use of similar control loop structures for CSC may lead to unstable operation. Therefore, a control scheme to inject balanced three-phase currents into the ac grid under an unbalanced grid voltage condition is proposed in this paper. The stability of the proposed control scheme is studied using a small-signal model of the converter. Performance of the proposed control scheme is studied using MATLAB/Simulink and is experimentally validated. [ABSTRACT FROM AUTHOR]

For cascaded multilevel inverter topologies with a single dc supply, closed-loop capacitor voltage control is necessary for proper operation. This paper presents zero and reduced common-mode voltage (CMV) operation of a hybrid cascaded multilevel inverter with predictive capacitor voltage control. Each phase of the inverter is realized by cascading two- three-level flying capacitor inverters with a half-bridge module in between. For the presented inverter topology, there are redundant switching states for each inverter voltage levels. By using these switching state redundancies, for every sampling instant, a cost function is evaluated based on the predicted capacitor voltages for each phase. The switching state that minimizes cost function is treated as the best and is switched for that sampling instant. The inverter operates with zero CMV for a modulation index upto 86%. For modulation indices from 86% to 96%, the inverter can operate with reduced CMV magnitude (Vdc/18) and reduced CMV switching frequency using the new space-vector pulsewidth modulation (SVPWM) presented herein. As a result, the linear modulation range is increased to 96% as compared to 86% for zero CMV operation. Simulation and experimental results are presented for the inverter topology for various steady state and transient operating conditions by running an induction motor drive with open loop $V/f$ control scheme. [ABSTRACT FROM PUBLISHER]

This paper proposes a new fault ride-through (FRT) configuration for a fixed-speed induction generator-based–wind turbine (FSIG–WT). It utilizes a nine-switch converter (NSC) to enable shunt and series compensation in response to the system dynamics and grid faults. The steady-state control strategy and transient-management scheme are developed to ensure proper performance in steady-state, dynamic operation as well as enhanced FRT capability of the FSIG–WT. In addition to that, the developed control strategy tackles the balanced and unbalanced operation of the electric grid with an enhanced positive- and negative-sequence compensation control scheme. The recently reported grid synchronization scheme, namely, the frequency-locked loop (FLL) is implemented to achieve fast phase detection and transient response. Consequently, the performance of the FLL has been compared with the multiple reference–frame–phase-locked loop (MRF–PLL) to demonstrate its superior performance for enhancing transient response. The proposed topology, FLL, and control strategies are verified through a comprehensive simulation study to demonstrate the enhancement of the transient response and FRT capability of FSIG-WT in adherence to grid-code requirements. [ABSTRACT FROM PUBLISHER]