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A sensor circuit to measure the output power of a dc–dc boost for photo-voltaic (PV) maximum power point tracking (MPPT) application is presented. The proposed approach obviates the need for a series current sense resistor and a complex current/voltage digitization and multiplication circuitry required for calculating power. Thereby, this technique does not require analog multipliers, analog-to-digital converters, digital signal processor, and FPGA, thus reducing the bill of material, silicon area, and power consumption of the overall system. Additionally, it provides the dc electrical isolation between the high output voltage of the boost converter and the low-voltage integrated CMOS power sensor circuit. The proposed power sensor circuit is implemented using a switched capacitor differentiator and a voltage-to-time converter. This approach results in lower complexity, lower silicon area, lower power consumption, and lower component count for the overall PV MPPT system. Designed in a 180-nm CMOS process, the circuit can operate with a supply voltage of 1.8 V. It achieves a power sense accuracy of 7.6%, occupies a die area of 0.0519 mm2, and consumes a power of 0.748 mW. [ABSTRACT FROM AUTHOR]

A built-in self-test (BIST) technique that enables tracking of loop parameters of integrated DC–DC converters without affecting the normal mode of operation is presented. A digital pseudo-noise based stimulus and a mixed signal cross-correlation based analysis technique is used to derive on-chip impulse response, with minimum computational requirements in comparison to a digital correlator approach. Using measured impulse response, open-loop phase margin and closed-loop unity-gain frequency are estimated within 5.2% and 4.1% error, respectively, for the load current range of 30 mA to 200 mA. Converter parameters, such as natural frequency, Q -factor, and center frequency are estimated within 3.6%, 4.7%, and 3.8% error, respectively, over load inductance of 4.7 \mu \text{H} to 10.3 \mu \text{H} , and filter capacitance of 200 nF to 400 nF. A 5 MHz switching frequency, 5 V to 8.125 V input voltage range, voltage-mode controlled DC-DC buck converter is designed for the proposed model reference based parametric and non-parametric BIST analysis. The converter output voltage range is 3.3 V to 5 V and supported maximum load current is 450 mA with a peak efficiency of 87.93%. The proposed converter is fabricated on a 0.6 \mu \textm 6 layer-metal SOI technology with a die area of 9 mm2. The system identification circuitry occupies 3.8% of the converter area with 530 \mu \textA quiescent current during operation. [ABSTRACT FROM PUBLISHER]