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Ensuring service continuity in safety critical applications is crucial. In some of these applications, multilevel converters play a vital role. In this regard, this research work presents a self-healing fault-tolerant control approach to ensure the resiliency of a neutral-point clamped converter when a semiconductor component encounters an open circuit fault. The defective semiconductor can be a power switch or a clamping diode. By applying the proposed real-time fault-tolerance control, the rated output voltage and output current are restored during post-fault operation. Furthermore, the total harmonic distortion value of the output voltage during application of the real time self-healing control does not increase when compared with that during healthy operation. Since the realization of the proposed control strategy does not require any bidirectional switch, a fast transition between the healthy and fault-tolerant operation is accomplished. Moreover, the proposed structure can ensure service continuity in case of a fault event in the anti-parallel diodes, something which has been overlooked in previously conducted research works. [ABSTRACT FROM AUTHOR]

Multilevel inverters are increasingly used in industrial applications in which service continuity is crucial. This paper presents an original approach to ensure the fault-tolerant operation of neutral-point-clamped (NPC) inverters in the case of an open-circuit fault event in a clamping diode, which is rarely investigated in the conducted research work. The proposed fault-tolerant strategy meets the following criteria: restoring rated output voltage and current during post-fault operation, realizing fault-tolerant operation without additional components, maintaining rated total harmonic distortion (THD) during fault-tolerant operation, and fast transition between faulty operation and remedial operation. In the proposed approach, prior to applying the appropriate remedial action, identification of the defective clamping diode is required. In this respect, a very fast and simple logic-based fault diagnosis is presented whose implementation does not need any additional components and external circuit. Moreover, it does not require any component modeling and complicated calculations. The proposed strategy is validated by simulation and experimentation. [ABSTRACT FROM AUTHOR]

This paper discusses the design, implementation, experimental validation, and performances of a field-programmable gate array (FPGA)-based real-time power converter failure diagnosis for three-leg fault tolerant converter topologies used in wind energy conversion systems (WECSs). The developed approach t minimizes the time interval between the fault occurrence and its diagnosis. We demonstrated the possibility to detect a faulty switch in less than 10 [micro]s by using a diagnosis simultaneously based on a 'time criterion' and a 'voltage criterion.' To attain such a short detection time, an FPGA fully digital implementation is used. The performances of the proposed FPGA-based fault detection method are evaluated for a new fault tolerant back-to-back converter topology suited for WECS with doubly fed induction generator (DFIG). We examine the failure diagnosis method and the response of the WECS when one of the power switches of the fault tolerant back-to-back converter is faulty. The experimental failure diagnosis implementation based on 'FPGA in the loop' hardware prototyping verifies the performances of the fault tolerant WECS with DFIG. Index Terms--Diagnosis, fault tolerant, field-programmable gate array (FPGA), wind energy conversion system (WECS).

The fault diagnosis in multilevel converters is of great importance since they are comprised of more solid-state switches, compared with the conventional two-level converters. In this article, we propose a fast and efficient real-time fault detection and faulty component identification for an open-switch fault diagnosis based on the failure-mode algorithm for a single-phase five-level neutral-point-clamped inverter. Component modeling, complicated calculations, and load parameters are not required for realizing the proposed approach. Furthermore, the proposed strategy does not require any extra sensors. The signals already available in the control system, such as the applied switching pattern and terminal voltage, fulfill the fault diagnosis. Thanks to the proposed fault detection strategy, any misdiagnosis arising from noise existence, response time of the sensors, turn on and turn off delay times of the power switches, and measurement errors are avoided. The simulations and experiments are carried out to confirm the performance and effectiveness of the presented strategy. [ABSTRACT FROM AUTHOR]

In photovoltaic systems, dc–dc converters have been identified as one of the most critical and challenging subsystem in terms of failure rate. Thus, this paper proposes fault-tolerant operation of a two-stage buck/buck–boost converter under open-circuit switch failure. Remedial actions are efficient in any failure of one of the two switches of the converter. Here, a new unified approach is considered, for the overall fault-tolerant operation of the two stages of the converter. The fault-tolerant circuit we propose lies on performing redundancy by implementing the equivalent synchronous switch for the two main switches of the two stages, in offline mode. The fault-tolerant circuit results from the basic two-stage buck/buck-boost converter and its equivalent circuit with a synchronous switch, merged together to form the new dc–dc fault-tolerant circuit. Therefore, postfault operation at full power can also be performed. By using a switch fault management unit with reduced complexity, inserted between the control block and the switches, we have designed an unified, efficient, and optimized fault-tolerant control, suitable in both healthy and postfault operations. Some selected experimental tests, which all confirm the good performances of the proposed fault-tolerant approach, are presented and discussed. [ABSTRACT FROM AUTHOR]

Therefore, Konstantinou et al. [[4]] intended to design a TEG system that produced the maximum power possible using the exhaust gases of a maritime internal combustion engine. Waste heat present in exhaust gas produced from various industrial processes or internal combustion engines in transport are a reservoir of untapped energy. According to Sousa et al. [[2]], to maximize the exploitation of the TEG, the operation should take place at a uniform temperature near the temperature limit of the TEG. [Extracted from the article]

Energy harvesting has become a promising and alternative solution to conventional energy generation patterns to overcome the problem of supplying autonomous electrical systems. More particularly, thermal energy harvesting technologies have drawn a major interest in both research and industry. Thermoelectric Generators (TEGs) can be used in two different operating conditions, under constant temperature gradient or constant heat flow. The commonly used TEG electrical model, based on a voltage source in series with an electrical resistance, shows its limitations especially under constant heat flow conditions. Here, the analytical electrical modeling, taking into consideration the internal and contact thermal resistances of a TEG under constant temperature gradient and constant heat flow conditions, is first given. To give further insight into the electrical behavior of a TEG module in different operating conditions, we propose a new and original way of emulating the above analytical expressions with usual electronics components (voltage source, resistors, diode), whose values are determined with the TEG's parameters. Note that such a TEG emulation is particularly suited when designing the electronic circuitry commonly associated to the TEG, to realize both Maximum Power Point Tracking and output voltage regulation. First, the proposed equivalent electrical circuits are validated through simulation with a SPICE environment in static operating conditions using only one value of either temperature gradient or heat flow. Then, they are also analyzed in dynamic operating conditions where both temperature gradient and heat flow are considered as time-varying functions. [ABSTRACT FROM AUTHOR]

As an industry consumer of electric power, an electric arc furnace (EAF) is a major voltage flicker source that causes significant power-quality (PQ) problems. The fast response of the static synchronous compensator (STATCOM) makes it an efficient solution for improving PQ in distribution systems facing this kind of very nonlinear load. In this study, for voltage flicker mitigation of a 100-MVA EAF installed in Europe, a voltage-source-converter (VSC)-based STATCOM with high bandwidth is designed. The STATCOM's current reference includes both active and reactive current components. The performance of the STATCOM in voltage flicker mitigation is highly improved by applying this control strategy which uses the dc voltage margin of the VSC to provide for an active compensating current without oversizing the STATCOM converters capacitor. In this paper, first, the proposed STATCOM is studied through a generalized steady-state analysis. Second, the STATCOM's control strategies for voltage flicker mitigation are introduced and simulation results are provided and compared. Finally the complete model is validated by field tests over a 60-MVAr industrial STATCOM. Static and dynamic performance of the STATCOM is evaluated and voltage fluctuation mitigation studies are performed and discussed. The voltage flicker mitigation is evaluated through onsite measurements respecting international standards. [ABSTRACT FROM PUBLISHER]

The increased penetration of photovoltaic (PV) systems in different applications with critical loads such as in medical applications, industrial control systems, and telecommunications has highlighted pressing needs to address reliability and service continuity. Recently, distributed maximum power point tracking architectures, based on dc–dc converters, are being used increasingly in PV systems. Nevertheless, dc–dc converters are one of the important failure sources in a PV system. Since the semiconductor switches are one of the most critical elements in these converters, a fast switch fault detection method (FDM) is a mandatory step to guarantee the service continuity of these systems. This paper proposes a very fast FDM based on the shape of the inductor current associated to fault-tolerant (FT) operation for boost converter used in PV systems. By implementing fault diagnosis and reconfiguration strategies on a single field-programmable gate array target, both types of switch failure (open- and short-circuit faults) can be detected, identified and handled in real time. The FDM uses the signal provided by the current sensor dedicated to the control of the system. Consequently, no additional sensor is required. The proposed FT topology is based on a redundant switch. The results of hardware-in-the-loop and experimental tests, which all confirm the excellent performances of the proposed approach, are presented and discussed. The obtained results show that a switch fault can be detected in less than one switching period, typically around 100 ms in medium power applications, by the proposed FDM. [ABSTRACT FROM PUBLISHER]

Fault detection (FD) in power electronic converters is necessary in embedded and safety critical applications to prevent further damage. Fast FD is a mandatory step in order to make a suitable response to a fault in one of the semiconductor devices. The aim of this study is to present a fast yet robust method for fault diagnosis in nonisolated dc–dc converters. FD is based on time and current criteria which observe the slope of the inductor current over the time. It is realized by using a hybrid structure via coordinated operation of two FD subsystems that work in parallel. No additional sensors, which increase system cost and reduce reliability, are required for this detection method. For validation, computer simulations are first carried out. The proposed detection scheme is validated on a boost converter. Effects of input disturbances and the closed-loop control are also considered. In the experimental setup, a field programmable gate array digital target is used for the implementation of the proposed method, to perform a very fast switch FD. Results show that, with the presented method, FD is robust and can be done in a few microseconds. [ABSTRACT FROM PUBLISHER]

In this paper, an FPGA-based fault-tolerant back-to-back converter without redundancy is studied. Before fault occurrence, the fault-tolerant converter operates like a conventional back-to-back six-leg converter, and after the fault, it becomes a five-leg converter. Design, implementation, and experimental verification of an FPGA-based reconfigurable control strategy for this converter are discussed. This reconfigurable control strategy allows the continuous operation of the converter with minimum affection from a fault in one of the semiconductor switches. A very fast detection scheme is used to detect and locate the fault. Implementation of the fault detection and of the fully digital control schemes on a single FPGA is realized, based on a suited methodology for rapid prototyping. FPGA in loop and also experimental tests are carried out, and the results are presented. These results confirm the capability of the proposed reconfigurable control and fault-tolerant structure. [ABSTRACT FROM PUBLISHER]

Fast fault detection and reconfiguration of power converters is necessary in electrical drives to prevent further damage and to make the continuity of service possible. On the other hand, component minimized converters may provide the benefits of higher reliability and less volume and cost. In this paper, a new fault-tolerant converter topology is studied. This converter has five legs before the fault occurrence, and after fault detection the converter continues to function with four legs. A very fast fault detection and reconfiguration scheme is presented and studied. Simulations and experimental tests are performed to evaluate the structure requirements, the digital reconfigurable controller, and fault detection scheme. For experimental tests, the control and the fault detection and reconfiguration schemes are implemented on a single field-programmable gate array (FPGA) chip. Experimental and simulation results show the effectiveness of the proposed fault-tolerant topology and its FPGA-based control. [ABSTRACT FROM PUBLISHER]

Power-electronics-based hybrid dc power systems (HDCPSs) are increasingly used in many industrial applications such as land, sea, and air vehicles. In these systems, small dc-link and LC filter capacitors are of great interest for weight saving. Usually, in HDCPSs, there are constant power loads and negative dynamic impedance of these loads may generate unstable oscillations. Besides, the risk of resonance may be increased under unbalanced load conditions. In this paper, a distributed active oscillation suppression approach is presented. It is based on the analytical study of the linearized model of the studied system around the operating point. The studied system consists of one main dc source and one storage element supplying two loads: a permanent magnet synchronous motor connected to the dc link by a voltage source inverter and a resistive load supplied by a dc/dc converter through the same dc bus. The proposed approach is particularly used to overcome the resonance under unbalanced load conditions and allows reducing dc link and LC filter capacitors for weight saving. Simulations and experimentations are carried out which confirm the validity of the proposed approach. [ABSTRACT FROM AUTHOR]

In order to prevent further damage and to provide the continuity of service of six-leg converter in case of open-switch fault, it is mandatory to perform fast fault detection and converter reconfiguration schemes. Extra sensors are needed to detect the faults rapidly. In this paper, a very fast FPGA-based fault detection scheme is presented that minimizes the number of additional voltage sensors. A six-leg fault tolerant converter topology without redundancy and with bidirectional power flow is studied. First simulations are carried out to evaluate the proposed fault detection principle and the fault tolerant converter topology. The fully digital control and the fault detection are implemented on a single FPGA. Experimental tests of the digital controller and the detection scheme are performed to verify the high performance of the proposed method. [ABSTRACT FROM AUTHOR]

This paper presents a top-down design flow for design, implementation, and verification of digital controllers associated with electrical systems. In the proposed design flow, the functional description of the studied system and the detailed electronic hardware design and validation of the digital controller are performed using a hardware-in-the-loop (HIL)-based reconfigurable platform in a unique design environment. The way of using this design flow and the reconfigurable HIL platform is analyzed through a fault-tolerant shunt active power filter application. The experimental results obtained with a laboratory prototype fault-tolerant active filter demonstrate the performances and the efficiency of the proposed design flow and HIL-based reconfigurable platform. [ABSTRACT FROM AUTHOR]

Abstract: In this paper, a new reference current computation method suitable for shunt active power filter control under distorted voltage conditions is proposed. The active power filter control is based on the use of self-tuning filters (STF) for the reference current generation and on a modulated hysteresis current controller. This active filter is intended for harmonic compensation of a diode rectifier feeding a RL load under distorted voltage conditions. The study of the active filter control is divided in two parts. The first one deals with the harmonic isolator which generates the harmonic reference currents and is experimentally implemented in a DS1104 card of a DSPACE prototyping system. The second part focuses on the generation of the switching pattern of the inverter by using a modulated hysteresis current controller, implemented in an analogue card. The use of STF instead of classical extraction filters allows extracting directly the voltage and current fundamental components in the α–β axis without phase locked loop (PLL). The performances are good even under distorted voltage conditions. First, the effectiveness of the new proposed method is mathematically studied and verified by computer simulation. Then, experimental results are presented using a DSPACE system associated with the analogue current controller for a real shunt active power filter. [Copyright &y& Elsevier]

The performances of conventional shunt active power filters heavily depend on accurate active filter current sensing. A sudden failure in one of the active filter current sensors decreases the filter performances. Moreover, if the fault is not detected and compensated for quickly, its effect leads to disconnection or hard failure of the active filter. Hence, to reduce the failure rate and to prevent unscheduled shutdown, a real-time fault detection, isolation and compensation scheme could be adopted. This article introduces a new fast and robust current sensor fault detection and compensation method for three-phase shunt active power filters. The proposed current sensor fault detection is achieved with a predictive model associated with a logical decision. The satisfactory performances obtained by experimental 'FPGA in the loop' prototyping validate the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]