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In this article, the impact of the graded AlGaN back barrier and Fe\C co-doping buffer structure on the AlGaN $/$ GaN high electron mobility transistors (HEMTs) is proposed and systematically investigated. Due to effective suppression of Fe tail in unintentionally doped GaN (uid-GaN) layer by the insertion of the thick graded AlGaN back barrier layer, a large maximum drain current density and a transconductance peak are achieved. Meanwhile, the breakdown voltage is significantly improved by the use of Fe\C co-doping GaN buffer design. More importantly, it is revealed that the graded-AlGaN design can reduce the range and intensity of the electrical potential distribution in uid-GaN layer and then effectively suppress the acceptor-induced trapping\detrapping effect under high drain voltage. The RF small-signal performance of Fe-doped GaN (GaN:Fe)\C co-doping buffer HEMT exhibits significant improvement. In addition, load-pull measurement at 8 GHz revealed that a saturation power increases from 38.04 to 41.07 dB, a power gain increases from 9.06 to 10.58 dB, and an associate power-added-efficiency (PAE) increased from 40.27% to 50.18%. Our proposed GaN-based epitaxial structure can not only suppress the gate lag by reduce AlGaN surface electric field, but it can also suppress the drain lag by reduce the amplitude and range of potential distribution. It indicates that our proposed device has great potential for future high-voltage RF power amplifier application. [ABSTRACT FROM AUTHOR]

A hybrid Schottky–ohmic drain technology for millimeter-wave (mmW) AlGaN/GaN high-electron-mobility transistors (HEMTs) is proposed. The Schottky metal extension in the ohmic region of drain reduces the actual source–drain spacing, resulting in a smaller ON-resistance and a higher maximum current. Extended Schottky metal in the drain region modulates the electric-field distribution, thereby leading to an improved breakdown voltage, suppressed current collapse, and high reliability. Compared with the ohmic drain, the current gain cutoff frequency (${f}_{T}$) was improved from 64 to 76 GHz, and the maximum oscillation frequency (${f}_{\text {max}}$) was improved from 125 to 157 GHz, resulting from the decreased parasitic drain resistance (${R}_{d}$). Moreover, large-signal measurements in continuous wave (CW) at 30 GHz demonstrated a peak power-added efficiency (PAE) of 45.5% and a saturated output power density (${P}_{\text {sat}}$) of 8.5 W/mm at ${V}_{\text {ds}}= {30}$ V. In addition, the direct current (DC) and radio frequency (RF) characteristics showed a negligible degradation after large-signal measurements at 30 GHz. [ABSTRACT FROM AUTHOR]

AlGaN/GaN high-electron-mobility transistors (HEMTs) with Si-rich SiN/Si3N4 bilayer passivation were studied in this article. The use of a Si-rich SiN interlayer leads to improved channel transport property, current collapse, power performance, and temperature-dependent stability. Devices without Si-rich SiN interlayer passivation exhibit an increase in the gate leakage current by over three orders of magnitudes with temperature increasing from 300 to 420 K, leading to an increase in a current collapse from 9.7% to 24.7%, while the devices with Si-rich SiN passivation exhibit a weak temperature dependence of leakage current and a constant current collapse about 5%. Small signal characterization shows that Si-rich SiN passivation results in a remarkable decrease in the effective gate length by ~15% with temperature up to 420 K. At 17 GHz, devices with Si-rich SiN interlayer passivation exhibit an output power density of 7 W/mm and a peak power-added efficiency (PAE) of 56%. The improved power performance of devices using Si-rich SiN interlayer passivation is attributed to the suppressed current collapse and superior device stability under high channel temperature. [ABSTRACT FROM AUTHOR]

This work reports recent progress in the sub-6 GHz power performance of GaN-based HEMTs grown on high resistivity silicon substrates with passivation implanted termination (PIT) process. Thanks to the mitigated electric field crowding at the gate edge and the suppressed negative fixed charge-induced carrier depletion, the fabricated HEMTs demonstrate a low leakage current, a high ON/OFF current ratio of 108, and improved breakdown voltage associated with a current collapse at 40 V drain quiescent condition of as low as 5.6%. S-band continuous-wave large signal measurements yield a high power-added efficiency (PAE) of 69%, a drain efficiency (DE) of 72%, and an output power density (${P}_{\text{out}}$) of 7.2 W/mm at ${V}_{\text{DS}}=30$ V. Moreover, the transistor delivers a maximum ${P}_{\text{out}}$ up to 10.2 W/mm with a peak PAE of 63.8% at ${V}_{\text{DS}}=40$ V. The PAE and ${P}_{\text{out}}$ as a function of drain bias indicate that the transistors remain constant high PAE and linearly increased ${P}_{\text{out}}$ over a wide range of drain voltage variation. These excellent results have demonstrated the PIT process could be an attractive technique to facilitate the application of high-performance and cost-competitive GaN-on-Si HEMTs for 5G wireless base stations. [ABSTRACT FROM AUTHOR]

The submicrometer gate HEMT is fabricated with an ultrathin-barrier (UTB) AlGaN/gallium nitride (GaN) combined with in situ SiN passivation. The sheet resistance of the UTB Al0.2Ga0.8N (4 nm)/GaN heterostructure is effectively reduced by the SiNx passivation layer grown by metal organic chemical vapor deposition (MOCVD), from 6500 to $312~ \Omega $ /⬜. With the 20-nm stress-engineered in situ SiN, the device not only provides a large output current of 1.05 A/mm but also demonstrates promising potential on the RF applications, which gives AlGaN material two records high cutoff frequency ${f} _{\text {T}}/{f} _{\text {max}}$ of 157 GHz/334 GHz for 100-nm gated device and 211 GHz/379 GHz for 70-nm gated device. During the continuous wave (CW) power measurement at 30 GHz, the 70-nm devices exhibit a large output power of 4.6 W/mm associated with a peak power-added efficiency (PAE) of 48.1% and a gain of 11.6 dB (${V} _{\text {ds}} =20$ V), and a high PAE of 53.8% with an output power density of 1.9 W/mm and a gain of 10.8 dB (${V} _{\text {ds}} =10$ V), respectively. The huge potential of the UTB-AlGaN/GaN is demonstrated for high-frequency and large-output power applications when it is combined with the in situ SiN, which is necessary for future communication systems. [ABSTRACT FROM AUTHOR]

In this article, we report on the high dc and RF performance of AlGaN/GaN high electron mobility transistors that employ Ti/Au/Al/Ni/Au metallization stack with shallow trench etching ohmic contact (STEOC). An excellent ohmic contact performance including low contact resistance (${R}_{C}$) of $0.28~\Omega \cdot $ mm and smooth surface morphology have been achieved simultaneously. Atomic force microscope (AFM) reveals a highly smooth surface morphology with a root mean square (rms) roughness of 6.3 nm even after 810 °C high-temperature annealing (HTA), achieving an improvement of 79% as compared to the conventional Ti/Al/Ni/Au ohmic contact (COC). A high-resolution transmission electron microscope (HRTEM) showed a glossy morphology with a continuous and uniform TiN layer formed in the interface for the STEOC sample, while a bumpy morphology caused from the Ni-Al complexes balling up and TiN island penetrating into the AlGaN/GaN heterostructure were observed for the conventional sample. Consequently, the fabricated transistors with the STEOC process show a high output current of 1.52 A/mm and low ON-resistance (${R}_{ \mathrm{ ON}}$) of $2.09~\Omega $ mm. In addition, a high current cutoff frequency (${f}_{T}$) of 60 GHz and maximum oscillation frequency (${f}_{\text {max}}$) of 150 GHz were obtained for the STEOC HEMT with a gate length (${L}_{\text {g}}$) of 150 nm. Sub-6 GHz continuous-wave mode power sweep measurements deliver a high power-added-efficiency (PAE) of 67%. These results show the significant potential of the STEOC process to facilitate the development of GaN-based power amplifier (PA) applied for 5G. [ABSTRACT FROM AUTHOR]

In this article, the C – V curve shift, trap densities responsiveness, and dynamic RON of AlGaN/GaN/GaN:C (SH:C) and AlGaN/GaN/graded-AlGaN:Si/GaN:C (DH:Si/C) heterostructure Schottky barrier diodes (SBDs) have been systematically analyzed. Due to additional 3-D electrons in graded-AlGaN:Si layer, the composite 2-D–3-D channel of DH:Si/C has a higher carrier concentration. Reducing the OFF-state electric field strength through AlGaN:Si insert layer, a smaller positive shift of C – V curve is achieved under OFF-state stress. Due to the charge shielding effect of AlGaN:Si insert layer, trapping/detrapping effects in GaN:C buffer under the OFF-state stress are well suppressed. Compared with SH:C heterostructure, the trap density responsiveness of DH:Si/C heterostructure under OFF-state stress is significantly reduced. At the same time, trap density responsiveness of the upper channel is immune to OFF-state electric stress time. In addition, the proposed SBDs show lower ON-resistance with on reverse bias stress and better dynamic performance with on reverse stress time. [ABSTRACT FROM AUTHOR]

In order to further improve the electrical characteristics of AlGaN-buffer devices, we propose a new in situ SiN/AlGaN-sandwich-barrier (SWB)/GaN/Al0.05GaN high-electron mobility transistors (HEMTs). The dc, channel temperature, and RF temperature of the proposed AlGaN-buffer devices have been systematically studied and analyzed. The SWB structure can effectively reduce the peak value of the electric field, thus effectively reducing the self-heating effect and improving the breakdown characteristics. Through the channel temperature extraction method of pulsed IV and TCAD thermal simulation, the channel temperature of devices with different barrier structures is compared and analyzed, which proves that SWB structure can effectively reduce the channel temperature of devices. Due to the more obvious potential modulation effect between gate and drain, the ƒmax of device can improve more effectively with the increase of drain voltage. In addition, load-pull measurement at 10 GHz revealed that a saturated power density increased from 7.3 to 8.4 W/mm and an associated PAE increased from 24.9% to 29.4%. [ABSTRACT FROM AUTHOR]

The AlGaN/GaN high-electron mobility transistors (HEMTs) were irradiated with fast and thermal neutrons at various fluences. Output, transfer, and gate-leakage characteristics were analyzed in detail before and after irradiation. After irradiation by 14-MeV neutrons, the electrical characteristics of the devices gradually degraded as the fluence increased. After irradiation by thermal neutrons at a fluence of $2.12 \times 10^{16}$ cm−2, the electrical characteristics of devices significantly decreased. Neutrons are believed to introduce a negatively charged acceptorlike deep level in the AlGaN layer, which can deplete 2DEG in the channel, raise the energy band, and shift the threshold voltage to positive values. Such an enhanced barrier can significantly suppress the gate Schottky leakage current of AlGaN/GaN HEMTs in both the reverse and forward bias regions. After the thermal neutron radiation, the quality of Schottky contacts deteriorated significantly. [ABSTRACT FROM AUTHOR]

A high-linearity and high-gain AlGaN/GaN HEMTs with a 100-nm gate were demonstrated. The device employs transitional recessed gate (TRG) along the gate width for millimeter wave power application. The gradually changing gate recess depth was created using transitional dosed photoetching. Accurate etching ensured that the FET-elements have a continued $\text{V}_{\mathrm {ts}}$ offset in the local equivalent threshold voltage ($\text{V}_{\mathrm {th}}$) in different areas. The device exhibits a high $\text{I}_{\mathrm {d,max}}$ of 1.12 A/mm and a high peak extrinsic $\text{g}_{\mathrm {m}}$ of 374 mS/mm with an improved gate swing >2.6 V, much higher than that of Fin-HEMT. Excellent RF performance was shown, including $\text{f}_{\mathrm {T}}/\text{f}_{\mathrm {max}} =61.8$ /148.8 GHz, $\text{G}_{\mathrm {as}}/\text{G}_{\mathrm {linear}} = {9.98}$ / 12dB at 30 GHz. To the best of our knowledge, this is the best associated gain and linearity performance reported to date for AlGaN/GaN HEMTs. This letter has great potential for high gain and linearity millimeter wave power applications, which are needed for future communication systems. [ABSTRACT FROM AUTHOR]

This paper reports the AlGaN/GaN/ Si $\delta $ -doped AlGaN/GaN:C HEMT device on silicon with high channel conductivity, high breakdown field (E-field) strength, and low current collapse by using the Si-doped AlGaN back barriers. The Si $\delta $ -doped AlGaN back barrier was used to compensate for the reduction of channel conductivity as a result of a carbon-doped semiinsulating GaN buffer layer. The maximum drain current increases from 412 to 720 mA/mm, and peak extrinsic transconductance is improved from 103 to 210 mS/mm. Due to the reduction of electric field between the gate and drain along the GaN channel by inserting the Si $\delta $ -doped AlGaN back barrier layer, it can effectively suppress the capture of electrons in channel by carbon-induced accepted traps in the GaN:C buffer. Combined with the high conductivity of Si $\delta $ -doped AlGaN back barrier and high resistance of GaN:C buffer, the device showed the high breakdown E-field strength and the low specific on-resistance. Our proposed device is observed to hold a gate–drain voltage of 769 V at $\textsf {10}~\mu \text{A}$ /mm (7- $\mu \text{m}$ gate–drain spacing) and 0.53 $\text{m}\Omega ~\cdot $ cm $^{{2}}$ and the gate-to-drain electric field corresponds to 1.1 MV/cm. [ABSTRACT FROM AUTHOR]

In this paper, threshold voltage (${V}_{{\textsf {th}}}$) shift in Al2O3/ AlGaN/GaN metal–oxide–semiconductor high-electron-mobility transistors (MOS-HEMTs) induced by charge trapping and the impacts of postmetallization annealing (PMA) were studied. In addition to the transient voltage shift caused by interface trapping effect, retentive voltage shift was also observed which was attributed to border traps with very large emission time constant ($\tau _{e}$). PMA has little influence on the transient ${V}_{\textsf {th}}$ shift which is related to interface traps with $\textsf {18}~\textsf {s}< \tau _{e}< \textsf {54}$ s, while the total interface traps with $\textsf {4}~\textsf {s} < \tau _{e}< \textsf {54}$ s are reduced by PMA from $\textsf {4.03} \times \textsf {10}^{\textsf {12}}\,\,\textsf {cm}^{-\textsf {2}}$ to $\textsf {1.77} \times \textsf {10}^{\textsf {12}}\,\,\textsf {cm}^{-\textsf {2}}$. Interface trapping dominates at low program voltage (${V}_{p}$), while border trapping becomes remarkable with ${V}_{p}$ above the critical level. Due to the cumulative border trapping effect, an increase in program voltage by per volt causes an additional retentive voltage shift by about $\textsf {1}$ V. PMA leads to an increase in critical ${V}_{p}$ from 5 to 7 V, which therefore results in a decrease in the density of total accessible border traps from $\textsf {1.99} \times \textsf {10}^{\textsf {13}}\,\,\textsf {cm}^{-\textsf {2}}$ to $9.25\times \textsf {10}^{\textsf {12}}$ cm−2 with ${V}_{p}$ up to 12 V. The border trapping for both devices with and without PMA shows similar retention characteristics, with ${V}_{{\textsf {th}}}$ recovery as small as 1.2 V after one week. [ABSTRACT FROM AUTHOR]

This paper proposes a novel electrical method for the determination of channel temperature in AlGaN/GaN high-electron mobility transistors. A test structure combining various device geometries has been utilized to achieve the temperature dependence of the channel resistance and then applied to detect the channel temperature under the gate instead of that at the gate edge on the drain side. A 2-D electrothermal model has been built, and the model demonstrates excellent agreement with the experimental data. Compared with gate resistance thermometry and micro-Raman spectroscopy, our method has advantages of high accuracy, easy positioning, and immunity to the gate head geometry. This facilitates its potential for temperature extraction, especially for short channel devices. Finally, we apply this method to different device structures to demonstrate its scalability, and the uncertainty caused by current collapse is also discussed. [ABSTRACT FROM AUTHOR]

High performance enhancement-mode (E-mode) AlGaN/GaN high electron mobility transistors (HEMTs) were achieved by using the TiN-based source contact ledge and two-step fluorine treatment. Due to the effective reduction of the source resistance by TiN-based source contact ledge, the peak extrinsic trans-conductance improved by 21.2% from 340 to 412 mS/mm. In addition, due to the enhancement of the back barrier by the two-step fluorine treatment, the three-terminal OFF-state breakdown voltage (BVDS) improved by 11.5% from 162 to 183 V. The proposed E-mode AlGaN/GaN HEMTs exhibit a maximum drain current of 845 mA/mm (@ ${V} _{\text {GS}} =3$ V), a threshold voltage (${V} _{\text {th}}$) of 0.6 V, a high current-gain cutoff frequency ${f} _{\text {T}}$ of 61 GHz, and a high power-gain cutoff frequency ${f} _{\text {MAX}}$ of 130 GHz. Approximately 5% current collapse occurs at a drain quiescent bias of 30 V. The calculated Johnson’s figure of merit (J-FOM = $\text{BV}_{\text {DS}}\times {f}_{T}$) is 11.2 THz-V, the highest so far for GaN-based HEMTs. The calculated $\text {BV}_{\text {DS}} \times {f}_{\text {MAX}}$ value is 23.8 THz-V, indicating significantly improved the speed and power performance of the E-mode GaN-based HEMT. [ABSTRACT FROM AUTHOR]

In this study, the electron beam–induced current technique was used to investigate the spatial distribution of gate leakage paths in AlGaN/GaN high electron mobility transistors. The mesa-type devices exhibited three leakage paths: the mesa edge leakage, the sidewall leakage, and the isolation leakage. In mesa-isolated devices with a SiN passivation layer, the dominant leakage paths were through the SiN/GaN interface as a result of the imperfections at the SiN/semiconductor interface. The mesa sidewall leakage in a passivated device gradually decreased from the gate to the source/drain along the mesa edge. This was correlated with the diffusion length and the distance of the electron beam from the gate. In the device without a SiN passivation layer, the major leakage path was found to be through the mesa edge under the gate metal, which was induced by the gate-channel overlap at the mesa edge. [ABSTRACT FROM AUTHOR]

Polarization engineering in 30-nm Pb (Zr,Ti) O3 (PZT)/AlGaN/GaN high-electron-mobility transistors (HEMTs) is demonstrated. The coupling between ferroelectric polarization and 2-D electron gas (2DEG) showed a remarkable increase in transconductance during the down-sweep process; this can be attributed to the switching of ferroelectric polarization. With the increase in maximum gate voltage, the transfer curve showed a positive shift; this is because of the increase in polarization charges induced by gate voltage. The drain electric field affected the polarization of ferroelectric layer, leading to different hysteresis behaviors and peak transconductance trends of transfer curves. To decrease the effect of drain electric field on gate, a small drain voltage was used to evaluate the characteristics of PZT/AlGaN/GaN. The variation in peak transconductance was used to estimate the recovery and pinning degree of polarization. The ferroelectric layer modulates the 2DEG in ferroelectric/AlGaN/GaN HEMTs; this mechanism provides guidelines for designing and electrically controlling ferroelectric/AlGaN/GaN HEMTs. [ABSTRACT FROM AUTHOR]

In this letter, a high-performance gate-recessed AlGaN/GaN high electron mobility transistor (HEMT) fabricated by the recess-arrayed ohmic contact technology is presented. An array of square columns was etched in the ohmic region, using Ti/Al/Ni/Au metal deposition and rapid annealing to fabricate a low-resistance ohmic contact. By using the transmission line method measurement, an ohmic contact resistance ( Rc ) of 0.12 \Omega • mm is measured, which is 70% lower than that of the reference device. The patterned ohmic contact HEMT (POC HEMT) exhibits the saturation current of 1130 mA/mm at {V}_{ds}=10 V and {V}_{gs}=1$ V, with a shift of the knee voltage from 6 V to 3 V. The RF measurement shows the power-added efficiency (PAE) of 71.6% at 5 GHz. After the third harmonic tuning, the PAE of 85.2% and the corresponding power density of 11.2 W/mm and power gain of 16.9 dB are obtained. According to the achieved results, the recess-arrayed ohmic contact processed GaN HEMT has a great potential for high RF efficiency and power applications. [ABSTRACT FROM PUBLISHER]

The recessed trapezoidal groove dual‐gate profile is achieved by the low power CF4 plasma etching based on the principle of ion‐scattering. The recessed trapezoidal groove dual‐gate architecture can increase the lateral broadening of depletion width, yielding the Enhancement‐mode operation. This device demonstrates a threshold voltage of 0.43 V, a maximum drain current of 480 mA mm−1 and a trans‐conductance of 308 mS mm−1. The device exhibits a low off‐state leakage current of ≈10−10 A mm−1 and gate induced drain leakage is effectively improved. An extrinsic current gain cut off frequency of 32 GHz and a maximum oscillation frequency of 65 GHz are deduced. The threshold voltage (Vth) stability of the Schottky gate HEMT is investigated. The recessed trapezoidal groove dual‐gate exhibits a small shift of Vth, which is attributed to the lateral extension of depletion region in the trapezoidal groove dual‐gate structure. [ABSTRACT FROM AUTHOR]

In this paper, AlGaN/GaN Fin-HEMTs with different fin configurations are theoretically and experimentally investigated. A simple physical-based threshold voltage model for AlGaN/GaN Fin-HEMTs is built for qualitative analysis. It is shown that the threshold voltage of AlGaN/GaN Fin-HEMTs depends on the width and height of the fin structure. The peak value and linearity of transconductance and current gain cutoff frequency are improved by reducing the fin length. It is also found that the linearity of transconductance is sensitive to the fin height, which can be attributed to the capacitance control from sidewalls. [ABSTRACT FROM AUTHOR]

This letter demonstrated AlGaN/GaN enhancement-mode (E-mode) high-electron-mobility transistors (HEMTs) with 30-nm Pb(Zr,Ti)O3 ferroelectric gate dielectric. The high-quality interface and polarization coupling resulted in the initial pre-poled ferroelectric polarization toward surface. Then, ferroelectric polarization engineering and gate poling were studied, realizing E-mode HEMTs with very high field-effect mobility of 1819 cm2/ \textV\cdot \texts , ON/OFF current ratio larger than 10^10 , and the low sub-threshold slope of 90 mV/decade. Owing to the undestroyed 2-D electron gases channel, ferroelectric gate GaN-based E-mode HEMTs with high transport performance are promising candidates for high-speed logic circuit applications. [ABSTRACT FROM AUTHOR]

A high combination of transconductance ( \textg\text {m} ), current gain cutoff frequency ( \textf\text T ) and three terminal breakdown voltage was achieved using thin barrier AlGaN/GaN HEMTs and TiN-based source contact ledge. The sheet resistance is effectively reduced, whereas the peak extrinsic trans-conductance is improved by 24% from 334 to 415 mS/mm. The thin barrier AlGaN/GaN HEMTs with TiN-based source ledge exhibit a maximum drain current of 1096 mA/mm, a three-terminal off-state breakdown voltage (BV \textsf {DS} ) of 151 V, a high current-gain cutoff frequency \textf\text T of 69 GHz, and a high power-gain cutoff frequency \textf\text {MAX} of 110 GHz. No significant drain current collapse was observed on thin barrier AlGaN/GaN HEMTs with TiN-based source contact ledge. The uniform \textf\text T characteristic over a wide range of bias condition is achieved by using the TiN-based source contact ledge devices. The calculated Johnson’s figures of merit (J-FOM = BV \textsf {GD}\times \text{f}\text T ) is 10.4 THz-V, which is the highest record so far for 0.2\mu \textm T-gate SiN passivation AlGaN/GaN HEMTs without source field plate. [ABSTRACT FROM AUTHOR]

The subthreshold characteristic of gate-recessed high-electron-mobility transistors (HEMTs) using dual-gate (DG) architectures is systematically studied. The recessed DG structure can effectively shift the threshold voltage ( V\text {th} ) in the positive direction. Different from the complex function expression between V\text {th} and AlGaN thickness ( \texttb ) in the recessed single-gate (SG) device, the variation of \textV\text {th} with tb is monotonic in the recessed DG devices. Recessed DG device exhibits a low off-state leakage current of \sim 3\times 10^-10 A/mm and gate induced drain leakage is effectively improved. A higher I \mathrm{\scriptscriptstyle ON}/I \mathrm{\scriptscriptstyle OFF} range of recessed DG devices broadens about 2 times and provide a wider range of tb than that of recessed SG devices. The DG structure has a stronger modulation effect on drain–source resistance ( R\text {ds} ) and gate–drain resistance ( R\text {gd} ) than the SG devices. A lower subthreshold swing (SS) of ~100 mV/dec is obtained by recessed DG design. Due to the second gate inducing the lateral extension of depletion region between the first gate and drain, the off-state leakage and first gate reverse leakage have been significantly improved. Therefore, the recessed DG architecture design can effectively improve the fluctuation of SS and off-state current versus the different AlGaN barrier thickness. [ABSTRACT FROM PUBLISHER]

This letter reports on a novel enhancement-mode (E-mode) AlGaN/GaN high electron mobility transistor (HEMT) that combines nanowire channel and fluorine plasma treatment using inductively coupled plasma (ICP). Compared with the conventional HEMTs, the threshold voltage of E-mode HEMT shifts from −2.8 to +0.7 V, and the Schottky reverse leakage current is reduced by one order of magnitude. The device exhibits a superior performance with a drain current of 460 mA/mm at V {{\text {GS}}} - V {{\text {TH}}} = 2 V. High \textI{ \mathrm{\scriptscriptstyle ON}}/\textI{ \mathrm{OFF}} ratio of approximately $10^{{\mathbf {9}}} and high breakdown voltage of 138 V with \textL{{\text {DS}}}=4~\mu \text{m} are obtained, i.e., the breakdown voltage of E-mode HEMT is improved by 25% than that in conventional HEMTs. The drain induced barrier lowering (DIBL) is as low as 4 mV/V, and the subthreshold swing (SS) of 70 mV/decade is achieved. The device exhibits an intrinsic current gain cutoff frequency f{\text T} of 22 GHz and a maximum oscillation frequency f {\text {max}} of 60 GHz. [ABSTRACT FROM AUTHOR]

This paper studied the recess-etching effects on the temperature-dependent characteristics of AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs) with Al2O3/AlN gate-stack. The 12.6 nm recess-etching resulted in voltage shift of capacitance-voltage curves by 2.4 V, improved peak field-effect mobility ( \mu \text {FE}) from 1906 to 2036 cm2/ \textV\cdot \texts , and increased peak transconductance ( g\text {max}) from 272 to 353 mS/mm. The temperature-dependent measu-rement from 298 to 473 K showed decrease in maximum drain current, g\text {max} , and \mu \text {FE} for both devices with and without recess etching, attributed to thermal electron emission and carrier depletion effects. Recess etching did not degrade the thermal stability of carrier distribution and the transport properties. Temperature-dependent \mu \text {FE} analysis revealed that optical phonon scattering dominated the transport mechanism of Al2O3/AlN/ AlGaN/GaN MIS-HEMTs. Optical phonon energy of 74 and 77 meV were obtained for the devices with and without recess etching, respectively. [ABSTRACT FROM AUTHOR]

Gate-recessed AlGaN/AlN/GaN metal–oxide–semiconductor heterostructure high-mobility transistors (MOS-HEMTs) on SiC substrate are fabricated. The device with a gate length of 0.6 \mu\m and a gate periphery of 100 \mu\m exhibits a maximum dc drain current density of 1.59 A/mm at VGS = \3\ \V with an extrinsic transconductance (gm) of 374 mS/mm. An extrinsic current gain cutoff frequency (fT) of 19 GHz and a maximum oscillation frequency (f\max) of 50 GHz are deduced from S-parameter measurements. The output power density is 13 W/mm, and the associated power-added efficiency is 73% at 4-GHz frequency and 45-V drain bias. The power performance is comparable to state-of-the art AlGaN/GaN HEMTs, which demonstrates the great potential of gate-recessed MOS-HEMTs as a very promising alternative to GaN HEMTs. [ABSTRACT FROM AUTHOR]