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We report on the fabrication of Josephson tunnel junctions with as-grown MgB[sub 2] thin films and on the Josephson tunneling properties of the junctions. MgB[sub 2]/AlN/NbN trilayers were continuously deposited on sapphire (0001) substrates in the same vacuum run. The as-grown MgB[sub 2] thin films were fabricated using the conventional sputtering method at the low-substrate temperature of 250°C, and the AlN tunnel barrier and the NbN counter electrode were deposited by reactive sputtering at the ambient substrate temperature. The T[sub c] of the MgB[sub 2] thin films was 28 K. The junctions demonstrated clear Josephson tunneling characteristics with evident supercurrents, gap voltages, and small subgap leakage currents. The normal resistance of these junctions had an ideal dependence on the junction areas and on the AlN-barrier thickness. The temperature dependence of the gap voltages and the external dc magnetic-field dependence of the supercurrents were measured to investigate the Josephson tunneling behaviors in the MgB[sub 2]/AlN/NbN junctions. The junctions showed BCS-like temperature dependence of the gap voltage and ideal Fraunhofer patterns. [ABSTRACT FROM AUTHOR]

Superconducting qubit circuits require high quality low critical current density Josephson tunnel junctions. We have developed high quality epitaxial NbN/AlN/NbN tunnel junctions with critical current density, Jc, ranging from as low as a few A/cm^2 to a few tens of kA/cm^2. In this work, we measured current–voltage characteristics for junctions with a Jc\sim 32\ \rm A/cm^2 in the temperature range from 17 mK to above 6.7 K. All the junctions are in good quality and have a high gap voltage (>5.5 mV). We found that the junctions' sub-gap resistances were temperature dependent above 2.5 K and saturated at temperatures below 2.5 K. A junction sub-gap leakage current Ir of about 23 pA was measured. The voltage noise power spectral density for 3 junctions with different sizes has been measured at the base temperature of 17 mK with the junctions biased above the gap voltage. The spectral densities clearly show 1/f behavior at low frequency and are proportional to the junction's linear dimension. [ABSTRACT FROM AUTHOR]

We have studied electrical properties of YBCO/Y/sub 0.7/Ca/sub 0.3/Ba/sub 2/Cu/sub 3/O/sub 7-x/ (Ca-YBCO)/YBCO trilayer junctions using c-axis oriented films. The Ca-YBCO films used here are the overdoped version of YBCO and show transition temperatures around 55 K. All of the junctions show RSJ-like current-voltage characteristics in a certain temperature range, though the range decreases with the Ca-YBCO interlayer thickness. For an applied magnetic field, the junctions show Fraunhofer pattern, indicating a Josephson coupling through the interlayers. The normal resistance of the junctions is proportional to the thickness of the interlayer, suggesting little interface resistance. The exponential dependence of the critical current on temperature and that on the interlayer thickness mean that the junctions behave as SNS junctions. These experimental results imply the proximity effect along c-axis in high temperature superconductors. [ABSTRACT FROM PUBLISHER]

We demonstrate superconducting qubits using epitaxially grown Josephson junctions. A fully epitaxial NbN/AlN/NbN trilayer on MgO (100) substrate is processed by photolithography and dry-etching into transmon qubits with a large Josephson energy. The tunnel barrier made of cubic-phase AlN, rather than the ordinary hexagonal phase, is the key to avoid piezoelectric coupling to the phonon bath. The energy-relaxation time and the spin-echo decay time of ∼500 ns are observed in the qubits that are coupled to a monolithically made coplanar waveguide resonator. [ABSTRACT FROM AUTHOR]

Abstract: Fabricating high quality Josephson junction is essential in superconducting qubit circuits. In this letter, high quality tunnel junctions with a low critical current density of ∼32A/cm2 were fabricated. The 1/f noise parameter η was obtained from junctions’ low frequency voltage noise power spectral density . Our findings showed that the noise spectrum is junction linear dimension dependent, indicating the junction’s side leakage current induced by defects in the amorphous oxide insulator dominates the origin of the 1/f noise in our epitaxial NbN/AlN/NbN tunnel junctions. [Copyright &y& Elsevier]

Abstract: We propose an integer multiplier with systolic array structure for single-flux-quantum (SFQ) technology. Since SFQ logic circuits work by pulse logic, suitable circuit structure for SFQ logic circuits is different from one for semiconductor logic circuits. The systolic array is a circuit structure for VLSIs and consists of regularly arranged simple processing elements. All signals of the proposed systolic multiplier flow from input to output unidirectionally. This feature matches concurrent-flow clocking well. For evaluating the proposed systolic multiplier, we have designed a 4-bit systolic multiplier, as well as a 4-bit array multiplier which is one of the most typical parallel multipliers, and have compared them with each other. From the results of the design and the digital simulation, the number of Josephson junctions (JJs) of the 4-bit systolic multiplier is almost the half of that of the 4-bit array multiplier, and the latency of the former is about 1.5 times longer than that of the latter. Our estimation of the performance of larger-scale multipliers shows that the proposed systolic multiplier achieves comparable latency to the array multiplier, using extremely smaller number of JJs when the bit-width of input becomes large. We have fabricated a 1-bit cell of the systolic multiplier using NEC standard Nb process and have successfully tested it at low speed. The proposed systolic integer multiplier is attractive for SFQ technology. [Copyright &y& Elsevier]

Abstract: We designed a single-flux-quantum (SFQ) scheduler for a 4×4 network switch. It receives requests serially and arbitrates them. Fair scheduling is achieved by using a round-robin priority pointer at each output port. The pointer is updated so that the input port that was granted permission has the lowest priority in the next scheduling cycle. We divided the scheduler into sub-blocks, which were separately designed. The sub-blocks, which have asynchronous interfaces, were then connected with passive transmission lines. Ladder-type on-chip clock generators were included in the circuit for high-speed operation. Using logic simulation, we verified the scheduler test circuit. The scheduler test circuit was composed of about 3000 Josephson junctions. We tested the scheduler circuit at high speed and confirmed correct operations at over 40GHz. [Copyright &y& Elsevier]