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The performance and reliability of semiconductor devices scaled down to the sub-nanometer regime are being seriously affected by process-induced variability. To properly assess the impact of the different sources of fluctuations, such as line edge roughness (LER), statistical analyses involving large samples of device configurations are needed. The computational cost of such studies can be very high if 3D advanced simulation tools (TCAD) that include quantum effects are used. In this work, we present a machine learning approach to model the impact of LER on two gate-all-around nanowire FETs that is able to dramatically decrease the computational effort, thus reducing the carbon footprint of the study, while obtaining great accuracy. Finally, we demonstrate that transfer learning techniques can decrease the computing cost even further, being the carbon footprint of the study just 0.18 g of CO2 (whereas a single device TCAD study can produce up to 2.6 kg of CO2), while obtaining coefficient of determination values larger than 0.985 when using only a 10% of the input samples. [ABSTRACT FROM AUTHOR]

In this work, we present a machine learning neural network model to predict the impact of realistic metal grain granularity (MGG) variability on the threshold voltage V T h and on the I D − V G characteristics of a silicon-based 12 nm gate length nanosheet FET. This model is based on the multi-layer perceptron (MLP) machine learning architecture. As realistic MGG maps consist of the distribution of grains on the gate with different work-function values, it is relevant to apply algorithms such as the principal component analysis to reduce these features to the most representative ones. Once the realistic MGG features are correctly reduced without losing information, we train two different neural networks with the neurons in the output layer as the only difference, to predict the V T h and the I D − V G characteristics, respectively. The comparison between TCAD results and the model, shows excellent agreement for the mean and standard deviation of V T h distributions for different average grain sizes values (from 3 nm to 10 nm) demonstrating the accuracy of the machine learning model. Also, we study the amount of data needed to accurately train the MLPs, leading to results that allow us to drastically reduce the computational time required to perform variability studies for state-of-art nano FET devices. • Machine learning model to predict the impact of variability on state-of-the-art semiconductor devices. • Prediction of the impact of metal grain granularity on the Vth and on the I-V characteristics of a 12 nm gate length Si-based nanosheet FET. • Model that reduces the computational cost of variability statistical studies. • Comparison of the model performance against TCAD simulations. [ABSTRACT FROM AUTHOR]