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Nonisolated dc–dc converters are fundamental building blocks in the power supply for a wide range of applications. To cater to this heterogeneity in applications, development of dc–dc converters with suitable voltage conversion ratio (G) is imperative. Given a converter topology, G can be found out uniquely by using the principle of inductor volt-second balance, and the process of obtaining the voltage conversion ratio from the topology is simple. In contrast, the inverse problem, i.e., the process of obtaining the converter topology for a given voltage conversion ratio (G) is a challenging task, and the obtained topology is also not unique. This article presents a simple method to obtain a family of converter topologies from a required voltage conversion ratio. This method utilizes the principle of inductor flux balance as a synthesis tool. The step-by-step procedure to synthesize the converter topologies is outlined. To illustrate the efficacy of the proposed method, it is applied to synthesize various quadratic buck–boost topologies, and a family of converters is identified. Operation and feasibility of two novel topologies, identified by the proposed theory, are verified experimentally. [ABSTRACT FROM AUTHOR]

This paper describes a theory to synthesize nonisolated dc–dc converters. It uses the fundamental flux balance equation across the inductors of a converter as a starting point in this synthesis process. The flux balance equations are the linear equations of the input voltage, capacitor voltages, and duty cycle (D). The coefficients of these linear equations can be selected from a finite set of choices. These choices define the converter topologies that are subsequently used to synthesize a converter. The synthesis procedure applies to a converter of multiple order. All the possible converters are identified for a first-order topology. In the case of second-order converters, all the choices of the flux balance equation are defined. Based on these choices, three new quadratic topologies are derived and verified to demonstrate the effectiveness of the theory. The procedure to synthesize a converter from a given voltage conversion ratio is also outlined. [ABSTRACT FROM AUTHOR]

Due to the pulsating power at the inverter output terminals, the passive storage elements of the boost stage of the current-fed switched inverter (CFSI) contain a power frequency harmonic component (100 Hz), apart from dc and switching frequency components. In prior designs, the second harmonic component is suppressed by increasing the size of the input filter inductor and capacitor or by using additional circuits. This paper presents a complete characterization of a control-based approach to suppress the power frequency harmonic component in the input inductor current of a CFSI. It also presents a comprehensive characterization of the harmonic power redistribution. Using the proposed approach, it is demonstrated that the inductor value of a CFSI is reduced by 61% for the same peak-to-peak ripple. This leads to an improvement in the conversion ratio, efficiency, and power density of the overall converter. A SiC MOSFET-based CFSI with 75-kHz switching frequency is used to verify the proposed design philosophy. [ABSTRACT FROM AUTHOR]

Impedance source inverters (ISIs) are gaining attention due to features such as single-stage conversion, buck-boost capability, and inherent shoot-through protection. To maintain the required ac output voltage, typically ISIs are operated at a higher dc-link voltage due to constrained modulation index. This also increases voltage stress across capacitors and switches of the converter. This voltage stress is approximately double compared to that of voltage source inverter with preboost stage (Boost-VSI). To mitigate this problem, a new pulsewidth modulation (PWM) scheme for the active-front-end based ISIs (AFE-ISIs) is proposed. The proposed scheme enables the ISIs to produce high ac gain with lower voltage stress across the capacitor and switches. In other words, the proposed scheme blends the advantages of Boost-VSI into ISIs. With the new PWM scheme, there are also reductions in output voltage total harmonic distortion, switching frequency ripple in the inductor current, and power loss in the converter. A prototype of the current-fed switched inverter, an AFE-ISI, is designed, and the proposed PWM scheme is implemented. Experimental results obtained are in accordance with the proposed theory and show that the voltage stress has reduced from 325 V to 203 V for an ac output of 110 V. [ABSTRACT FROM AUTHOR]

Power-hardware-in-the-loop (PHIL) simulations are used to test power hardware with the help of computer-based real-time simulations. Generally, buck-based power amplifiers that have good dynamic performance are used to construct a PHIL simulator because of their linear large signal control-to-output characteristics. However, their output voltage peak is limited to the applied dc input in the linear region of modulation. In this paper, a differential boost converter (DBC)-based power amplifier is proposed for PHIL simulations, which does not suffer from the aforementioned limitations of a buck-based amplifier. A conventional DBC exhibits highly nonlinear control-to-output behavior. A feedback linearization technique is used to linearize the DBC in a large signal and dynamic sense, which makes it suitable for PHIL applications. Using this power amplifier and a MATLAB/Simulink toolbox for real-time simulations, the PHIL simulator is constructed. Experimental results under various operating conditions of source voltages, such as unipolar, bipolar, transients in frequency, and the dc step, and various load conditions, such as reactive, nonlinear, and transient faults, are provided to confirm the efficacy of the proposed PHIL simulator. [ABSTRACT FROM PUBLISHER]

The Z-source inverter (ZSI) employs an LC impedance network between the main inverter bridge and the power source. The unique feature of the ZSI is that it can operate either in buck or boost mode with a wide range of obtainable output voltages from a given input voltage. This topology also exhibits better electromagnetic-interference noise immunity when compared to a traditional voltage-source inverter (VSI). However, the LC impedance network of ZSI significantly increases the size and cost of the power converter and can make it unsuitable for low-power applications. This paper proposes a novel topology called switched boost inverter (SBI) which exhibits similar advantages of ZSI with lower number of passive components and more active components compared to ZSI. The steady-state and small-signal analyses of SBI, along with its pulsewidth modulation (PWM) control strategies, have been discussed in this paper. This paper also presents a comparison of SBI and ZSI with the same input and output parameters. The theoretical analysis given in this paper has been validated using a laboratory prototype of SBI, and the experimental results are presented for verification. The experimental harmonic spectrum of the inverter's output voltage with the proposed PWM technique is also plotted and compared with that of a traditional VSI. All the experimental results show good correlation between theory and experiments. [ABSTRACT FROM PUBLISHER]

Switched boost inverter (SBI) is a single-stage power converter derived from Inverse Watkins Johnson topology. Unlike the traditional buck-type voltage source inverter (VSI), the SBI can produce an ac output voltage that is either greater or less than the available dc input voltage. Also, the SBI exhibits better electromagnetic interference noise immunity when compared to the VSI, which enables compact design of the power converter. Another advantage of SBI is that it can supply both dc and ac loads simultaneously from a single dc input. These features make the SBI suitable for dc nanogrid applications. In this paper, the SBI is proposed as a power electronic interface in dc nanogrid. The structure and advantages of the proposed SBI-based nanogrid are discussed in detail. This paper also presents a dq synchronous-reference-frame-based controller for SBI, which regulates both dc and ac bus voltages of the nanogrid to their respective reference values under steady state as well as under dynamic load variation in the nanogrid. The control system of SBI has been experimentally validated using a 0.5-kW laboratory prototype of the SBI supplying both dc and ac loads simultaneously, and the relevant experimental results are given in this paper. The low cross regulation and the dynamic performance of the control system have also been verified experimentally for a 20% step change in either dc or ac load of SBI. These experimental results confirm the suitability of the SBI and its closed-loop control strategy for dc nanogrid applications. [ABSTRACT FROM AUTHOR]

Electronic load (E-load) is commonly used to test power supplies. In order to test computer power supplies, the E-load must possess an ideal controlled current source property which draws a desired load current even in the case of a very low terminal voltage of the source under test (SUT). It also needs to have superior dynamic performance to simulate high-slew-rate load transients. This paper proposes the design of a switching-converter-based E-load with very large operational bandwidth. The overall architecture of the E-load consists of a low-bandwidth converter, which functions under steady state, and a high-bandwidth auxiliary circuit that is only active during transient state. The converter circuit is realized using a novel switched-boost topology, and the auxiliary circuit is realized using a MOSFET operating at the edge of saturation and linear region. The proposed topology is capable of sinking a specific amount of load current even with a very low SUT terminal voltage. Simulation and experimental validations are provided to verify the proposed concepts. A prototype has been built to test the proposed architecture. The operational input voltage (SUT voltage) ranges of the prototype are between 0.5 and 6 V. The load current range is between 0.75 and 7 A. The results validate the excellent dynamic characteristics of the proposed architecture. [ABSTRACT FROM PUBLISHER]

The flying capacitor multicell inverter (FCMI) possesses natural balancing property. With the phase-shifted carrier-based scheme, natural balancing can be achieved in a straightforward manner. However, to achieve natural balancing with the harmonically optimal phase-disposition (PD) carrier-based scheme, the conventional approaches require (n − 1) × (n − 1) trapezoidal carrier signals for an n-level inverter, which is ( n − 1) × (n − 2) times more than that in the standard PD scheme. This paper proposes two improved natural balancing strategies for FCMI under PD scheme, which use the same (n − 1) carrier signals as used in the standard PD scheme. In the first scheme, the on-line detections are performed of (i) the band in which the modulation signal is located, (ii) corresponding period number of the carrier, and (iii) rising or falling half cycle of the carrier waveform to generate the switching signals based on certain rules. In the second strategy, the output voltage level selection is first processed and the switching signals are then generated according to a rule based on preferential cell selection algorithm. These methods are easy to use and can be simply implemented as compared to the other available methods. Simulation and experimental results are presented for a five-level inverter to verify these proposed schemes. [ABSTRACT FROM AUTHOR]

The hysteresis modulation for power electronic converters is attractive in many different applications because of its unmatched dynamic response and wide command-tracking bandwidth. Its application and benefits for two-level converters are well understood, but the extension of this strategy to multilevel converters is still under development. This paper summarizes and reviews the various hysteresis modulation approaches available in the literature for multilevel converters. The pros and cons of various techniques are described and compared for tracking the reference signal in order to attain an adequate switching optimization, excellent dynamic responses and high accuracy in steady-state operation. By using the recently developed multilevel hysteresis modulation approaches, the advantages of using several accessible dc potentials in a multilevel inverter have been fully exploited. All of these hysteresis modulation approaches are tested for tracking a current reference when applied to a five-level inverter. The relevant simulation and experimental results are also presented. This study will provide a useful framework and point of reference for the future development of hysteresis modulation for multilevel converters. [ABSTRACT FROM AUTHOR]