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Herein, the electrical and thermal performance of lateral AlGaN/GaN high electron mobility transistors (HEMTs) and metal‐insulator‐semiconductor field effect transistors (MISFETs) fabricated with 11 μm thick GaN buffer layers on 200 mm diameter Qromis Substrate Technology (QST) substrates are investigated. The QST substrate has a polycrystalline core engineered to be coefficient of thermal expansion (CTE)‐matched to GaN to minimize wafer bow and residual stress in the GaN film as a result of epitaxial growth. Raman spectroscopy is used to determine the biaxial residual stress in the GaN buffer of the as‐fabricated devices. Electrical characterization is demonstrated on the HEMTs including DC and pulsed output characteristics, DC transfer characteristics, Hall mobility, carrier concentration, sheet resistance, median transition frequency, and maximum stable gain. Finally, the thermal performance of the AlGaN/GaN MISFET is assessed via thermoreflectance thermal imaging at DC power densities up to 19 W mm−1. The thermal resistance of the MISFET, calculated using the peak temperature rises on the gate electrode for DC power densities <10 W mm−1, is measured to be 15.4 mm K W−1, which is comparable with state‐of‐the‐art GaN‐on‐Si lateral transistors. [ABSTRACT FROM AUTHOR]

A high‐voltage AlN/GaN superlattice (SL) buffer for monolithic AlGaN/GaN power circuits is experimentally compared with a step‐graded AlGaN/GaN buffer. The SL as part of a 5.1 μm epitaxial stack withstands over 1.3 kV. Although the step‐graded buffer is sufficient for low‐side circuits, the operation voltage of monolithic topologies such as a half‐bridge is limited: static negative back gating at −200 V depletes the lateral channel completely. Asymmetrical buffer leakage at a positive substrate voltage of +250 V limits the operation voltage further. The SL buffer mitigates both effects: a negative substrate voltage of −200 V reduced the lateral channel current only by 25%. However, this condition is not required for half‐bridge operation on the SL, because low symmetrical vertical buffer leakage at substrate voltages of ±500 V allows operation of power topologies with positive substrate bias. High‐electron‐mobility transistors (HEMTs) on the graded buffer show excessive threshold voltage shift at negative substrate bias. On the SL buffer, the threshold voltage is shifted only +1 V from negative substrate biases, which allows monolithic high‐voltage power topology operation. 98.8% efficient operation of a 6 × 4 mm2 GaN‐on‐Si power integrated circuit with a monolithic half bridge, freewheeling diodes, and drivers is demonstrated on the SL. [ABSTRACT FROM AUTHOR]

Vertical diamond Schottky diodes with blocking voltages VBD > 2.4kV and ON-resistances RON < 400m Ω cm2 were fabricated on homoepitaxially grown diamond layers with different surface morphologies. The morphology (smooth as-grown, hillock-rich, polished) influences the Schottky barrier, the carrier transport properties, and ultimately the device performance. The smooth as-grown sample exhibited a low reverse current density JRev < 10−4 A/cm2 for reverse voltages up to 2.2 kV. The hillock-rich sample blocked similar voltages with a slight increase in the reverse current density (JRev < 10−3 A/cm2). The calculated 1-D breakdown field, however, was reduced by 30%, indicating a field enhancement induced by the inhomogeneous surface. The polished sample demonstrated a similar breakdown voltage and reverse current density as the smooth as-grown sample, suggesting that a polished surface can be suitable for device fabrication. However, statistical analysis of several diodes of each sample showed the importance of the substrate quality: a high density of defects both reduces the feasible device area and increases the reverse current density. In forward direction, the hillock-rich sample exhibited a secondary Schottky barrier, which could be fit with a modified thermionic emission (TEM) model employing the Lambert W-function. Both polished and smooth samples showed nearly ideal TEM with ideality factors 1.08 and 1.03, respectively. Compared with the literature, all three diodes exhibit an improved Baliga figure of merit for diamond Schottky diodes with VBD > 2 kV. [ABSTRACT FROM AUTHOR]

The integration of AlGaN/GaN thin film transistors onto diamond substrates enables the efficient dissipation of device heat, thus providing a boost in performance and reliability of current high-frequency GaN power amplifiers. In this paper, we show 3 GHz load-pull measurements of GaN transistors on silicon (Si) and single crystalline diamond (SCD) as fabricated by our recently presented direct low-temperature bond process. After the transfer onto SCD, the efficiency and output power are increased by 15%, which is explained by a calculated temperature difference of ∼100 K. In addition, the temperature between individual gate fingers is reduced such that the output power density (Pout) is independent of the amount of fingers. A drawback of our GaN epilayer is identified in the huge thermal resistance of the buffer layer so that the heat spreading performance of our technology is significantly impaired. Nevertheless, we demonstrate a large GaN-on-diamond output power of 14.4 W at a Pout of 8.0 W/mm. [ABSTRACT FROM AUTHOR]

Direct low-temperature bond technologies for III-nitride thin film devices are of great interest to both improve device performance and enable on-wafer integration with other semiconductor technologies. However, thin films released from their growth substrate are rather rough and difficult to prepare for direct bonding. Here, we present a bond technique, which transforms a thin AlN surface layer into a 30 nm solid aluminum hydroxide bond layer. This chemical process is based on the dissolution of AlN and recrystallization of aluminum hydroxides within several nanometers of interfacial water, thereby restructuring and adapting the interfaces to form a homogeneous bond contact without any interfacial voids. AlGaN/GaN microwave transistors bonded on diamond demonstrate an excellent electrical, thermal, and mechanical performance of this bond technology for high-frequency devices as well as many other III-nitride applications. [ABSTRACT FROM AUTHOR]

Tomorrow's power electronic systems require cost‐saving and more efficient power conversion solutions. The heterogeneous integration of GaN‐based high electron mobility transistors (HEMTs) together with silicon CMOS by micro‐Transfer‐Printing could be a key technology for this. It enables the integration of highly integrated mature CMOS logic functionality with fast GaN HEMT output drivers with very low on‐state and switching losses. The scalability by design measures of the printed HEMT is investigated in terms of drain‐to‐gate spacing and channel width defining breakdown voltage and area‐related parameters like on‐resistance. The design flexibility of the micro‐Transfer‐Printing by printing the HEMTs on top of the CMOS devices without restrictive design rule limits is investigated by CMOS DC parameter comparison and thermal TCAD Design Of Experiment (DOE) study. No electrical or thermal functional limitation of printing the HEMTs directly on top of the CMOS dielectric layer stack was found. This enables the usage of the isolation capabilities of the CMOS dielectric layer stack to enhance the HEMT breakdown voltage. [ABSTRACT FROM AUTHOR]

We present results from GaN-based high voltage transistors used for power switching applications. The static and dynamic properties of transistors on SiC and Si substrates are determined. Overall, this technology is capable to deliver 1000 V breakdown and 95 A output current as well as a lower product of on-resistance and gate charge than conventional Si-based structures. Areas of further improvement in epitaxial growth and device processing are outlined in order to combine these high currents and high voltages in a single device. (© 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim) [ABSTRACT FROM AUTHOR]

Mechanical and electrical properties of Al2O3 films are compared for plasma-assisted atomic layer deposition (ALD) and thermal ALD on two substrates, GaAs and Si, of different thermal expansion coefficient. Films with stable chemical structure and mechanical residual stress could be produced by both techniques without inducing any damage to sensitive multiquantum-well structures. However, the as-deposited residual stress in the plasma ALD Al2O3 films is lower and decreases, while that in the thermal ALD films increases with the deposition temperature. Moreover, the stress hysteresis observed upon thermal cycles is much lower for the plasma ALD films compared to that for the thermal ALD films. The biaxial elastic modulus (BEM or stiffness parameter) increases with the deposition temperature for both ALD films, being higher for the plasma ALD than that for the thermal ALD at a given temperature. The higher BEM is reflected in better electrical properties of the films. Thus, the leakage current of metal-oxide-semiconductor capacitors with the plasma ALD-Al2O3 film is three orders of magnitude lower and the breakdown voltage 20% higher than that of the capacitors with the thermal ALD film. [ABSTRACT FROM AUTHOR]